JPH1166874A - 不揮発性半導体記憶装置 - Google Patents
不揮発性半導体記憶装置Info
- Publication number
- JPH1166874A JPH1166874A JP21480797A JP21480797A JPH1166874A JP H1166874 A JPH1166874 A JP H1166874A JP 21480797 A JP21480797 A JP 21480797A JP 21480797 A JP21480797 A JP 21480797A JP H1166874 A JPH1166874 A JP H1166874A
- Authority
- JP
- Japan
- Prior art keywords
- potential
- line
- circuit
- selection
- word line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/30—Power supply circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/08—Address circuits; Decoders; Word-line control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Read Only Memory (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21480797A JPH1166874A (ja) | 1997-08-08 | 1997-08-08 | 不揮発性半導体記憶装置 |
| US09/027,194 US5959890A (en) | 1997-08-08 | 1998-02-20 | Non-volatile semiconductor memory device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21480797A JPH1166874A (ja) | 1997-08-08 | 1997-08-08 | 不揮発性半導体記憶装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH1166874A true JPH1166874A (ja) | 1999-03-09 |
| JPH1166874A5 JPH1166874A5 (enExample) | 2005-05-19 |
Family
ID=16661857
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP21480797A Pending JPH1166874A (ja) | 1997-08-08 | 1997-08-08 | 不揮発性半導体記憶装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US5959890A (enExample) |
| JP (1) | JPH1166874A (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005149695A (ja) * | 2003-11-18 | 2005-06-09 | Hynix Semiconductor Inc | Nandフラッシュメモリ素子のしきい電圧測定方法 |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3694422B2 (ja) * | 1999-06-21 | 2005-09-14 | シャープ株式会社 | ロウデコーダ回路 |
| JP4057756B2 (ja) * | 2000-03-01 | 2008-03-05 | 松下電器産業株式会社 | 半導体集積回路 |
| DE10026275A1 (de) * | 2000-05-26 | 2001-12-13 | Infineon Technologies Ag | Verfahren zum Testen einer Vielzahl von Wortleitungen einer Halbleiterspeicheranordnung |
| DE60329899D1 (de) * | 2003-04-30 | 2009-12-17 | St Microelectronics Srl | Ein Wortleitungstreiber mit vollem Spannungshub für einen nichtflüchtigen Speicher |
| US6977861B1 (en) * | 2004-08-05 | 2005-12-20 | Oki Electric Industry Co., Ltd. | Nonvolatile semiconductor memory device |
| US7424663B2 (en) * | 2005-01-19 | 2008-09-09 | Intel Corporation | Lowering voltage for cache memory operation |
| US11948629B2 (en) | 2005-09-30 | 2024-04-02 | Mosaid Technologies Incorporated | Non-volatile memory device with concurrent bank operations |
| US7652922B2 (en) * | 2005-09-30 | 2010-01-26 | Mosaid Technologies Incorporated | Multiple independent serial link memory |
| KR101260632B1 (ko) | 2005-09-30 | 2013-05-03 | 모사이드 테크놀로지스 인코퍼레이티드 | 출력 제어 메모리 |
| US7688652B2 (en) * | 2007-07-18 | 2010-03-30 | Mosaid Technologies Incorporated | Storage of data in memory via packet strobing |
| US8825939B2 (en) * | 2007-12-12 | 2014-09-02 | Conversant Intellectual Property Management Inc. | Semiconductor memory device suitable for interconnection in a ring topology |
| US8825967B2 (en) | 2011-12-08 | 2014-09-02 | Conversant Intellectual Property Management Inc. | Independent write and read control in serially-connected devices |
| JP2017147005A (ja) * | 2016-02-16 | 2017-08-24 | ルネサスエレクトロニクス株式会社 | フラッシュメモリ |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0521812A (ja) * | 1991-07-16 | 1993-01-29 | Toshiba Corp | 不揮発性半導体メモリ |
| JPH06162787A (ja) * | 1992-11-17 | 1994-06-10 | Matsushita Electric Ind Co Ltd | 電気的一括消去機能を有する不揮発性メモリの読み出し方法 |
| JP3743453B2 (ja) * | 1993-01-27 | 2006-02-08 | セイコーエプソン株式会社 | 不揮発性半導体記憶装置 |
| JP3397407B2 (ja) * | 1993-12-14 | 2003-04-14 | 三菱電機システムエル・エス・アイ・デザイン株式会社 | 不揮発性半導体記憶装置及びその消去方法 |
| DE69529367T2 (de) * | 1994-08-19 | 2004-01-22 | Kabushiki Kaisha Toshiba, Kawasaki | Halbleiterspeicheranordnung und hochspannungsschaltende Schaltung |
| US5602779A (en) * | 1994-11-11 | 1997-02-11 | Nkk Corporation | Nonvolatile multivalue memory |
| KR0145225B1 (ko) * | 1995-04-27 | 1998-08-17 | 김광호 | 블럭 단위로 스트레스 가능한 회로 |
| US5604711A (en) * | 1995-05-19 | 1997-02-18 | Cypress Semiconductor, Corporation | Low power high voltage switch with gate bias circuit to minimize power consumption |
-
1997
- 1997-08-08 JP JP21480797A patent/JPH1166874A/ja active Pending
-
1998
- 1998-02-20 US US09/027,194 patent/US5959890A/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005149695A (ja) * | 2003-11-18 | 2005-06-09 | Hynix Semiconductor Inc | Nandフラッシュメモリ素子のしきい電圧測定方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| US5959890A (en) | 1999-09-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR100609669B1 (ko) | 감지 시간 제어 장치 및 방법 | |
| US6031760A (en) | Semiconductor memory device and method of programming the same | |
| US5337281A (en) | Non-volatile semiconductor memory device in which data can be erased on a block basis and method of erasing data on a block basis in non-volatile semiconductor memory device | |
| JP3940570B2 (ja) | 半導体記憶装置 | |
| US20020181279A1 (en) | Nonvolatile semiconductor memory device including correction of erratic memory cell data | |
| US6243313B1 (en) | Semiconductor memory device, nonvolatile semiconductor memory device, and their data reading method | |
| US5214605A (en) | Automatic erasing optimization circuit for an electrically erasable and programmable semiconductor memory and method thereof | |
| JPH06215591A (ja) | 不揮発性半導体記憶装置 | |
| JP3662725B2 (ja) | 単一ビットセル及び多量ビットセル動作の同時的な遂行が可能な不揮発性半導体メモリ装置 | |
| US6320785B1 (en) | Nonvolatile semiconductor memory device and data writing method therefor | |
| JPH1166874A (ja) | 不揮発性半導体記憶装置 | |
| US7031192B1 (en) | Non-volatile semiconductor memory and driving method | |
| JP3708912B2 (ja) | 半導体集積回路装置 | |
| JP3709606B2 (ja) | 不揮発性半導体記憶装置及びベリファイ方法 | |
| US7317647B2 (en) | Noise suppression in memory device sensing | |
| US20050207259A1 (en) | Non-volatile semiconductor memory device and writing method therefor | |
| TW201924025A (zh) | 半導體儲存裝置以及讀出方法 | |
| US7263022B2 (en) | No-precharge FAMOS cell and latch circuit in a memory device | |
| JP3940218B2 (ja) | 不揮発性半導体記憶装置 | |
| KR100313555B1 (ko) | 소거기능의테스트용테스트회로를가진비휘발성반도체메모리 | |
| JP2013127827A (ja) | 不揮発性半導体記憶装置 | |
| JP3667821B2 (ja) | 不揮発性半導体メモリ | |
| JPH0668686A (ja) | 半導体不揮発性記憶装置 | |
| JPH1093054A (ja) | 半導体装置及びデータ処理システム | |
| KR0169413B1 (ko) | 불 휘발성 반도체 메모리의 소거검증 방법 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20040709 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20040709 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20060516 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20070213 |