JPH11500272A - 電気的に導電性を有するコンタクトプラグの形成に関する半導体の製造方法 - Google Patents
電気的に導電性を有するコンタクトプラグの形成に関する半導体の製造方法Info
- Publication number
- JPH11500272A JPH11500272A JP8525680A JP52568096A JPH11500272A JP H11500272 A JPH11500272 A JP H11500272A JP 8525680 A JP8525680 A JP 8525680A JP 52568096 A JP52568096 A JP 52568096A JP H11500272 A JPH11500272 A JP H11500272A
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- JP
- Japan
- Prior art keywords
- contact opening
- layer
- substrate
- conductive material
- etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 17
- 238000004519 manufacturing process Methods 0.000 title claims description 18
- 239000000463 material Substances 0.000 claims abstract description 40
- 239000004020 conductor Substances 0.000 claims abstract description 36
- 239000000758 substrate Substances 0.000 claims abstract description 34
- 238000005530 etching Methods 0.000 claims abstract description 30
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 10
- 238000000151 deposition Methods 0.000 claims abstract description 10
- 230000000873 masking effect Effects 0.000 claims abstract 10
- 238000000034 method Methods 0.000 claims description 32
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 17
- 239000010936 titanium Substances 0.000 claims description 16
- 229910052719 titanium Inorganic materials 0.000 claims description 16
- 239000010937 tungsten Substances 0.000 claims description 16
- 229910052721 tungsten Inorganic materials 0.000 claims description 16
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 15
- 239000011810 insulating material Substances 0.000 claims 5
- 238000000059 patterning Methods 0.000 claims 2
- 239000003990 capacitor Substances 0.000 claims 1
- 239000003566 sealing material Substances 0.000 claims 1
- 238000000992 sputter etching Methods 0.000 abstract description 3
- 238000003672 processing method Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 58
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 8
- 238000005498 polishing Methods 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 229910052786 argon Inorganic materials 0.000 description 4
- 239000005380 borophosphosilicate glass Substances 0.000 description 4
- 238000001312 dry etching Methods 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 239000002002 slurry Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 239000008119 colloidal silica Substances 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000012777 electrically insulating material Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000006911 nucleation Effects 0.000 description 1
- 238000010899 nucleation Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 150000003608 titanium Chemical class 0.000 description 1
- 229910021341 titanium silicide Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76804—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5226—Via connections in a multilevel interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Conductive Materials (AREA)
- Drying Of Semiconductors (AREA)
Abstract
Description
Claims (1)
- 【特許請求の範囲】 1.電気的に導電性を有するコンタクトプラグを基板に対して形成する半導体の 製造方法であって、該製造方法は、 基板を提供する過程と、 前記基板上に第一材料層を形成する過程と、 前記第一材料層内にコンタクト用開口を形成する過程、即ち、前記コンタク ト用開口がほぼ垂直な内部側壁部分を有する側壁及びほぼ垂直な内部側壁部分の 結合点において垂直から実質的に傾いて結合する外部方向に傾いた側壁外部部分 を有するコンタクト用開口を形成する過程と、 前記コンタクト用開口内および前記外部方向に傾いた側壁外部部分の上に導 電性材料を提供する過程と、 前記第一材料層を少なくとも前記結合点までエッチングする過程と、 を有することを特徴とする製造方法。 2.前記エッチングする過程が、前記基板と電気的に接続し且つ前記第一材料層 から外方に突出する導電性を有するコンタクトプラグを画定するように行われる ことを特徴とする請求項1記載の製造方法。 3.前記各過程が記載の順序で行われることを特徴とする請求項1記載の製造方 法。 4.前記導電性材料の提供が、 第一導電性材料を前記コンタクト用開口を完全には充填しないように形成す ることと、 第二導電性材料を前記第一導電性材料の上に形成すること、 からなることを特徴とする請求項1記載の製造方法。 5.前記第二導電性材料の形成が前記コンタクト用開口を完全に充填することを 特徴とする請求項4記載の製造方法。 6.前記第二導電性材料が前記第一導電性材料と異なることを特徴とする請求項 4記載の製造方法。 7.前記第一導電性材料がチタンからなり、前記第二導電性材料がタングステン からなることを特徴とする請求項4記載の製造方法。 8.電気的に導電性を有するコンタクトプラグを基板に対して形成する半導体の 製造方法であって、該製造方法は、 基板を提供する過程と、 前記基板上に第一材料層を形成する過程と、 前記第一材料層内にコンタクト用開口を形成する過程、即ち、前記コンタク ト用開口が第一の角度のテーパで外方に傾いた側壁を有し、前記外方に傾いた側 壁が内部ベース部分を有し、該内部ベース部分において前記第一の角度のテーパ が該第一の角度のテーパより小さい角度で第二の角度のテーパに変わる、コンタ クト用開口を形成する過程と、 前記コンタクト用開口内において前記外方に傾いた側壁の内部ベース部分を 越えて前記コンタクト用開口を充填するように導電性材料を提供する過程であっ て、前記導電性材料が前記第一の角度のテーパを有する前記外方に傾いた側壁の 少なくとも一部を覆うようになっている、導電性材料を提供する過程と、 前記導電性材料をエッチングする過程であって、少なくとも前記外方に傾い た側壁の内部ベース部分までエッチングして前記基板に電気的に接続するコンタ クトプラグを画定するようにエッチングする過程と、 を有することを特徴とする製造方法。 9.前記エッチングする過程が、前記第一材料層から外方に突出する電気的に導 電性を有するコンタクトプラグを画定するように行われることを特徴とする請求 項8記載の製造方法。 10.前記各過程が記載の順序で行われることを特徴とする請求項8記載の製造 方法。 11.前記導電性材料の提供が、 第一導電性材料を前記コンタクト用開口を完全には充填しないように形成す ることと、 第二導電性材料を前記第一導電性材料の上に形成すること、 からなることを特徴とする請求項8記載の製造方法。 12.前記第二導電性材料が前記第一導電性材料と異なることを特徴とする請求 項11記載の製造方法。 13.前記第一導電性材料がチタンからなることを特徴とする請求項12記載の 製造方法。 14.前記第二導電性材料がタングステンからなることを特徴とする請求項12 記載の製造方法。 15.電気的に導電性を有するコンタクトプラグを基板に対して形成する半導体 の製造方法であって、該製造方法は、 電気的接続が行われる基板の上に絶縁性材料層を形成する過程と、 前記絶縁性材料層の上にマスキング材料層を形成する過程と、 コンタクト開口パターンを画定するために前記マスキング材料層をパターン ニングする過程と、 前記絶縁性材料層に、前記コンタクト開口パターンを介してコンタクト用開 口をエッチングする過程であって、前記コンタクト用開口が前記基板に隣接して 最内部領域を有し該最内部領域の外方に最外部領域を有するようにコンタクト用 開口をエッチングする過程と、 前記コンタクト用開口をエッチングした後で、前記絶縁性材料層からマスキ ング材料を除去する過程と、 前記マスキング材料を除去した後、前記コンタクト用開口に隣接する前記絶 縁性材料層へエッチングする過程であって、前記最外部領域内に外方に傾いた側 壁を提供し、それにより前記最内部領域に比較して前記最外部領域を有効的に拡 張するようにし、前記の外方に傾いた側壁が内部ベース部分を有して、そこで前 記側壁が初めに形成された前記最内部領域に接合するようになる、エッチングす る過程と、 前記基板上と前記のエッチングされたコンタクト用開口内に前記コンタクト 用開口を完全には充填しないように導電性材料の第一層を堆積する過程と、 前記基板上と前記のエッチングされたコンタクト用開口内に前記コンタクト 用開口を完全に充填するように導電性材料の第二層を堆積する過程と、 前記基板に対して電気的に導電性を有するコンタクトプラグを画定するため に、前記導電性材料の第一及び二層並びに前記絶縁性材料層を少なくとも前記の 外方に傾いた側壁の内部ベース部分までエッチングする過程と、 を有することを特徴とする製造方法。 16.電気的に導電性を有するコンタクトプラグを基板に対して形成する半導体 の製造方法であって、該製造方法は、 電気的接続が行われる基板の上に絶縁性酸化物層を形成する過程と、 前記絶縁性酸化物層の上にマスキング材料層を形成する過程と、 コンタクト開口パターンを画定するために前記マスキング材料層をパターン ニングする過程と、 前記絶縁性酸化物層に、最外部領域を有するコンタクト用開口を、前記コン タクト開口パターンを介してエッチングする過程と 前記絶縁性酸化物層からマスキング材料を除去する過程と、 前記コンタクト用開口に隣接する前記絶縁酸化物層へエッチングする過程で あって、前記最外部領域内に外方に傾いた側壁を提供し、それにより前記最外部 領域を有効的に拡張するようにし、前記の外方に傾いた側壁が第一の角度のテー パと内部ベース部分を有して、該内部ベース部分において前記第一の角度 のテーパが該第一の角度のテーパより小さい角度で第二の角度のテーパに変わる ように、エッチングする過程と、 前記基板上と前記コンタクト用開口内に前記コンタクト用開口を完全には充 填しないように、前記第一の角度のテーパを有する前記の外方に傾いた側壁の少 なくとも一部を覆うチタン層を堆積する過程と、 前記基板上と前記コンタクト用開口内に前記コンタクト用開口を完全に充填 するように、タングステン層を形成する過程と、 前記基板に対して電気的に導電性を有するコンタクトプラグを画定するため に、前記チタン層、タングステン層、絶縁性酸化物層をエッチングする過程と、 とからなることを特徴とする製造方法。
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/391,719 | 1995-02-21 | ||
US08/391,719 US5580821A (en) | 1995-02-21 | 1995-02-21 | Semiconductor processing method of forming an electrically conductive contact plug |
US08/551,829 US5658829A (en) | 1995-02-21 | 1995-11-07 | Semiconductor processing method of forming an electrically conductive contact plug |
US08/551,829 | 1995-11-07 | ||
PCT/US1996/000929 WO1996026542A1 (en) | 1995-02-21 | 1996-01-23 | Semiconductor processing method of forming an electrically conductive contact plug |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH11500272A true JPH11500272A (ja) | 1999-01-06 |
JP3593133B2 JP3593133B2 (ja) | 2004-11-24 |
Family
ID=27013606
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP52568096A Expired - Fee Related JP3593133B2 (ja) | 1995-02-21 | 1996-01-23 | 電気的に導電性を有するコンタクトプラグの形成に関する半導体の製造方法 |
Country Status (7)
Country | Link |
---|---|
US (3) | US5658829A (ja) |
EP (1) | EP0811247B1 (ja) |
JP (1) | JP3593133B2 (ja) |
KR (1) | KR100399257B1 (ja) |
AT (1) | ATE224101T1 (ja) |
DE (1) | DE69623598T2 (ja) |
WO (1) | WO1996026542A1 (ja) |
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US20030015496A1 (en) * | 1999-07-22 | 2003-01-23 | Sujit Sharan | Plasma etching process |
US6274483B1 (en) * | 2000-01-18 | 2001-08-14 | Taiwan Semiconductor Manufacturing Company | Method to improve metal line adhesion by trench corner shape modification |
US6583053B2 (en) * | 2001-03-23 | 2003-06-24 | Texas Instruments Incorporated | Use of a sacrificial layer to facilitate metallization for small features |
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JP4348457B2 (ja) * | 2002-03-13 | 2009-10-21 | ドルビー ラボラトリーズ ライセンシング コーポレイション | 高ダイナミックレンジのディスプレイ、ディスプレイコントローラ及び画像表示方法 |
US7778812B2 (en) * | 2005-01-07 | 2010-08-17 | Micron Technology, Inc. | Selecting data to verify in hardware device model simulation test generation |
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ES2893327T3 (es) * | 2007-02-01 | 2022-02-08 | Dolby Laboratories Licensing Corp | Calibración de visualizadores que tienen luz de fondo espacialmente variable |
US20080213991A1 (en) * | 2007-03-02 | 2008-09-04 | Airdio Wireless Inc. | Method of forming plugs |
JP2009194195A (ja) * | 2008-02-15 | 2009-08-27 | Panasonic Corp | 半導体装置及びその製造方法 |
US20100214282A1 (en) * | 2009-02-24 | 2010-08-26 | Dolby Laboratories Licensing Corporation | Apparatus for providing light source modulation in dual modulator displays |
JP2011029552A (ja) * | 2009-07-29 | 2011-02-10 | Renesas Electronics Corp | 半導体装置およびその製造方法 |
US8691622B2 (en) * | 2012-05-25 | 2014-04-08 | Micron Technology, Inc. | Memory cells and methods of forming memory cells |
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US4372034B1 (en) * | 1981-03-26 | 1998-07-21 | Intel Corp | Process for forming contact openings through oxide layers |
FR2588417B1 (fr) * | 1985-10-03 | 1988-07-29 | Bull Sa | Procede de formation d'un reseau metallique multicouche d'interconnexion des composants d'un circuit integre de haute densite et circuit integre en resultant |
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EP0300414B1 (en) * | 1987-07-20 | 1994-10-12 | Nippon Telegraph And Telephone Corporation | Method of connecting wirings through connection hole |
US5320979A (en) * | 1987-07-20 | 1994-06-14 | Nippon Telegraph And Telephone Corporation | Method of connecting wirings through connection hole |
FR2630588A1 (fr) * | 1988-04-22 | 1989-10-27 | Philips Nv | Procede pour realiser une configuration d'interconnexion sur un dispositif semiconducteur notamment un circuit a densite d'integration elevee |
DE69023765T2 (de) * | 1990-07-31 | 1996-06-20 | Ibm | Verfahren zur Herstellung von Bauelementen mit übereinander angeordneten Feldeffekttransistoren mit Wolfram-Gitter und sich daraus ergebende Struktur. |
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US5970374A (en) * | 1996-10-18 | 1999-10-19 | Chartered Semiconductor Manufacturing Ltd. | Method for forming contacts and vias with improved barrier metal step-coverage |
-
1995
- 1995-11-07 US US08/551,829 patent/US5658829A/en not_active Expired - Lifetime
-
1996
- 1996-01-23 DE DE69623598T patent/DE69623598T2/de not_active Expired - Lifetime
- 1996-01-23 JP JP52568096A patent/JP3593133B2/ja not_active Expired - Fee Related
- 1996-01-23 EP EP96907011A patent/EP0811247B1/en not_active Expired - Lifetime
- 1996-01-23 WO PCT/US1996/000929 patent/WO1996026542A1/en active IP Right Grant
- 1996-01-23 AT AT96907011T patent/ATE224101T1/de not_active IP Right Cessation
- 1996-01-23 KR KR1019970705769A patent/KR100399257B1/ko not_active IP Right Cessation
-
1997
- 1997-06-13 US US08/874,642 patent/US5933754A/en not_active Expired - Lifetime
-
1999
- 1999-02-01 US US09/243,233 patent/US6245671B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US6245671B1 (en) | 2001-06-12 |
DE69623598D1 (de) | 2002-10-17 |
EP0811247A1 (en) | 1997-12-10 |
JP3593133B2 (ja) | 2004-11-24 |
DE69623598T2 (de) | 2003-05-28 |
ATE224101T1 (de) | 2002-09-15 |
EP0811247B1 (en) | 2002-09-11 |
WO1996026542A1 (en) | 1996-08-29 |
US5658829A (en) | 1997-08-19 |
US5933754A (en) | 1999-08-03 |
KR19980702371A (ko) | 1998-07-15 |
KR100399257B1 (ko) | 2003-12-18 |
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