JPH1140687A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH1140687A
JPH1140687A JP19117497A JP19117497A JPH1140687A JP H1140687 A JPH1140687 A JP H1140687A JP 19117497 A JP19117497 A JP 19117497A JP 19117497 A JP19117497 A JP 19117497A JP H1140687 A JPH1140687 A JP H1140687A
Authority
JP
Japan
Prior art keywords
substrate
reinforcing plate
resin substrate
adhesive
reinforcing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19117497A
Other languages
Japanese (ja)
Inventor
Hidekazu Hosomi
英一 細美
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP19117497A priority Critical patent/JPH1140687A/en
Publication of JPH1140687A publication Critical patent/JPH1140687A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Landscapes

  • Wire Bonding (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device which is improved in mounting yield and connection reliability, etc. SOLUTION: A semiconductor device is constituted by mounting a semiconductor chip 21 on a resin substrate 23 which is formed in a square shape and made of an epoxy resin filled with glass filter and sticking a reinforcing plate 29 of stainless steel, etc., to the surface of the substrate 23, and the reinforcing plate 29 is composed of four platy reinforcing members 31 which are separately arranged by respectively aligning their corner sections with the four corner sections of the substrate 23 and have broad L-shapes. Therefore, even when the reinforcing plate 29 and the substrate 23 are returned to a room temperature after they are maintained at a high temperature for a fixed period of time for curing an adhesive at the time of sticking the plate 29 to the substrate 23, the warping of the substrate 23 caused by the temperature change and the difference between the coefficients of thermal expansion of the plate 29 and substrate 23 at the time of curing the adhesive becomes smaller, and the connection between the semiconductor chip 21 and substrate 23 becomes surer at the time of mounting the chip 21 on the substrate 23, because the substrate 23 is reinforced by the plate 29 which is only stuck to the four corner sections of the substrate 23.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体チップを実
装した基板に補強板を固着し補強した半導体装置に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device in which a reinforcing plate is fixed to a substrate on which a semiconductor chip is mounted and reinforced.

【0002】[0002]

【従来の技術】周知の通り、ボールグリッドアレイ(B
all Grid Array;BGA)型パッケージ
の半導体装置(以下、BGAと記す。)は、パッケージ
の裏面に球形のはんだボールからなる多数の外部接続端
子を備えるパッケージで、多ピン化が可能であり、また
実装歩留も高いために広く利用されている。このような
BGAでは、通常、半導体チップと基板との接続にワイ
ヤボンディングを用いているが、さらに多ピン化を進め
るためにチップの接続技術にTAB(TapeAuto
mated Bonding)あるいはフリップチップ
を用いたBGAも開発されている。
2. Description of the Related Art As is well known, a ball grid array (B)
2. Description of the Related Art A semiconductor device (hereinafter, referred to as BGA) of an all grid array (BGA) type package is a package having a large number of external connection terminals formed of spherical solder balls on the back surface of the package, and is capable of increasing the number of pins. It is widely used because of its high mounting yield. In such a BGA, wire bonding is usually used to connect the semiconductor chip to the substrate. However, in order to further increase the number of pins, TAB (TapeAuto) is used in the chip connection technology.
BGA using mated bonding or flip chip has also been developed.

【0003】以下、従来技術を図面を参照して説明す
る。先ずTAB技術を用いたBGAの第1の従来例を図
10及び図11により説明する。図10は縦断面図であ
り、図11は横断面図である。図10及び図11におい
て、1は半導体チップで、その一面には複数のバンプ2
が設けられている。3はフィルム状、例えば100μm
以下の厚さに形成された正方形状のポリイミド樹脂等で
なる樹脂基板であり、4は樹脂基板3の表面に銅箔等を
被着して形成されたリードで、5は裏面に配列された外
部接続のための半田バンプである。そして半導体チップ
1は、バンプ2を対応するリード4の先端部に接続する
ことで樹脂基板3に搭載され、また半導体チップ1と樹
脂基板3とは、エポキシ系樹脂の封止樹脂6を塗布し、
硬化することによってバンプ2とリード4の接続部分を
封止するようにして一体化されている。
[0003] The prior art will be described below with reference to the drawings. First, a first conventional example of a BGA using the TAB technique will be described with reference to FIGS. FIG. 10 is a longitudinal sectional view, and FIG. 11 is a transverse sectional view. 10 and 11, reference numeral 1 denotes a semiconductor chip, and a plurality of bumps 2 are provided on one surface thereof.
Is provided. 3 is a film, for example, 100 μm
A resin substrate 4 made of a square-shaped polyimide resin or the like formed in the following thickness, 4 is a lead formed by coating a copper foil or the like on the surface of the resin substrate 3, and 5 is arranged on the back surface. These are solder bumps for external connection. The semiconductor chip 1 is mounted on the resin substrate 3 by connecting the bumps 2 to the tips of the corresponding leads 4. The semiconductor chip 1 and the resin substrate 3 are coated with an epoxy resin sealing resin 6. ,
By curing, the connection portion between the bump 2 and the lead 4 is sealed and integrated.

【0004】さらに、7は樹脂基板3の表面にエポキシ
系樹脂の接着剤8により接着された、例えばステンレス
鋼あるいは銅などによりなる補強板で、この補強板7の
形状は、外形形状が樹脂基板3と同じで、樹脂基板3の
中央部分に設けられている半導体チップ1を避けるよう
角枠状に形成され、枠幅は同一寸法となっている。そし
て、補強板7の接着の際、接着剤8を硬化させるために
高温に一定時間、例えば150℃でl時間、放置してお
き、接着剤8が硬化した後に常温にまで戻される。ま
た、9は補強板7の上面に接着剤10により接着された
同じくステンレス鋼あるいは銅などによりなる正方形状
のカバー板である。なお、このカバー板9の上面には半
導体チップ1の発熱量が大きい場合に図示しない放熱フ
ィンが固定されたり、また発熱量が大きくない場合には
カバー板9が設けられなかったりする。
[0004] Further, reference numeral 7 denotes a reinforcing plate made of, for example, stainless steel or copper, which is adhered to the surface of the resin substrate 3 with an epoxy resin adhesive 8. 3, it is formed in a rectangular frame shape so as to avoid the semiconductor chip 1 provided in the center portion of the resin substrate 3, and has the same frame width. When the reinforcing plate 7 is bonded, the adhesive 8 is left at a high temperature for a fixed time, for example, at 150 ° C. for one hour in order to cure the adhesive 8, and after the adhesive 8 is cured, the temperature is returned to normal temperature. Reference numeral 9 denotes a square cover plate made of stainless steel or copper, which is adhered to the upper surface of the reinforcing plate 7 with an adhesive 10. Note that a radiation fin (not shown) is fixed on the upper surface of the cover plate 9 when the heat generation amount of the semiconductor chip 1 is large, or the cover plate 9 is not provided when the heat generation amount is not large.

【0005】以上のように補強板7を樹脂基板3に固着
することで、たわみやすい樹脂基板3の補強がなされ、
移送や組み込み等の際に取り扱いやすくし、不良などの
発生を低減するようにしている。
[0005] By fixing the reinforcing plate 7 to the resin substrate 3 as described above, the flexible resin substrate 3 is reinforced.
It is easy to handle at the time of transportation and installation, and reduces the occurrence of defects.

【0006】しかしながら、上記の従来技術では、補強
板7を接着剤8によって樹脂基板3に接着する時、接着
剤8の硬化のために一定時間、高温に補強板7を接着し
た樹脂基板3は保持され、接着剤8の硬化後に常温にま
で戻されるが、樹脂基板3と接着剤8、あるいは樹脂基
板3と補強板7との間の熱膨張係数が異なるため、全体
に反りが生じるという問題が生じる。この時、補強板7
の熱膨張係数の方が樹脂基板3の熱膨張係数よりも大き
いため、補強板7を接着した樹脂基板3は半田バンプ5
が設けられた下方側に向け凸形となるように反る。この
結果、外部接続のための半田バンプ5が凸面に配列され
ることになり、半田バンプ5の高さが一定でなくなり、
平坦な実装面への確実な接続が困難となり、実装歩留が
低下したり、また接続の信頼性が低下してしまう虞があ
った。
However, according to the above-mentioned prior art, when the reinforcing plate 7 is bonded to the resin substrate 3 with the adhesive 8, the resin substrate 3 to which the reinforcing plate 7 has been bonded at a high temperature for a certain period of time to cure the adhesive 8 is formed. It is held and returned to room temperature after the adhesive 8 is hardened, but the resin substrate 3 and the adhesive 8 or the thermal expansion coefficient between the resin substrate 3 and the reinforcing plate 7 are different, so that a problem of warpage occurs as a whole. Occurs. At this time, the reinforcing plate 7
Is larger than the thermal expansion coefficient of the resin substrate 3, the resin substrate 3 to which the reinforcing plate 7 is bonded
Are provided so as to be convex toward the lower side. As a result, the solder bumps 5 for external connection are arranged on a convex surface, and the height of the solder bumps 5 is not constant.
Reliable connection to a flat mounting surface becomes difficult, and there is a possibility that the mounting yield may be reduced or the reliability of the connection may be reduced.

【0007】次に、フリップチップ技術を用いたBGA
の第2の従来例を図12乃至図14により説明する。図
12は縦断面図であり、図13は横断面図であり、図1
4は補強板を接着した樹脂基板の反りのシミュレーショ
ン結果を模式的に示す図である。図12乃至図14図に
おいて、11は消費電力が比較的大きい半導体チップ
で、その一面には複数のバンプ2が設けられている。1
2は、例えば厚さが400μm以上に形成された正方形
状のガラスフィラー入りエポキシ樹脂等を用いてなる樹
脂基板で、その表面には複数のパッド13が設けられて
おり、また裏面には外部接続のための半田バンプ5が配
列されている。そして半導体チップ11は樹脂基板12
に、バンプ2を対応するパッド13に半田付けにより接
続することで搭載され、また半導体チップ11と樹脂基
板12とは、両者の間の間隙にエポキシ樹脂系の封止樹
脂14を充填し、硬化することによって一体化されてい
る。
Next, a BGA using flip chip technology
The second conventional example will be described with reference to FIGS. FIG. 12 is a longitudinal sectional view, FIG. 13 is a transverse sectional view, and FIG.
FIG. 4 is a diagram schematically showing a simulation result of warpage of the resin substrate to which the reinforcing plate is bonded. 12 to 14, reference numeral 11 denotes a semiconductor chip having relatively large power consumption, and a plurality of bumps 2 are provided on one surface thereof. 1
Reference numeral 2 denotes a resin substrate made of, for example, a square-shaped epoxy resin containing glass filler having a thickness of 400 μm or more, on the surface of which a plurality of pads 13 are provided, and on the back surface, an external connection Solder bumps 5 are arranged. And the semiconductor chip 11 is a resin substrate 12
The semiconductor chip 11 and the resin substrate 12 are mounted by connecting the bumps 2 to the corresponding pads 13 by soldering, and a gap between the two is filled with an epoxy resin-based sealing resin 14 and cured. Are integrated.

【0008】さらに、15は樹脂基板12の表面にエポ
キシ樹脂系の接着剤8により接着されたステンレス鋼あ
るいは銅などによりなる補強板で、この補強板15の形
状は、外形形状が樹脂基板12と同じで、樹脂基板12
の中央部分に設けられている半導体チップ11を避ける
よう角枠状に形成され、枠幅は同一寸法となっている。
そして、補強板15の接着の際、接着剤8を硬化させる
ために高温に一定時間、例えば150℃でl時間、放置
しておき、接着剤8が硬化した後に常温にまで戻され
る。また、補強板15と半導体チップ11の上面には同
じくステンレス鋼あるいは銅などによりなる正方形状の
カバー板9が接着剤10により接着されており、さら
に、このカバー板9の上面には図示しない放熱フィンが
固着されている。
Reference numeral 15 denotes a reinforcing plate made of stainless steel, copper, or the like, which is bonded to the surface of the resin substrate 12 with an epoxy resin-based adhesive 8. The reinforcing plate 15 has an outer shape similar to that of the resin substrate 12. Same, resin substrate 12
Are formed in a rectangular frame shape so as to avoid the semiconductor chip 11 provided in the central portion of the frame, and have the same frame width.
When the reinforcing plate 15 is bonded, the adhesive 8 is left at a high temperature for a fixed time, for example, at 150 ° C. for 1 hour in order to cure the adhesive, and after the adhesive 8 is cured, the temperature is returned to normal temperature. A square cover plate 9 also made of stainless steel or copper is adhered to the upper surface of the reinforcing plate 15 and the semiconductor chip 11 by an adhesive 10. Fins are fixed.

【0009】しかし、このように構成されたものでは、
樹脂基板12の厚さが比較的厚くたわみ難いものである
が、補強板15を接着剤8によって樹脂基板12に接着
する時、接着剤8の硬化のために一定時間、高温に補強
板15を接着した樹脂基板12は保持され、接着剤8の
硬化後に常温にまで戻されるた時、樹脂基板12と接着
剤8、あるいは樹脂基板12と補強板15との間の熱膨
張係数が異なるため、第1の従来例と同様に全体に反り
が生じるという問題が生じる。
[0009] However, in such a configuration,
Although the thickness of the resin substrate 12 is relatively thick and difficult to bend, when the reinforcing plate 15 is bonded to the resin substrate 12 with the adhesive 8, the reinforcing plate 15 is heated at a high temperature for a certain time to cure the adhesive 8. The bonded resin substrate 12 is held, and when the temperature of the adhesive 8 is returned to room temperature after curing, the thermal expansion coefficient between the resin substrate 12 and the adhesive 8 or between the resin substrate 12 and the reinforcing plate 15 is different. As in the first conventional example, there is a problem that the entire body is warped.

【0010】そして、この補強板15を上面に接着した
樹脂基板12の反りをシミュレーションした結果は図1
4に示すようになる。図14は厚さが0.4mmで枠幅
が8mmの補強板15を接着した厚さが1.0mmで4
0mm角の樹脂基板12の1/4部分を示すもので、半
導体チップ11を省いた状態となっており、150℃の
温度で接着剤8を硬化させた状態では2点鎖線で示す形
状であったものが、25℃まで温度を低下させたときに
は実線で示すように、樹脂基板12は下方に向けて凸形
となるように反り、角部での反りの大きさは81μmと
なっている。このように反りが生じた補強板15を接着
した樹脂基板12では、外部接続のための半田バンプ5
が凸面に配列されることになり、半田バンプ5の高さが
一定でなくなり、平坦な実装面への確実な半田付けによ
る接続が困難となり、実装歩留が低下したり、接続の信
頼性が低下してしまう虞があった。
A simulation result of the warpage of the resin substrate 12 having the reinforcing plate 15 adhered to the upper surface is shown in FIG.
As shown in FIG. FIG. 14 shows a case where a reinforcing plate 15 having a thickness of 0.4 mm and a frame width of 8 mm is adhered and the
It shows a quarter portion of the 0 mm square resin substrate 12, in which the semiconductor chip 11 is omitted, and in a state in which the adhesive 8 is cured at a temperature of 150 ° C., the shape is shown by a two-dot chain line. However, when the temperature is lowered to 25 ° C., as shown by the solid line, the resin substrate 12 warps so as to be convex downward, and the size of the warpage at the corner is 81 μm. In the resin substrate 12 to which the warped reinforcing plate 15 is bonded, the solder bumps 5 for external connection are provided.
Are arranged on a convex surface, so that the height of the solder bumps 5 is not constant, and it is difficult to securely connect to a flat mounting surface by soldering, so that the mounting yield is reduced or the connection reliability is reduced. There is a possibility that it will decrease.

【0011】[0011]

【発明が解決しようとする課題】上記のような状況に鑑
みて本発明はなされたもので、その目的とするところは
補強板を接着した樹脂基板の反り量をより小さくするよ
うにして、実装歩留を向上させると共に、実装時におけ
る接続の信頼性を向上させた半導体装置を提供すること
にある。
SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object to reduce the amount of warpage of a resin substrate to which a reinforcing plate is adhered, and to mount the resin substrate. An object of the present invention is to provide a semiconductor device in which the yield is improved and the connection reliability during mounting is improved.

【0012】[0012]

【課題を解決するための手段】本発明の半導体装置は、
多角形状の基板上に半導体チップを実装すると共に、基
板面に補強板を固着してなる半導体装置において、補強
板は、基板への固着面積が該基板の角部側で大きくなる
よう偏在するものであることを特徴とする物であり、さ
らに、基板が方形状であると共に、補強板が基板の四隅
角部近傍にそれぞれ固着された補強部材によってのみな
るものであることを特徴とするものであり、さらにま
た、補強板は、四隅角部の補強部材が同一形状をなすも
のであることを特徴とするものであり、さらに、補強板
は、基板と略同外形を有する枠形状をなすものであっ
て、枠幅が該基板の角部側で広くなっていることを特徴
とするものであり、さらに、基板が長方形状であると共
に、補強板が前記基板の両短辺に沿ってそれぞれ固着さ
れた補強部材によりなるものであることを特徴とするも
のであり、さらにまた、補強板は、両短辺の補強部材が
同一形状をなすものであって、該補強部材の幅が基板の
角部側で広くなるよう形成されていることを特徴とする
ものである。
According to the present invention, there is provided a semiconductor device comprising:
In a semiconductor device in which a semiconductor chip is mounted on a polygonal substrate and a reinforcing plate is fixed to the substrate surface, the reinforcing plate is unevenly distributed so that the fixing area to the substrate becomes larger on the corner side of the substrate. Further, the substrate is rectangular, and the reinforcing plate is formed only by reinforcing members respectively fixed near the four corners of the substrate. Yes, the reinforcing plate is characterized in that the reinforcing members at the four corners have the same shape, and the reinforcing plate has a frame shape having substantially the same outer shape as the substrate. Wherein the frame width is wider on the corner side of the substrate, and furthermore, the substrate is rectangular, and the reinforcing plates are respectively provided along both short sides of the substrate. With the reinforcing member fixed The reinforcing plate is further characterized in that the reinforcing members on both short sides have the same shape, and the width of the reinforcing member is increased on the corner side of the substrate. It is characterized by being formed.

【0013】[0013]

【発明の実施の形態】以下、本発明の実施形態を図面を
参照して説明する。
Embodiments of the present invention will be described below with reference to the drawings.

【0014】先ず、フリップチップ技術を用いたBGA
型パッケージの半導体装置(以下、BGAと記す。)の
第1の実施形態を図1乃至図4により説明する。図1は
縦断面図であり、図2は横断面図であり、図3は補強板
を接着した樹脂基板の反りのシミュレーション結果を模
式的に示す図であり、図4は変形形態の横断面図であ
る。
First, a BGA using flip chip technology
A first embodiment of a semiconductor device (hereinafter, referred to as BGA) of a die package will be described with reference to FIGS. 1 is a longitudinal sectional view, FIG. 2 is a transverse sectional view, FIG. 3 is a view schematically showing a simulation result of warpage of a resin substrate to which a reinforcing plate is adhered, and FIG. FIG.

【0015】図1乃至図4において、21は消費電力が
比較的大きい正方形状の半導体チップで、その一面には
複数のバンプ22が設けられている。23は、例えば厚
さが1.0mmで40mm角の正方形状に形成されたガ
ラスフィラー入りエポキシ樹脂でなる樹脂基板で、その
上面24には複数のパッド25が設けられており、また
下面26には外部接続のための複数の半田バンプ27が
配列されている。
1 to 4, reference numeral 21 denotes a square semiconductor chip having relatively large power consumption, and a plurality of bumps 22 are provided on one surface thereof. Reference numeral 23 denotes a resin substrate made of, for example, a glass filler-filled epoxy resin having a thickness of 1.0 mm and a square shape of 40 mm square, a plurality of pads 25 are provided on an upper surface 24, and a lower surface 26 is provided on a lower surface 26. Has a plurality of solder bumps 27 arranged for external connection.

【0016】そして半導体チップ21は樹脂基板23の
所定位置に、バンプ22を対応するパッド25に載せた
後に、リフローで溶融させるなどして半田付けにより接
続することによりフェースダウン形に搭載される。また
半導体チップ21と樹脂基板23とは、60℃〜70℃
の加温状態で両者の間の間隙にエポキシ樹脂系の封止樹
脂28が注入され、毛細管現象により間隙全体に充填さ
れ、その後に、150℃の温度で1時間加熱され、封止
樹脂28が硬化することによって一体化されている。
The semiconductor chip 21 is mounted in a predetermined position on the resin substrate 23 by mounting the bumps 22 on the corresponding pads 25 and then connecting the bumps 22 by soldering such as by melting by reflow or the like. In addition, the semiconductor chip 21 and the resin substrate 23 are at
In the heated state, an epoxy resin-based sealing resin 28 is injected into a gap between the two, and the entire gap is filled by capillary action. Thereafter, the sealing resin 28 is heated at a temperature of 150 ° C. for 1 hour, and the sealing resin 28 is heated. It is integrated by curing.

【0017】さらに、29は樹脂基板23の上面24に
エポキシ樹脂系の接着剤30により接着された、例えば
SUS304等のステンレス鋼あるいは銅などにより形
成された厚さが0.4mmの補強板である。この補強板
29は、樹脂基板23の4隅角部に各隅角を合致させる
ようそれぞれ分割配置された太L字形状の板状の補強部
材31でなり、同一形状に形成された各補強部材31の
形状寸法は、配置時に樹脂基板23の辺に合致する方向
の長さaは12mmであり、幅bが8mmとなってい
る。
Reference numeral 29 denotes a reinforcing plate having a thickness of 0.4 mm formed of, for example, stainless steel such as SUS304 or copper or the like, which is adhered to the upper surface 24 of the resin substrate 23 with an epoxy resin adhesive 30. . The reinforcing plate 29 is composed of a thick L-shaped plate-like reinforcing member 31 that is divided and arranged so as to match each corner with four corners of the resin substrate 23, and each reinforcing member formed in the same shape. Regarding the shape and dimensions of 31, the length a in the direction corresponding to the side of the resin substrate 23 at the time of arrangement is 12 mm, and the width b is 8 mm.

【0018】そして、補強板29の接着は、各補強部材
31を樹脂基板23の4隅角部の所定位置に接着剤30
を塗布して載せた後、接着剤30を硬化させるために高
温に一定時間、例えば150℃の温度でl時間、加熱放
置しておき、接着剤30が硬化した後に常温にまで戻さ
れる。また、補強板29と半導体チップ21の上面には
同じくステンレス鋼あるいは銅などによりなる樹脂基板
23と同じ正方形状のカバー板32が接着剤33により
接着されており、さらに、このカバー板32の上面には
図示しない放熱フィンが固着されている。
Then, the reinforcing plate 29 is bonded by bonding the reinforcing members 31 to the adhesive 30 at predetermined positions at the four corners of the resin substrate 23.
After the adhesive 30 is applied and placed, the adhesive 30 is heated and left at a high temperature for a fixed time, for example, at a temperature of 150 ° C. for 1 hour, and is returned to normal temperature after the adhesive 30 is cured. On the upper surfaces of the reinforcing plate 29 and the semiconductor chip 21, a square cover plate 32, which is the same as the resin substrate 23 also made of stainless steel or copper, is adhered by an adhesive 33. A radiation fin (not shown) is fixed to the fin.

【0019】このように構成されたものでは、樹脂基板
23の厚さが比較的厚くたわみ難いものであるため、補
強板29を4つの補強部材31として樹脂基板23の4
隅角部に分割配置しても樹脂基板23が簡単に変形して
しまうことがなく、移送や組み込み等の際に取り扱いや
すく、不良などの発生の虞が少ない。また、補強板29
を接着剤30によって樹脂基板23に接着する際、接着
剤30の硬化のために一定時間、高温に補強板29を接
着した樹脂基板23が保持され、接着剤30の硬化後に
常温にまで戻されるた時、樹脂基板23と接着剤30、
あるいは樹脂基板23と補強板29の各補強部材31と
の間の熱膨張係数の差で全体に反りが生じる。
In such a structure, since the thickness of the resin substrate 23 is relatively large and it is difficult to bend, the reinforcing plate 29 is used as the four reinforcing members 31 as four reinforcing members 31 of the resin substrate 23.
Even if the resin substrate 23 is divided and arranged at the corners, the resin substrate 23 is not easily deformed, is easy to handle at the time of transfer or installation, and the likelihood of occurrence of defects is reduced. Also, the reinforcing plate 29
Is bonded to the resin substrate 23 with the adhesive 30, the resin substrate 23 to which the reinforcing plate 29 is adhered is kept at a high temperature for a certain period of time for curing the adhesive 30, and is returned to room temperature after the adhesive 30 is cured. When the resin substrate 23 and the adhesive 30,
Alternatively, the entire board is warped due to a difference in thermal expansion coefficient between the resin substrate 23 and each reinforcing member 31 of the reinforcing plate 29.

【0020】しかし、この4つの補強部材31でなる補
強板29を接着した樹脂基板23に生じる反りは、シミ
ュレーションの結果、図3に示す通りとなっている。す
なわち、図3は半導体チップ21を省いた状態の補強板
29を接着した樹脂基板23の1/4部分を示すもの
で、150℃の温度で接着剤30を硬化させた状態では
2点鎖線で示す形状であったものが、25℃まで温度を
低下させたときには実線で示すように、樹脂基板23は
下方に向けて少し凸形となるように反る。そして、樹脂
基板23の角部での反りの大きさは12.3μmで非常
に小さなものとなっている。このように樹脂基板23の
反り量が小さいので、凸面状となった樹脂基板23の下
面26に配列された半田バンプ27の高さの差は小さ
く、平坦な実装面に対しても半田付けによる接続を確実
に行うことができ、実装歩留は向上し、接続の信頼性も
向上したものとなる。
However, as a result of the simulation, the warpage generated in the resin substrate 23 to which the reinforcing plate 29 made of the four reinforcing members 31 is adhered is as shown in FIG. That is, FIG. 3 shows a quarter portion of the resin substrate 23 to which the reinforcing plate 29 is adhered without the semiconductor chip 21. When the adhesive 30 is cured at a temperature of 150 ° C., it is indicated by a two-dot chain line. When the temperature is lowered to 25 ° C., the resin substrate 23 warps so as to be slightly convex downward as shown by a solid line. The warpage at the corners of the resin substrate 23 is very small at 12.3 μm. Since the amount of warpage of the resin substrate 23 is small as described above, the difference in height between the solder bumps 27 arranged on the lower surface 26 of the resin substrate 23 having a convex shape is small, and the solder bump 27 is also soldered to a flat mounting surface. The connection can be reliably performed, the mounting yield is improved, and the reliability of the connection is also improved.

【0021】なお、上記の第1の実施形態では、補強板
29を太L字形状の4つの補強部材31に分割して樹脂
基板23の4隅角部に配置したが、これに限るものでは
なく、例えば図4に示す変形形態のように補強板29a
を4つの同じ直角二等辺三角形の板状の補強部材31a
で構成し、各補強部材31aを樹脂基板23の4隅角部
に配置するようにしても、第1の実施形態と同様の作
用、効果を得ることができる。
In the first embodiment, the reinforcing plate 29 is divided into four thick L-shaped reinforcing members 31 and arranged at the four corners of the resin substrate 23. However, the present invention is not limited to this. However, for example, as shown in a modification shown in FIG.
Into four identical right-angled isosceles triangular plate-like reinforcing members 31a.
Even if the reinforcing members 31a are arranged at the four corners of the resin substrate 23, the same operation and effect as those of the first embodiment can be obtained.

【0022】次に、フリップチップ技術を用いたBGA
で、補強板の構成が異なる以外は第1の実施形態と同様
に構成された第2の実施形態を図5乃至図8により説明
する。図5は横縦断面図であり、図6は補強板を接着し
た樹脂基板の反りのシミュレーション結果を模式的に示
す図であり、図7は第1の変形形態の横断面図であ横断
面図であり、図8は第2の変形形態の横断面図である。
なお、第1の実施形態と同一部分には同一符号を付して
説明を省略し、異なる本実施形態の構成について説明す
る。
Next, a BGA using flip chip technology
A second embodiment configured in the same manner as the first embodiment except that the configuration of the reinforcing plate is different will be described with reference to FIGS. FIG. 5 is a horizontal and vertical sectional view, FIG. 6 is a view schematically showing a simulation result of warpage of a resin substrate to which a reinforcing plate is adhered, and FIG. 7 is a horizontal sectional view of a first modified embodiment. FIG. 8 is a cross-sectional view of the second modification.
The same parts as those in the first embodiment are denoted by the same reference numerals, and description thereof will be omitted. A different configuration of the present embodiment will be described.

【0023】図5乃至図8において、34は樹脂基板2
3の上面24にエポキシ樹脂系の接着剤により接着され
た、例えばSUS304等のステンレス鋼あるいは銅な
どにより形成された厚さが0.4mmの補強板である。
この補強板34は、その外形形状が樹脂基板23と同じ
で、樹脂基板23の中央部分に設けられている半導体チ
ップ21を避けるよう角枠状に形成され、4隅角部に枠
幅cが8mmの広幅部35を有すると共に、これら4つ
の広幅部35に連設する広幅部35より枠幅が狭く枠幅
dが2mmの狭幅部36を備えたものとなっている。す
なわち、補強板34は樹脂基板23の角部側で枠幅が広
く、樹脂基板23への補強板34の接着は、角部側ほど
接着面積が大きくなっている。
5 to 8, reference numeral 34 denotes a resin substrate 2
3 is a reinforcing plate having a thickness of 0.4 mm formed of, for example, stainless steel such as SUS304 or copper or the like, which is adhered to the upper surface 24 of the third member 3 with an epoxy resin adhesive.
The reinforcing plate 34 has the same outer shape as the resin substrate 23, and is formed in a square frame shape so as to avoid the semiconductor chip 21 provided at the central portion of the resin substrate 23, and the frame width c is formed at four corners. It has a wide portion 35 of 8 mm, and a narrow portion 36 having a narrower frame width and a frame width d of 2 mm than the wide portions 35 connected to these four wide portions 35. In other words, the reinforcing plate 34 has a wider frame width at the corner of the resin substrate 23, and the bonding area of the reinforcing plate 34 to the resin substrate 23 is larger at the corner.

【0024】そして、補強板34の接着は、広幅部35
を樹脂基板23の4隅角部に合わせるように接着剤を塗
布して載せた後、接着剤を硬化させるために高温に一定
時間、例えば150℃の温度でl時間、加熱放置してお
き、接着剤が硬化した後に常温にまで戻される。また、
補強板34と半導体チップ21の上面には図示しないが
ステンレス鋼あるいは銅などによりなる樹脂基板23と
同じ正方形状のカバー板が接着剤により接着されてお
り、さらに、このカバー板の上面に放熱フィンが固着さ
れている。
The reinforcing plate 34 is bonded to the wide portion 35.
After applying an adhesive so as to match the four corners of the resin substrate 23 and placing the same, it is left to heat at a high temperature for a certain time, for example, at 150 ° C. for one hour to cure the adhesive, After the adhesive is cured, it is returned to room temperature. Also,
Although not shown, a square cover plate, which is the same as the resin substrate 23 made of stainless steel or copper, is adhered to the upper surfaces of the reinforcing plate 34 and the semiconductor chip 21 with an adhesive. Is fixed.

【0025】このように構成されたものでは、樹脂基板
23の厚さが比較的厚くたわみ難いものであり、補強板
34が角枠状であるため、たわみ難く取扱い時に簡単に
変形してしまうことがなく、第1の実施形態より移送や
組み込み等の際に取り扱いやすく、不良などの発生の虞
が少ない。さらに、第1の実施形態が4つの補強部材で
補強板を構成しているのに対し、上記の補強板34が角
枠状であるため、補強板34の接着工程に要する時間が
短くてすむ。また、補強板34を接着剤によって樹脂基
板23に接着する際、接着剤の硬化のために一定時間、
高温に補強板34を接着した樹脂基板23が保持され、
接着剤の硬化後に常温にまで戻されるた時、樹脂基板2
3と接着剤、あるいは樹脂基板23と補強板34との間
の熱膨張係数の差で全体に反りが生じる。
In such a structure, the thickness of the resin substrate 23 is relatively large and is hard to bend. Since the reinforcing plate 34 has a square frame shape, it is hard to bend and easily deformed during handling. Therefore, it is easier to handle at the time of transporting and assembling than in the first embodiment, and the possibility of occurrence of defects is reduced. Furthermore, while the first embodiment forms a reinforcing plate with four reinforcing members, the reinforcing plate 34 has a square frame shape, so that the time required for the bonding step of the reinforcing plate 34 can be reduced. . When the reinforcing plate 34 is bonded to the resin substrate 23 with an adhesive, the adhesive is cured for a certain period of time.
The resin substrate 23 to which the reinforcing plate 34 is bonded at a high temperature is held,
When the temperature of the adhesive is returned to room temperature after curing, the resin substrate 2
3 and an adhesive, or a difference in thermal expansion coefficient between the resin substrate 23 and the reinforcing plate 34 causes a warp as a whole.

【0026】しかし、この広幅部35と狭幅部36とで
構成された補強板34を接着した樹脂基板23に生じる
反りは、シミュレーションの結果、図6に示す通りとな
っている。すなわち、図6は半導体チップ21を省いた
状態の補強板34を接着した樹脂基板23の1/4部分
を示すもので、150℃の温度で接着剤30を硬化させ
た状態では2点鎖線で示す形状であったものが、25℃
まで温度を低下させたときには実線で示すように、樹脂
基板23は下方に向けて凸形となるように反る。そし
て、樹脂基板23の角部での反りの大きさは66.8μ
mで小さなものとなっている。このように樹脂基板23
の反り量が小さいので、凸面状となった樹脂基板23の
下面に配列された半田バンプの高さの差は小さく、平坦
な実装面に対しても半田付けによる接続を比較的確実に
行うことができ、実装歩留は向上し、接続の信頼性も向
上したものとなる。
However, as a result of the simulation, the warpage generated in the resin substrate 23 to which the reinforcing plate 34 composed of the wide portion 35 and the narrow portion 36 is adhered is as shown in FIG. That is, FIG. 6 shows a quarter of the resin substrate 23 to which the reinforcing plate 34 is adhered with the semiconductor chip 21 omitted, and in a state where the adhesive 30 is cured at a temperature of 150 ° C. The shape shown was changed to 25 ° C
When the temperature is lowered, the resin substrate 23 warps so as to be convex downward as indicated by the solid line. The size of the warp at the corner of the resin substrate 23 is 66.8 μm.
m is small. Thus, the resin substrate 23
Is small, the difference in height between the solder bumps arranged on the lower surface of the resin substrate 23 having a convex shape is small, and the connection by soldering can be relatively reliably performed even on a flat mounting surface. As a result, the mounting yield is improved, and the connection reliability is also improved.

【0027】なお、上記の第2の実施形態では、補強板
34を枠幅が広幅部35と狭幅部36の2段階に変化す
るものとしたが、これに限るものではなく、例えば図7
に示す第1の変形形態のように補強板34aを、その枠
幅が角部に向けて漸増するように構成したり、図8に示
す第2の変形形態のように補強板34bを、枠の中間部
に枠幅が狭幅の定幅部37、角部側に枠幅が角部に向け
て漸増し定幅部37より広幅の増幅部38を設けるよう
に構成しても、第2の実施形態と同様の作用、効果を得
ることができる。また、上記のものはフリップチップ技
術を用いたBGAであるが、枠幅が広幅部35と狭幅部
36の2段階に変化する補強板34と同様形状に形成さ
れた補強板をTAB技術を用いたBGAに対して適用し
た場合には、樹脂基板がフィルム状の薄いものでそのま
まではたわみやすいが、表面に固着した補強板が角枠状
で樹脂基板の辺部分も補強されるのでたわみ難くなり、
取扱い時に簡単に変形してしまうことがなくなり、移送
や組み込み等の際に取り扱いやすく、不良などの発生の
虞が少なくなる。
In the second embodiment, the reinforcing plate 34 has the frame width changed in two steps of the wide portion 35 and the narrow portion 36. However, the present invention is not limited to this.
The reinforcement plate 34a is configured so that its frame width gradually increases toward the corners as in the first modification shown in FIG. 8, or the reinforcement plate 34b is attached to the frame as in the second modification shown in FIG. Even if it is configured such that the frame width is gradually increased toward the corner portion and the amplification portion 38 whose width is wider than the constant width portion 37 is provided on the corner portion side, The same operation and effect as those of the embodiment can be obtained. Further, the above-mentioned BGA is a BGA using the flip chip technology. However, the reinforcing plate formed in the same shape as the reinforcing plate 34 whose frame width changes in two stages of the wide portion 35 and the narrow portion 36 is formed by the TAB technology. When applied to the BGA used, the resin substrate is a thin film-shaped one and easily bends as it is, but the reinforcing plate fixed to the surface is square frame-shaped and the side portions of the resin substrate are also reinforced, so it is hard to bend. Become
It is not easily deformed at the time of handling, so that it is easy to handle at the time of transporting or assembling, and the possibility of occurrence of defects is reduced.

【0028】次に、フリップチップ技術を用いたBGA
の第3の実施形態を図9により説明する。図9は横断面
図である。
Next, a BGA using flip chip technology
The third embodiment will be described with reference to FIG. FIG. 9 is a cross-sectional view.

【0029】図9において、41は消費電力が比較的大
きい長方形状の半導体チップで、図示しないがその一面
には複数のバンプが設けられている。42は長方形状に
形成されたガラスフィラー入りエポキシ樹脂でなる樹脂
基板で、同様に図示しないがその上面には複数のパッド
が設けられており、また下面には外部接続のための複数
の半田バンプが配列されている。
In FIG. 9, reference numeral 41 denotes a rectangular semiconductor chip having relatively large power consumption, which is not shown, and has a plurality of bumps provided on one surface thereof. Reference numeral 42 denotes a resin substrate made of epoxy resin containing glass filler formed in a rectangular shape. Similarly, although not shown, a plurality of pads are provided on the upper surface, and a plurality of solder bumps for external connection are provided on the lower surface. Are arranged.

【0030】そして半導体チップ41は樹脂基板42の
所定位置に、バンプを対応するパッドに載せた後に、リ
フローで溶融させるなどして半田付けにより接続するこ
とによりフェースダウン形に搭載される。また半導体チ
ップ41と樹脂基板42とは、60℃〜70℃の加温状
態で両者の間の間隙にエポキシ樹脂系の封止樹脂43が
注入され、毛細管現象により間隙全体に充填され、その
後に、150℃の温度で1時間加熱され、封止樹脂43
が硬化することによって一体化されている。
The semiconductor chip 41 is mounted in a predetermined position on the resin substrate 42 in a face-down manner by placing bumps on corresponding pads and then connecting them by soldering such as by melting by reflow. Further, the epoxy resin sealing resin 43 is injected into the gap between the semiconductor chip 41 and the resin substrate 42 in a heated state at 60 ° C. to 70 ° C., and the entire gap is filled by capillary action. , Heated at a temperature of 150 ° C. for one hour,
Are integrated by curing.

【0031】さらに、44は樹脂基板42の上面両短辺
部分のみにエポキシ樹脂系の接着剤により接着された、
例えばSUS304等のステンレス鋼あるいは銅などに
より形成された補強板である。この補強板44は、樹脂
基板42の両短辺部分の上面に短辺と両端角部を一致さ
せるように分割配置された同一形状の補強部材45でな
り、この補強部材45は、両端に略直角三角形状の広幅
部46と、広幅部46を連設する中間部分に狭幅部47
とを備えたものとなっている。なお、これによって樹脂
基板42の両長辺部分の中間部に、補強板44が固着さ
れていない部分が形成されている。
Further, reference numeral 44 denotes an epoxy resin-based adhesive bonded only to both short sides of the upper surface of the resin substrate 42.
For example, it is a reinforcing plate formed of stainless steel such as SUS304 or copper. The reinforcing plate 44 is made of a reinforcing member 45 of the same shape which is divided and arranged on the upper surface of both short side portions of the resin substrate 42 so that the short side and the corners at both ends coincide with each other. A wide portion 46 having a right-angled triangle shape, and a narrow portion 47 at an intermediate portion where the wide portion 46 is continuously provided.
It is provided with. In this way, a portion where the reinforcing plate 44 is not fixed is formed at an intermediate portion between both long side portions of the resin substrate 42.

【0032】そして、補強板44の接着は、補強部材4
5に接着剤を塗布し樹脂基板42の所定位置に載せた
後、接着剤を硬化させるために高温に一定時間、例えば
150℃の温度でl時間、加熱放置しておき、接着剤が
硬化した後に常温にまで戻される。また、補強板44と
半導体チップ41の上面には同じくステンレス鋼あるい
は銅などによりなる樹脂基板42と同じ長方形状の図示
しないカバー板が接着剤により接着されており、さら
に、このカバー板の上面には図示しない放熱フィンが固
着されている。
The reinforcing plate 44 is bonded to the reinforcing member 4.
After applying the adhesive to 5 and placing it on a predetermined position of the resin substrate 42, the adhesive was cured by leaving it at a high temperature for a certain period of time, for example, at 150 ° C. for 1 hour, to cure the adhesive. Later, it is returned to room temperature. On the upper surfaces of the reinforcing plate 44 and the semiconductor chip 41, a cover plate (not shown) having the same rectangular shape as the resin substrate 42 also made of stainless steel or copper is adhered by an adhesive. Are radiating fins (not shown).

【0033】このように構成されたものでは、樹脂基板
42の厚さが比較的厚くたわみ難いものであり、補強板
44が樹脂基板42の両短辺部分の上面に補強部材45
を設けるようにしてなるものであるため、たわみ難く取
扱い時に簡単に変形してしまうことがない。そして、補
強板44は、樹脂基板42の両短辺部分に補強部材45
を分割配置したもので、4隅角部に各隅角を合致させて
分割配置するよう構成するようにしたものよりも移送や
組み込み等の際に取り扱いやすく、不良などの発生の虞
が少なく、さらに、2つの補強部材45で構成したもの
であるため、補強板44の接着工程に要する時間が短く
てすむ。また、補強板44を接着剤によって樹脂基板4
2に接着する際、接着剤の硬化のために一定時間、高温
に補強板44を接着した樹脂基板42が保持され、接着
剤の硬化後に常温にまで戻されるた時、樹脂基板42と
接着剤、あるいは樹脂基板42と補強板44との間の熱
膨張係数の差で全体に反りが生じる。
In such a configuration, the thickness of the resin substrate 42 is relatively large and it is difficult to bend, and the reinforcing plate 44 is provided on the upper surface of both short side portions of the resin substrate 42.
Is provided, so that it is hardly bent and does not easily deform during handling. The reinforcing plate 44 is provided on both short sides of the resin substrate 42 with reinforcing members 45.
It is easier to handle at the time of transfer or incorporation than one that is configured to be divided and arranged so that each corner matches the four corners, and there is less possibility of occurrence of defects, etc. Furthermore, since it is constituted by the two reinforcing members 45, the time required for the bonding step of the reinforcing plate 44 can be reduced. In addition, the reinforcing plate 44 is bonded to the resin substrate 4 with an adhesive.
2, the resin substrate 42 to which the reinforcing plate 44 is adhered is kept at a high temperature for a certain period of time to cure the adhesive, and when the temperature is returned to normal temperature after the adhesive is cured, the resin substrate 42 and the adhesive Alternatively, the entire board may be warped due to a difference in thermal expansion coefficient between the resin substrate 42 and the reinforcing plate 44.

【0034】しかし、2つの補強部材45でなる補強板
44を両短辺部分のみに接着した樹脂基板42に生じる
反りは、下方に向けて少し凸形となるな反りで、その大
きさは両長辺部分の中間部に補強板44が固着されてい
ないために小さなものとなっている。そして、樹脂基板
42の反り量が小さいので、凸面状となった樹脂基板4
2の下面に配列された半田バンプの高さの差は小さく、
平坦な実装面に対しても半田付けによる接続を確実に行
うことができ、実装歩留は向上し、接続の信頼性も向上
したものとなる。
However, the warp that occurs in the resin substrate 42 in which the reinforcing plate 44 composed of the two reinforcing members 45 is adhered only to both short sides is a slightly downwardly warped warp. Since the reinforcing plate 44 is not fixed to the middle portion of the long side portion, the size is small. Since the amount of warpage of the resin substrate 42 is small, the resin substrate 4 having a convex shape is formed.
2, the difference in height of the solder bumps arranged on the lower surface is small,
The connection by soldering can be reliably performed even on a flat mounting surface, the mounting yield is improved, and the reliability of the connection is also improved.

【0035】なお、上記の第3の実施形態では、補強板
44の補強部材45が両端に略直角三角形状の広幅部4
6、中間部分に狭幅部47を備えたものとしたが、これ
に限るものではなく、広幅部46が狭幅部47より広幅
の略方形状のものであっても、また補強部材45が角部
に向けて漸増する枠幅を有する形状であっても、第3の
実施形態と同様の作用、効果を得ることができる。
In the third embodiment, the reinforcing member 45 of the reinforcing plate 44 is provided at both ends with the wide portions 4 each having a substantially right triangle shape.
6, the narrow portion 47 is provided in the middle portion. However, the present invention is not limited to this. Even if the wide portion 46 has a substantially rectangular shape wider than the narrow portion 47, Even with a shape having a frame width that gradually increases toward the corner, the same operation and effect as in the third embodiment can be obtained.

【0036】[0036]

【発明の効果】以上の説明から明らかなように、本発明
は樹脂基板に固着した補強板を角部側で固着面積が大き
くなるよう構成したので、樹脂基板の反り量が小さなも
のとなり、実装歩留が向上し、実装時における接続の信
頼性が向上する等の効果を奏する。
As is apparent from the above description, in the present invention, since the reinforcing plate fixed to the resin substrate has a large fixing area at the corners, the amount of warpage of the resin substrate becomes small, and The yield is improved, and the reliability of connection at the time of mounting is improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の第1の実施形態を示す縦断面図であ
る。
FIG. 1 is a longitudinal sectional view showing a first embodiment of the present invention.

【図2】本発明の第1の実施形態における横断面図であ
る。
FIG. 2 is a cross-sectional view according to the first embodiment of the present invention.

【図3】本発明の第1の実施形態に係る補強板を接着し
た樹脂基板の反りシミュレーション結果を模式的に示す
図である。
FIG. 3 is a diagram schematically illustrating a warp simulation result of the resin substrate to which the reinforcing plate according to the first embodiment of the present invention is bonded.

【図4】本発明の第1の実施形態に係る変形形態の横断
面図である。
FIG. 4 is a cross-sectional view of a modification according to the first embodiment of the present invention.

【図5】本発明の第2の実施形態を示す横断面図であ
る。
FIG. 5 is a cross-sectional view showing a second embodiment of the present invention.

【図6】本発明の第2の実施形態に係る補強板を接着し
た樹脂基板の反りシミュレーション結果を模式的に示す
図である。
FIG. 6 is a view schematically showing a simulation result of warpage of a resin substrate to which a reinforcing plate according to a second embodiment of the present invention is bonded.

【図7】本発明の第2の実施形態に係る第1の変形形態
の横断面図である。
FIG. 7 is a cross-sectional view of a first modified example according to the second embodiment of the present invention.

【図8】本発明の第2の実施形態に係る第2の変形形態
の横断面図である。
FIG. 8 is a cross-sectional view of a second modification according to the second embodiment of the present invention.

【図9】本発明の第3の実施形態を示す横断面図であ
る。
FIG. 9 is a cross-sectional view showing a third embodiment of the present invention.

【図10】第1の従来例を示す縦断面図である。FIG. 10 is a longitudinal sectional view showing a first conventional example.

【図11】第1の従来例における横断面図である。FIG. 11 is a cross-sectional view of the first conventional example.

【図12】第2の従来例を示す縦断面図である。FIG. 12 is a longitudinal sectional view showing a second conventional example.

【図13】第2の従来例における横断面図である。FIG. 13 is a transverse sectional view of a second conventional example.

【図14】第2の従来例に係る補強板を接着した樹脂基
板の反りのシミュレーション結果を模式的に示す図であ
る。
FIG. 14 is a diagram schematically showing a simulation result of warpage of a resin substrate to which a reinforcing plate according to a second conventional example is adhered.

【符号の説明】[Explanation of symbols]

21,41…半導体チップ 23,42…樹脂基板 28,43…封止樹脂 29,29a,34,34a,34b,44…補強板 31,31a,45…補強部材 35,46…広幅部 36,47…狭幅部 37…定幅部 38…増幅部 21, 41 ... semiconductor chips 23, 42 ... resin substrates 28, 43 ... sealing resins 29, 29a, 34, 34a, 34b, 44 ... reinforcing plates 31, 31a, 45 ... reinforcing members 35, 46 ... wide portions 36, 47 ... Narrow width part 37 ... Constant width part 38 ... Amplifier part

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 多角形状の基板上に半導体チップを実装
すると共に、前記基板面に補強板を固着してなる半導体
装置において、前記補強板は、前記基板への固着面積が
該基板の角部側で大きくなるよう偏在するものであるこ
とを特徴とする半導体装置。
1. A semiconductor device comprising a semiconductor chip mounted on a polygonal substrate and a reinforcing plate fixed to the substrate surface, wherein the reinforcing plate has an area fixed to the substrate at a corner of the substrate. A semiconductor device characterized by being unevenly distributed so as to be larger on the side.
【請求項2】 基板が方形状であると共に、補強板が前
記基板の四隅角部近傍にそれぞれ固着された補強部材に
よってのみなるものであることを特徴とする請求項1記
載の半導体装置。
2. The semiconductor device according to claim 1, wherein the substrate has a rectangular shape, and the reinforcing plate is formed only by reinforcing members respectively fixed near four corners of the substrate.
【請求項3】 補強板は、四隅角部の補強部材が同一形
状をなすものであることを特徴とする請求項2記載の半
導体装置。
3. The semiconductor device according to claim 2, wherein the reinforcing members at the four corners of the reinforcing plate have the same shape.
【請求項4】 補強板は、基板と略同外形を有する枠形
状をなすものであって、枠幅が該基板の角部側で広くな
っていることを特徴とする請求項1記載の半導体装置。
4. The semiconductor according to claim 1, wherein the reinforcing plate has a frame shape having substantially the same outer shape as that of the substrate, and the width of the frame is wider at a corner of the substrate. apparatus.
【請求項5】 基板が長方形状であると共に、補強板が
前記基板の両短辺に沿ってそれぞれ固着された補強部材
によりなるものであることを特徴とする請求項1記載の
半導体装置。
5. The semiconductor device according to claim 1, wherein the substrate has a rectangular shape, and the reinforcing plate is formed of reinforcing members fixed along both short sides of the substrate.
【請求項6】 補強板は、両短辺の補強部材が同一形状
をなすものであって、該補強部材の幅が基板の角部側で
広くなるよう形成されていることを特徴とする請求項5
記載の半導体装置。
6. The reinforcing plate, wherein the reinforcing members on both short sides have the same shape, and the width of the reinforcing members is formed to be wider at the corners of the substrate. Item 5
13. The semiconductor device according to claim 1.
JP19117497A 1997-07-16 1997-07-16 Semiconductor device Pending JPH1140687A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19117497A JPH1140687A (en) 1997-07-16 1997-07-16 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19117497A JPH1140687A (en) 1997-07-16 1997-07-16 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH1140687A true JPH1140687A (en) 1999-02-12

Family

ID=16270139

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19117497A Pending JPH1140687A (en) 1997-07-16 1997-07-16 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH1140687A (en)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001174789A (en) * 1999-12-17 2001-06-29 Sharp Corp Liquid crystal display device
US6502926B2 (en) 2001-01-30 2003-01-07 Lexmark International, Inc. Ink jet semiconductor chip structure
WO2004086498A1 (en) * 2003-03-26 2004-10-07 Fujitsu Limited Semiconductor device
WO2007037055A1 (en) * 2005-09-29 2007-04-05 Nec Corporation Semiconductor package, substrate, electronic device using such semiconductor package or substrate, and method for correcting warping of semiconductor package
JP2007281374A (en) * 2006-04-11 2007-10-25 Nec Corp Semiconductor chip mounting substrate, semiconductor package equipped with the same substrate, electronic equipment and method for manufacturing semiconductor package
JP2009212315A (en) * 2008-03-04 2009-09-17 Elpida Memory Inc Semiconductor device and manufacturing method thereof
EP2395820A1 (en) 2010-06-10 2011-12-14 Fujitsu Limited Board reinforcing structure, board assembly, and electronic device
JP2013033853A (en) * 2011-08-02 2013-02-14 Fujitsu Ltd Mounting board, semiconductor device, and electronic apparatus
JP2013102216A (en) * 2013-01-31 2013-05-23 Shinko Electric Ind Co Ltd Wiring board
US9053262B2 (en) 2011-11-22 2015-06-09 Fujitsu Limited Method of determining reinforcement position of circuit substrate and substrate assembly
JP2017092395A (en) * 2015-11-16 2017-05-25 住友電工デバイス・イノベーション株式会社 Semiconductor device
WO2024005172A1 (en) * 2022-06-29 2024-01-04 ソニーセミコンダクタソリューションズ株式会社 Semiconductor device and electronic apparatus

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001174789A (en) * 1999-12-17 2001-06-29 Sharp Corp Liquid crystal display device
US6502926B2 (en) 2001-01-30 2003-01-07 Lexmark International, Inc. Ink jet semiconductor chip structure
WO2004086498A1 (en) * 2003-03-26 2004-10-07 Fujitsu Limited Semiconductor device
US7102228B2 (en) 2003-03-26 2006-09-05 Fujitsu Limited Semiconductor device
JPWO2007037055A1 (en) * 2005-09-29 2009-04-02 日本電気株式会社 Semiconductor package, substrate, electronic device using this semiconductor package or substrate, and method for correcting warpage of semiconductor package
WO2007037055A1 (en) * 2005-09-29 2007-04-05 Nec Corporation Semiconductor package, substrate, electronic device using such semiconductor package or substrate, and method for correcting warping of semiconductor package
JP2007281374A (en) * 2006-04-11 2007-10-25 Nec Corp Semiconductor chip mounting substrate, semiconductor package equipped with the same substrate, electronic equipment and method for manufacturing semiconductor package
JP2009212315A (en) * 2008-03-04 2009-09-17 Elpida Memory Inc Semiconductor device and manufacturing method thereof
EP2395820A1 (en) 2010-06-10 2011-12-14 Fujitsu Limited Board reinforcing structure, board assembly, and electronic device
US8604347B2 (en) 2010-06-10 2013-12-10 Fujitsu Limited Board reinforcing structure, board assembly, and electronic device
JP2013033853A (en) * 2011-08-02 2013-02-14 Fujitsu Ltd Mounting board, semiconductor device, and electronic apparatus
US9053262B2 (en) 2011-11-22 2015-06-09 Fujitsu Limited Method of determining reinforcement position of circuit substrate and substrate assembly
JP2013102216A (en) * 2013-01-31 2013-05-23 Shinko Electric Ind Co Ltd Wiring board
JP2017092395A (en) * 2015-11-16 2017-05-25 住友電工デバイス・イノベーション株式会社 Semiconductor device
WO2024005172A1 (en) * 2022-06-29 2024-01-04 ソニーセミコンダクタソリューションズ株式会社 Semiconductor device and electronic apparatus

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