JPH11261179A5 - - Google Patents
Info
- Publication number
- JPH11261179A5 JPH11261179A5 JP1998334259A JP33425998A JPH11261179A5 JP H11261179 A5 JPH11261179 A5 JP H11261179A5 JP 1998334259 A JP1998334259 A JP 1998334259A JP 33425998 A JP33425998 A JP 33425998A JP H11261179 A5 JPH11261179 A5 JP H11261179A5
- Authority
- JP
- Japan
- Prior art keywords
- image
- ball grid
- grid array
- circuit board
- printed circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08/986,078 US6040530A (en) | 1997-12-05 | 1997-12-05 | Versatile printed circuit board for testing processing reliability |
| US986,078 | 1997-12-05 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH11261179A JPH11261179A (ja) | 1999-09-24 |
| JPH11261179A5 true JPH11261179A5 (enExample) | 2006-01-19 |
Family
ID=25532056
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10334259A Withdrawn JPH11261179A (ja) | 1997-12-05 | 1998-11-25 | 試験用プリント回路基板 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US6040530A (enExample) |
| EP (1) | EP0926930B1 (enExample) |
| JP (1) | JPH11261179A (enExample) |
| DE (1) | DE69827754T2 (enExample) |
| SG (1) | SG70122A1 (enExample) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6662250B1 (en) * | 2000-02-25 | 2003-12-09 | Hewlett-Packard Development Company, L.P. | Optimized routing strategy for multiple synchronous bus groups |
| US6564986B1 (en) * | 2001-03-08 | 2003-05-20 | Xilinx, Inc. | Method and assembly for testing solder joint fractures between integrated circuit package and printed circuit board |
| JP3790175B2 (ja) * | 2002-03-01 | 2006-06-28 | 株式会社アドバンテスト | 基板異常検出回路付き装置 |
| US6788092B2 (en) * | 2002-04-15 | 2004-09-07 | Advanced Semiconductor Engineering, Inc. | Test assembly for integrated circuit package |
| US6888360B1 (en) * | 2004-02-20 | 2005-05-03 | Research In Motion Limited | Surface mount technology evaluation board having varied board pad characteristics |
| EP1566995B1 (en) * | 2004-02-20 | 2007-08-15 | Research In Motion Limited | Surface mount technology evaluation board |
| DE502005008223D1 (de) * | 2004-07-09 | 2009-11-12 | Diehl Aerospace Gmbh | Leiterkarte mit Karbonisierungssensor |
| US9853007B2 (en) * | 2014-12-30 | 2017-12-26 | Microsemi Solutions (U.S.), Inc. | Method for producing an integrated circuit package and apparatus produced thereby |
| US9698093B2 (en) * | 2015-08-24 | 2017-07-04 | Nxp Usa,Inc. | Universal BGA substrate |
| WO2020170341A1 (ja) * | 2019-02-19 | 2020-08-27 | 株式会社Fuji | 基準マーク特定装置、基準マーク特定方法 |
| CN114863868B (zh) * | 2022-03-27 | 2023-04-25 | 深圳市美矽微半导体有限公司 | 一种led载板及其显示设备 |
| CN115968120A (zh) * | 2023-02-21 | 2023-04-14 | 宏华胜精密电子(烟台)有限公司 | 一种水平线异物反沾检查方式 |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3588616A (en) * | 1969-01-24 | 1971-06-28 | Sprague Electric Co | Compensation substrate for dual in line package |
| US3964087A (en) * | 1975-05-15 | 1976-06-15 | Interdyne Company | Resistor network for integrated circuit |
| US4426773A (en) * | 1981-05-15 | 1984-01-24 | General Electric Ceramics, Inc. | Array of electronic packaging substrates |
| US4583150A (en) * | 1983-01-21 | 1986-04-15 | Methode Electronics, Inc. | Printed circuit boards |
| US4725775A (en) * | 1986-06-12 | 1988-02-16 | Environmental Processing, Incorporated | Resistor isolated burn-in socket board |
| US4926546A (en) * | 1988-06-09 | 1990-05-22 | A. O. Smith Corporation | PC board panel configuration technique |
| JPH02197190A (ja) * | 1989-01-26 | 1990-08-03 | Shin Kobe Electric Mach Co Ltd | 多層印刷配線板 |
| ATE91059T1 (de) * | 1989-08-17 | 1993-07-15 | Schlegel Georg Gmbh & Co | Elektrische leiterplatte. |
| US5561584A (en) * | 1993-09-30 | 1996-10-01 | Vimak Corporation | Electrical ground plane apparatus |
| JP3037043B2 (ja) * | 1993-10-29 | 2000-04-24 | 日本電気株式会社 | プリント基板のテスト容易化回路実装方式 |
| US5457390A (en) * | 1993-12-13 | 1995-10-10 | Northern Telecom Limited | Circuit board manufacture |
| JPH07333300A (ja) * | 1994-06-14 | 1995-12-22 | Mitsubishi Electric Corp | 電気特性評価用基板 |
| JP2570637B2 (ja) * | 1994-11-28 | 1997-01-08 | 日本電気株式会社 | Mcmキャリア |
| US5761051A (en) * | 1994-12-29 | 1998-06-02 | Compaq Computer Corporation | Multi-layer circuit board having a supply bus and discrete voltage supply planes |
| US5642262A (en) * | 1995-02-23 | 1997-06-24 | Altera Corporation | High-density programmable logic device in a multi-chip module package with improved interconnect scheme |
| TW382736B (en) * | 1996-04-18 | 2000-02-21 | Eastern Kk | Circuit board for a semiconductor device and method of making the same |
| US6612022B1 (en) * | 1996-05-03 | 2003-09-02 | Invensys Systems, Inc. | Printed circuit board including removable auxiliary area with test points |
| US5896037A (en) * | 1996-10-10 | 1999-04-20 | Methode Electronics, Inc. | Interface test adapter for actively testing an integrated circuit chip package |
-
1997
- 1997-12-05 US US08/986,078 patent/US6040530A/en not_active Expired - Lifetime
-
1998
- 1998-09-11 SG SG1998003614A patent/SG70122A1/en unknown
- 1998-11-25 JP JP10334259A patent/JPH11261179A/ja not_active Withdrawn
- 1998-12-02 EP EP98309866A patent/EP0926930B1/en not_active Expired - Lifetime
- 1998-12-02 DE DE69827754T patent/DE69827754T2/de not_active Expired - Fee Related
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