DE69827754T2 - Gedruckte Schaltungsplatte - Google Patents
Gedruckte Schaltungsplatte Download PDFInfo
- Publication number
- DE69827754T2 DE69827754T2 DE69827754T DE69827754T DE69827754T2 DE 69827754 T2 DE69827754 T2 DE 69827754T2 DE 69827754 T DE69827754 T DE 69827754T DE 69827754 T DE69827754 T DE 69827754T DE 69827754 T2 DE69827754 T2 DE 69827754T2
- Authority
- DE
- Germany
- Prior art keywords
- image
- ball grid
- grid array
- circuit board
- printed circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000012360 testing method Methods 0.000 claims description 118
- 230000007613 environmental effect Effects 0.000 claims description 18
- 238000002955 isolation Methods 0.000 claims description 6
- 238000009413 insulation Methods 0.000 description 8
- 238000000034 method Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 7
- 229910000679 solder Inorganic materials 0.000 description 7
- 238000012545 processing Methods 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 238000013461 design Methods 0.000 description 4
- 230000003749 cleanliness Effects 0.000 description 3
- 238000003754 machining Methods 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 230000000007 visual effect Effects 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 239000000356 contaminant Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 239000000523 sample Substances 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/316—Testing of analog circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0266—Marks, test patterns or identification means
- H05K1/0268—Marks, test patterns or identification means for electrical inspection or testing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/07—Electric details
- H05K2201/0753—Insulation
- H05K2201/0761—Insulation resistance, e.g. of the surface of the PCB between the conductors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/0929—Conductive planes
- H05K2201/09345—Power and ground in the same plane; Power planes for two voltages in one plane
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09772—Conductors directly under a component but not electrically connected to the component
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10106—Light emitting diode [LED]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10734—Ball grid array [BGA]; Bump grid array
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Structure Of Printed Boards (AREA)
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
- Tests Of Electronic Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US986078 | 1997-12-05 | ||
| US08/986,078 US6040530A (en) | 1997-12-05 | 1997-12-05 | Versatile printed circuit board for testing processing reliability |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE69827754D1 DE69827754D1 (de) | 2004-12-30 |
| DE69827754T2 true DE69827754T2 (de) | 2005-11-03 |
Family
ID=25532056
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE69827754T Expired - Fee Related DE69827754T2 (de) | 1997-12-05 | 1998-12-02 | Gedruckte Schaltungsplatte |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US6040530A (enExample) |
| EP (1) | EP0926930B1 (enExample) |
| JP (1) | JPH11261179A (enExample) |
| DE (1) | DE69827754T2 (enExample) |
| SG (1) | SG70122A1 (enExample) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6662250B1 (en) * | 2000-02-25 | 2003-12-09 | Hewlett-Packard Development Company, L.P. | Optimized routing strategy for multiple synchronous bus groups |
| US6564986B1 (en) * | 2001-03-08 | 2003-05-20 | Xilinx, Inc. | Method and assembly for testing solder joint fractures between integrated circuit package and printed circuit board |
| JP3790175B2 (ja) * | 2002-03-01 | 2006-06-28 | 株式会社アドバンテスト | 基板異常検出回路付き装置 |
| US6788092B2 (en) * | 2002-04-15 | 2004-09-07 | Advanced Semiconductor Engineering, Inc. | Test assembly for integrated circuit package |
| US6888360B1 (en) * | 2004-02-20 | 2005-05-03 | Research In Motion Limited | Surface mount technology evaluation board having varied board pad characteristics |
| EP1566995B1 (en) * | 2004-02-20 | 2007-08-15 | Research In Motion Limited | Surface mount technology evaluation board |
| DE502005008223D1 (de) * | 2004-07-09 | 2009-11-12 | Diehl Aerospace Gmbh | Leiterkarte mit Karbonisierungssensor |
| US9853007B2 (en) * | 2014-12-30 | 2017-12-26 | Microsemi Solutions (U.S.), Inc. | Method for producing an integrated circuit package and apparatus produced thereby |
| US9698093B2 (en) * | 2015-08-24 | 2017-07-04 | Nxp Usa,Inc. | Universal BGA substrate |
| WO2020170341A1 (ja) * | 2019-02-19 | 2020-08-27 | 株式会社Fuji | 基準マーク特定装置、基準マーク特定方法 |
| CN114863868B (zh) * | 2022-03-27 | 2023-04-25 | 深圳市美矽微半导体有限公司 | 一种led载板及其显示设备 |
| CN115968120A (zh) * | 2023-02-21 | 2023-04-14 | 宏华胜精密电子(烟台)有限公司 | 一种水平线异物反沾检查方式 |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3588616A (en) * | 1969-01-24 | 1971-06-28 | Sprague Electric Co | Compensation substrate for dual in line package |
| US3964087A (en) * | 1975-05-15 | 1976-06-15 | Interdyne Company | Resistor network for integrated circuit |
| US4426773A (en) * | 1981-05-15 | 1984-01-24 | General Electric Ceramics, Inc. | Array of electronic packaging substrates |
| US4583150A (en) * | 1983-01-21 | 1986-04-15 | Methode Electronics, Inc. | Printed circuit boards |
| US4725775A (en) * | 1986-06-12 | 1988-02-16 | Environmental Processing, Incorporated | Resistor isolated burn-in socket board |
| US4926546A (en) * | 1988-06-09 | 1990-05-22 | A. O. Smith Corporation | PC board panel configuration technique |
| JPH02197190A (ja) * | 1989-01-26 | 1990-08-03 | Shin Kobe Electric Mach Co Ltd | 多層印刷配線板 |
| ATE91059T1 (de) * | 1989-08-17 | 1993-07-15 | Schlegel Georg Gmbh & Co | Elektrische leiterplatte. |
| US5561584A (en) * | 1993-09-30 | 1996-10-01 | Vimak Corporation | Electrical ground plane apparatus |
| JP3037043B2 (ja) * | 1993-10-29 | 2000-04-24 | 日本電気株式会社 | プリント基板のテスト容易化回路実装方式 |
| US5457390A (en) * | 1993-12-13 | 1995-10-10 | Northern Telecom Limited | Circuit board manufacture |
| JPH07333300A (ja) * | 1994-06-14 | 1995-12-22 | Mitsubishi Electric Corp | 電気特性評価用基板 |
| JP2570637B2 (ja) * | 1994-11-28 | 1997-01-08 | 日本電気株式会社 | Mcmキャリア |
| US5761051A (en) * | 1994-12-29 | 1998-06-02 | Compaq Computer Corporation | Multi-layer circuit board having a supply bus and discrete voltage supply planes |
| US5642262A (en) * | 1995-02-23 | 1997-06-24 | Altera Corporation | High-density programmable logic device in a multi-chip module package with improved interconnect scheme |
| TW382736B (en) * | 1996-04-18 | 2000-02-21 | Eastern Kk | Circuit board for a semiconductor device and method of making the same |
| US6612022B1 (en) * | 1996-05-03 | 2003-09-02 | Invensys Systems, Inc. | Printed circuit board including removable auxiliary area with test points |
| US5896037A (en) * | 1996-10-10 | 1999-04-20 | Methode Electronics, Inc. | Interface test adapter for actively testing an integrated circuit chip package |
-
1997
- 1997-12-05 US US08/986,078 patent/US6040530A/en not_active Expired - Lifetime
-
1998
- 1998-09-11 SG SG1998003614A patent/SG70122A1/en unknown
- 1998-11-25 JP JP10334259A patent/JPH11261179A/ja not_active Withdrawn
- 1998-12-02 EP EP98309866A patent/EP0926930B1/en not_active Expired - Lifetime
- 1998-12-02 DE DE69827754T patent/DE69827754T2/de not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US6040530A (en) | 2000-03-21 |
| SG70122A1 (en) | 2000-01-25 |
| DE69827754D1 (de) | 2004-12-30 |
| EP0926930A3 (en) | 2000-06-28 |
| EP0926930B1 (en) | 2004-11-24 |
| EP0926930A2 (en) | 1999-06-30 |
| JPH11261179A (ja) | 1999-09-24 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8364 | No opposition during term of opposition | ||
| 8339 | Ceased/non-payment of the annual fee |