JPH11186386A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To further reduce the no. of steps required for manufacturing a semiconductor device than in the prior art, while preventing damaging conductive plugs having a shared contact structure for connecting only adjacent conductive layers, and the device having an insulation layer having the conductive plugs and wiring layer formed thereon. SOLUTION: This manufacturing method comprises the steps of forming an insulation film 3 on a semiconductor substrate 1, having a gate electrodes 22, forming shared contact structure type contact holes 41, 42 and normal contact holes 5 through this film 3, and forming conductive plugs 61-63 in the contact holes 41, 42, 5. The plugs 61 connect only the gate electrodes 22 and source-drain regions 12, without making connection to an upper wiring 7. As a result, a cover 8 for covering the tops of the plugs 61 is formed for a conductor film above the insulation layer 3, when forming a lower wiring 7 on the conductor film.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a conductor plug having a shared contact structure for connecting only adjacent conductive layers, and a method of manufacturing the same.

[0002]

2. Description of the Related Art With the progress of high integration and high performance in semiconductor devices such as LSIs, various devices have been devised for designing gate electrodes and wiring structures in MOS transistors, for example. As an example, SRAM (St
atic Randam Access Memory) employs a shared contact structure in which a gate electrode and a source / drain region are connected by a single contact hole.

FIG. 2 shows an example of a semiconductor device having a shared contact structure. In a portion A, the insulating film 3 has a shared contact structure so as to extend over the adjacent gate electrode 22 and source / drain region 12. By opening a contact hole and forming a conductor plug 61 made of tungsten or the like in the contact hole, the conductor plug 61 connects only the gate electrode 22 and the source / drain region 12 adjacent thereto. .

In the portion B, the conductor plug 15 is formed directly above the conductor plug 62 formed in the same manner as the conductor plug 61, and the conductor plug 62 and the conductor plug 15 are formed.
Thus, the lower wiring 7 and the gate electrode 22 of the two-layer wiring structure
And the source / drain region 12.

That is, in the semiconductor device shown in FIG. 2, when a conductive film is formed directly on the insulating film 3 to form the lower wiring 7, the conductive plug 61 is etched when the conductive film is etched.
Since the upper surface of the insulating film is damaged, an insulating film 14 is further formed on the insulating film 3 and then the conductive plug 1
5 is formed, and the lower wiring 7 is formed on the insulating film 14.

[0006]

As described above, the conventional semiconductor device has a large number of manufacturing steps for the purpose of preventing the conductor plug from being damaged, and it is required to reduce the number of steps.

The present invention has been made in view of such a point. An insulating layer having a conductor plug having a shared contact structure for connecting only adjacent conductive layers, and a wiring layer formed thereon are described. It is another object of the present invention to reduce the number of steps required for manufacturing the semiconductor device compared to the related art while preventing the conductor plug from being damaged.

[0008]

According to a first aspect of the present invention, there is provided an insulating layer having a conductor plug having a shared contact structure for connecting only adjacent conductive layers, and an insulating layer formed above the insulating layer. In a semiconductor device having a wiring layer provided, a top surface of the conductor plug is directly covered with a cover formed on the conductive film for the wiring layer.

According to this semiconductor device, the portion of the conductive film present on the upper surface of the conductor plug remains as a cover without being etched in the etching step at the time of forming the wiring pattern. The upper surface is not damaged.

[0010] Therefore, in the case of a conventional product without such a cover, a step required to prevent damage to the conductor plug (ie, an insulating film is further formed on the insulating layer having the conductor plug). Forming a contact hole for connecting to a wiring layer in the insulating film;
And a step of forming a conductor plug in this contact hole).

According to a second aspect of the present invention, there is provided a contact hole forming step of forming a contact hole having a shared contact structure in a portion of an insulating film in contact with an adjacent conductive layer;
A conductive plug forming step of forming a conductive plug in the contact hole, and forming a conductive film directly on the insulating film on which the conductive plug is formed, and forming only a conductive layer adjacent to the conductive film. A wiring layer forming step of forming, together with a wiring pattern, a cover covering an upper surface of a conductor plug to be connected.

According to this method, when the conductive film is etched in the wiring layer forming step, the conductive film on the upper surface of the conductor plug that connects only the adjacent conductive layers is not etched. No damage to the

[0013]

Embodiments of the present invention will be described below. FIG. 1 is a partial sectional view of a wafer for describing a method of manufacturing a semiconductor device according to an embodiment of the present invention in the order of steps.

First, predetermined impurity diffusion layers 11 to 13 are formed at predetermined positions on the surface of the semiconductor substrate 1, respectively. At a predetermined position on the semiconductor substrate 1, a gate oxide film 21 and a gate electrode 22 (22a, 22b) and a step of forming an insulating film 23 on the side of the gate. Here, the impurity diffusion layer 12 is a source / drain region.

Next, after the insulating film 3 is formed on the wafer in this state, a portion of the insulating film 3 which is in contact with the gate electrode 22 and the source / drain region 12 adjacent thereto is subjected to a photolithographic etching step. Contact holes 41 and 42 having a shared contact structure are formed, and an ordinary contact hole 5 is formed in the impurity diffusion layer 11.
Open. This corresponds to the contact hole forming step of the present invention, and FIG. 1A shows a state after the contact hole forming step.

Next, after a tungsten film is deposited on the wafer in this state by the CVD method, the tungsten film on the insulating film 3 is removed by the plasma etching method to leave tungsten only in the contact hole. This allows
Conductive plugs 61, 62, 63 made of tungsten are formed in the contact holes 41, 42, 5, respectively. This corresponds to the conductor plug forming step of the present invention.

Here, the conductor plug 61 connects only the gate electrode 22 and the adjacent source / drain region 12 (adjacent current-carrying layer), while the conductive plug 62 connects the gate electrode 22 to the gate electrode 22. Not only the source / drain regions 12 adjacent to the wirings but also the connection between them and the wiring immediately above (the lower wiring 7).

Next, after an aluminum film (conductive film forming a wiring layer) is formed on the wafer in this state, a wiring pattern of the lower wiring 7 and a pattern of the cover 8 covering the upper surface of the conductor plug 61 are formed. A photolitho-etching step is performed on this aluminum film using a mask having As a result, the lower wiring 7 and the cover 8 are formed on the insulating film 3. This corresponds to the wiring layer forming step of the present invention, and FIG. 1B shows a state after the wiring layer forming step.

Next, the insulating film 18 is formed on the wafer in this state.
After forming a contact hole for connection with the upper wiring 9 in the insulating film 18, a conductor plug 81 is formed in each contact hole in the same manner as described above. After that, the upper wiring 9 is formed on the insulating film 18 by an ordinary method. Thus, a semiconductor device as shown in FIG. 1C is obtained. This semiconductor device has a two-layer wiring structure of a lower wiring 7 and an upper wiring 9, and adjacent conductive layers (gate electrode 22 and source / drain region 12 adjacent thereto).
The upper surface of the conductor plug 61 having a shared contact structure that connects only the conductors is directly covered with the cover 8 formed on the aluminum film for the lower wiring 7.

Therefore, no damage occurs on the upper surface of the conductor plug 61 in the etching step for forming the lower wiring 7. Therefore, the gate electrode 22 by the conductor plug 61
And the source / drain region 12 adjacent thereto is reliably connected.

The pattern (planar shape) of the cover 8 may be a shape that covers the entire upper surface of the conductor plug 61, but if the pattern covers the insulating film 3 around it with a predetermined width, the conductor plug 61 This is preferable because damage to the 61 can be more reliably prevented.

Further, comparing the semiconductor device of FIG. 1 (c) with the conventional example of FIG. 2, it is found that the insulating film 14 having the conductor plug 15 is present in FIG. 2 but not in FIG. 1 (c). 1 (c), but not in FIG. 2, the cover 8 has a structure with less steps in FIG. 1 (c) than in FIG. Therefore, the semiconductor device of the present invention has higher flatness than the conventional device.

The material of the conductor plug 61 that connects only the adjacent conductive layers is not limited to tungsten, and the wiring material of the lower wiring 7 is not limited to aluminum. The effect of the present invention is particularly high when the material is easily etched by the etching gas of the lower wiring 7.

In the above embodiment, the conductive plug having a shared contact structure for connecting the adjacent conductive layers includes a gate electrode formed on the semiconductor substrate and a source / drain formed on the surface of the semiconductor substrate adjacent to the gate electrode. Although the connection with a region is described, the present invention is also applied to a connection between adjacent conductive layers formed in a layer remote from the semiconductor substrate.

[0025]

As described above, the semiconductor device of the present invention has an insulating layer having a conductor plug of a shared contact structure connecting only adjacent conductive layers, and a wiring layer formed thereon. In the semiconductor device, since the conductor plug is prevented from being damaged by the presence of the covering member, the semiconductor device can be obtained by a manufacturing method with fewer steps than before. In other words, a semiconductor device in which adjacent conductive layers are reliably connected by the conductor plug can be obtained at lower cost than before.

According to the method of the present invention, there is provided an insulating layer having a conductor plug having a shared contact structure for connecting only adjacent conductive layers, and a wiring layer formed above the insulating layer. A semiconductor device in which damage to a plug is prevented can be obtained in a smaller number of steps than in the conventional case.

[Brief description of the drawings]

FIG. 1 is a partial sectional view of a wafer for explaining a method of manufacturing a semiconductor device according to an embodiment of the present invention in the order of steps.

FIG. 2 is a partial cross-sectional view of a wafer showing a conventional example of a semiconductor device having a shared contact structure.

[Explanation of symbols]

Reference Signs List 1 semiconductor substrate 3 insulating film (insulating layer having conductive plug) 7 lower wiring (wiring layer formed above conductive plug) 8 covering 12 source / drain region (conductive layer) 22 gate electrode (conductive layer) 41) Contact hole with shared contact structure 42 Contact hole with shared contact structure 61 Conductor plug that connects only adjacent conductive layers

Claims (2)

[Claims] 1. A semiconductor device comprising: an insulating layer having a conductor plug of a shared contact structure for connecting only adjacent conductive layers; and a wiring layer formed above the insulating layer. A semiconductor device directly covered with a cover formed on the conductive film for the wiring layer. 2. A contact hole forming step of forming a contact hole having a shared contact structure in a portion of the insulating film in contact with an adjacent conductive layer, and a conductor plug forming step of forming a conductor plug in the contact hole.
A conductive film is formed immediately above the insulating film on which the conductive plug is formed, and a cover covering the upper surface of the conductive plug that connects only the adjacent conductive layer is formed on the conductive film together with the wiring pattern. A method for manufacturing a semiconductor device, comprising: a wiring layer forming step.