JPH10144788A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacture a semiconductor device which is restrained from increasing in contact resistance and junction leakage current, wherein a damaged layer is suppressed from being formed on the base of a contact, and the contact is prevented from being enlarged in diameter at the etching of the contact base. SOLUTION: A semiconductor coating layer 22 is formed, and then an interlayer insulating film 23 is formed thereon, a mask layer 24 with an opening patterned corresponding to a contact hole is provided thereon, a contact hole is cut penetrating through the mask layer 24 and the interlayer insulating film 23, etching is stopped at the surface of the semiconductor coating layer 22, a side wall layer is formed to cover the inner wall of the contact hole, the semiconductor coating layer is removed by etching from the base of the contact hole to make the semiconductor substrate exposed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor device having a contact (connection hole), and more particularly to a method for manufacturing a semiconductor device having a contact having a high aspect ratio.

[0002]

2. Description of the Related Art In semiconductor devices, device miniaturization,
High integration and miniaturization are desired, and various studies are being conducted for this purpose. As a result, as the generation progresses, the miniaturization of the semiconductor device in the planar direction is further advanced, and high integration and miniaturization of the device are realized.

[0003]

On the other hand, as compared with miniaturization of a semiconductor device in a planar direction, reduction in a vertical direction has not progressed. For this reason, the aspect ratio of the contact (connection hole) increases, and various problems occur. Typical examples include an increase in contact resistance and an increase in junction leak current. As a cause of this, it has been found that a so-called damaged layer containing oxygen and carbon is present. Various methods for removing the damaged layer have been reported in academic societies and the like, but a mass production technique capable of completely removing the damaged layer has not been established.

A portion called such a damage layer is as follows.
Using a resist mainly composed of carbon as a mask, SiO ₂
When etching an interlayer insulating film mainly composed of, for example, oxygen or carbon is beaten into a substrate, or reverse sputtering for removing a natural oxide film is performed before embedding a conductor in a contact hole. By the application, oxygen in the interlayer insulating film is driven into the substrate to be formed.

[0005] In addition, factors affecting contact resistance include:
There is also a report that a gas component used for contact etching is involved.

As another problem, the miniaturization in the planar direction reduces the margin of the distance between the contact and the underlying wiring, and may cause a decrease in yield due to a failure in withstand voltage. One of the causes of this problem is that the contact diameter is easily increased by hydrofluoric acid cleaning which is generally used to remove a natural oxide film at the bottom of the contact.

If the contact diameter increases, the wiring from the contact becomes relatively larger than the finely arranged base wiring. For example, the wiring between the base wiring next to the base wiring to be connected to the contact and the contact In some cases, a necessary insulation width cannot be obtained, which causes a problem that the withstand voltage resistance is reduced.

Referring to FIG. 5, a method for forming a contact hole according to a conventional method will be described. An interlayer insulating film 23 is deposited on the semiconductor substrate 10 on which the gate electrode 31 is formed, and a contact hole (connection hole) C is formed in the interlayer insulating film 23 with respect to the source / drain diffusion layer 11 formed in the substrate 10.
Form H. In this case, carbon in the resist for forming a contact hole and oxygen in the interlayer insulating film 23 are driven into the substrate by etching (so-called overetch) applied after the hole reaches the substrate 10,
For example, a layer called a suboxide layer SO is formed. In the case where a sputtered layer is used for the connection hole, oxygen is also driven in by so-called reverse sputtering performed as pretreatment. Such layers are difficult to remove,
It is also known that various characteristics of the contact are adversely affected. In addition, the interlayer insulating film 23 usually contains silicon oxide as a main component, and when the natural oxide film is removed, the interlayer insulating film 23 is used.
Is also cut off, and the diameter of the contact hole increases.

In view of the above problems, the present invention suppresses the formation of a damaged layer on the bottom of a contact, suppresses the expansion of the contact diameter at the time of etching the bottom of the contact, and increases the contact resistance and the junction leakage current. An object of the present invention is to provide a method for manufacturing a semiconductor device which is less likely to occur.

[0010]

In order to achieve the above object, the present invention comprises a step of forming a semiconductor coating layer covering a semiconductor substrate; a step of forming an interlayer insulating film covering the semiconductor coating layer; Forming a mask layer on the interlayer insulating film, forming a contact hole penetrating the mask layer and the interlayer insulating film and reaching the semiconductor covering layer, and a sidewall layer covering at least a side wall of the contact hole And a step of exposing the semiconductor substrate surface by etching the semiconductor coating layer.

Further, in order to achieve the above object, the present invention provides a step of forming a semiconductor coating layer covering a semiconductor substrate, a step of forming an interlayer insulating film covering the semiconductor coating layer, A step of forming a mask layer, a step of forming a contact hole penetrating the mask layer and the interlayer insulating film and reaching the semiconductor cover layer, and a step of forming a contact hole cover layer covering the inner wall of the contact hole Etching the semiconductor coating layer to expose the semiconductor substrate surface while etching the contact hole coating layer while leaving at least a side wall of the contact hole coating layer. Provide a way.

Further, in order to achieve the above object, the present invention provides a step of forming a semiconductor covering layer covering a semiconductor substrate, a step of forming an interlayer insulating film covering the semiconductor covering layer, Forming a mask layer, forming a sidewall mask layer in an opening of the mask layer, and contact hole reaching the semiconductor coating layer through the interlayer insulating film using the sidewall mask layer as a mask. Forming a, and forming a sidewall layer covering at least the inner wall of the contact hole,
Exposing the surface of the semiconductor substrate by etching the semiconductor coating layer.

In the method of manufacturing a semiconductor device according to the present invention, at least one semiconductor coating layer is formed below the interlayer insulating film. This semiconductor coating layer functions as an etching stopper layer in a later contact hole opening step by changing the film composition from that of the interlayer insulating film deposited thereover. When the interlayer insulating film is made of, for example, silicon oxide, the semiconductor covering layer can be made of, for example, silicon nitride or the like so that an etching step having an etching ratio different from that of silicon oxide can be selected.

A mask layer in which a contact hole opening is patterned is formed as an upper layer of the interlayer insulating film, and an opening penetrating the mask layer and the interlayer insulating film is formed by anisotropic etching. Stop at Thereafter, a sidewall layer that covers at least the inner wall of the exposed contact hole is formed. Thereby, the interlayer insulating film becomes a semiconductor coating layer, a side wall layer,
Since the entire surface is covered with the mask layer, it is possible to prevent oxygen atoms and the like in the interlayer insulating film from being hammered into the contact holes during the etching of the semiconductor coating layer exposing the semiconductor substrate in a later step.

Therefore, in the method of manufacturing a semiconductor device according to the present invention, the semiconductor coating layer, the mask layer, and the side wall layer may have an etching selectivity with respect to the interlayer insulating film, and may have substantially no carbon and oxygen. preferable.

As the semiconductor coating layer, an insulator such as silicon nitride can be used, and as the mask layer and the sidewall layer, an insulator such as silicon nitride and a conductor such as polysilicon can be used. . Substantially free of carbon and oxygen to prevent the formation of a damaged layer due to hammering of carbon or oxygen into the contact bottom when exposing the semiconductor substrate surface by etching the semiconductor coating layer Can be. In addition, since the sidewall layer, mask layer, and semiconductor coating layer covering these interlayer insulating films have an etching selectivity with respect to silicon oxide, which is a main component of the interlayer insulating film, it is possible to selectively etch when opening a contact hole. Becomes

As a method of forming the sidewall layer covering the inner wall of the contact hole, a method of selectively growing the contact hole in a side wall shape, a method of forming a contact hole covering layer covering the inside of the contact hole, and leaving the side wall shape by etching. Molding method. In the case of a method in which the contact hole covering layer is formed while being left in the form of a sidewall by etching, the step can be performed simultaneously with the step of etching the semiconductor covering layer at the bottom of the contact hole to expose the semiconductor substrate surface. Can be. Further, as the etching for forming the sidewall, anisotropic etching is preferable, and reactive ion etching (RIE) and the like are available. In the method of manufacturing a semiconductor device according to the present invention, even when a step of removing the oxide on the surface of the semiconductor substrate by purifying the semiconductor substrate after the step of exposing the semiconductor substrate is performed, the same oxidation as the composition of the natural oxide film is usually performed. The inner wall of the contact hole of the interlayer insulating film containing silicon as a main component is protected by the side wall layer and is prevented from being scraped, so that it is possible to suppress the diameter of the contact hole from expanding.

In the method of manufacturing a semiconductor device according to the present invention, in the step of forming a contact hole, a resist in which a contact hole is patterned is formed on a mask layer, and the resist is used as a mask to form an opening up to the surface of the semiconductor coating layer. Then, a method of removing the resist, forming a resist in which a contact hole is patterned on the mask layer, forming a contact pattern on the mask layer using the resist as a mask, removing the resist, and masking the mask layer And an opening to the surface of the semiconductor coating layer. The removal of the carbon-containing layer such as a resist is performed before the step of etching the semiconductor coating layer at the bottom of the contact hole to expose the semiconductor substrate surface. If the carbon-containing layer is present or is exposed at the stage where the semiconductor substrate surface is exposed, carbon in the carbon-containing layer is driven into the contact bottom, and a damaged layer is formed.

Further, after a mask layer having a contact hole pattern is formed, a sidewall mask layer is formed in the mask layer opening, and a contact hole is opened in the interlayer insulating film using the sidewall mask layer as a mask. In addition, the diameter of the contact hole can be reduced. This makes it possible to form a contact hole having a diameter suitable for a finer underlying wiring, and to provide an insulation width between the underlying wiring and the contact adjacent to the underlying wiring to which the contact is to be connected. It is possible to prevent the pressure resistance from lowering due to failure to take place.

According to the present invention, in the process of exposing the substrate at the opening of the contact hole, an oxygen / carbon free structure is formed so that the damage layer is not formed and the contact diameter is reduced by the pretreatment. And a method of manufacturing a semiconductor device capable of preventing the spread of the semiconductor device.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the method for manufacturing a semiconductor device according to the present invention will be described below with reference to examples.

Embodiment 1 First, a semiconductor device manufactured by the method for manufacturing a semiconductor device according to the present embodiment will be described with reference to the cross-sectional view of the semiconductor device shown in FIG.

On the semiconductor substrate 10 or on a well formed on the substrate, there is a gate electrode 31 of, for example, a polycide composed of a polysilicon layer 31a and a WSi layer 31b with a gate insulating film 20 interposed therebetween. -The drain diffusion layer 11 is formed, and a field effect transistor is configured. The gate electrode is covered with a gate electrode covering insulating film 21 made of, for example, silicon oxide,
Further, the upper layer is covered with a semiconductor coating layer 22 made of, for example, silicon nitride. The upper layer is further planarized by an interlayer insulating film 23 made of silicon oxide.
On the upper layer, a mask layer 24 is formed by depositing silicon nitride. The upper wiring 32 is formed by filling the contact hole CH penetrating through the mask layer 24, the interlayer insulating film 23, and the semiconductor covering layer 22, and the source / drain diffusion layer 1
1, and a sidewall layer 25a is formed to cover the inner wall of the contact hole.

In such a semiconductor device, the formation of a damaged layer on the contact bottom is suppressed, and the expansion of the contact diameter when the natural oxide film is removed from the contact bottom is suppressed, so that the contact resistance increases and the junction leakage current increases. Is less likely to occur.

Next, a method of manufacturing a semiconductor device according to the present embodiment will be described with reference to FIGS.

FIG. 1 is a sectional view showing a manufacturing process of a method for manufacturing a semiconductor device according to the present invention. Steps up to FIG. 1A will be described. After a silicon oxide film is formed on the semiconductor substrate 10 or a well formed in the substrate by thermal oxidation or the like, polysilicon and WSi are laminated in order of about 100 nm and about 100 nm, respectively, and a mask such as a gate electrode is used. The gate oxide film 20 and the gate electrode 31 are formed by processing like a gate electrode by etching. next,
The source / drain diffusion layer 11 is formed by ion implantation to form a field effect transistor. Next, a gate electrode coating insulating film 21 of silicon oxide is deposited on the entire surface by CVD with a thickness of about 20 nm, and a semiconductor coating layer 22 is formed thereon by CVD of silicon nitride about 40 nm.
(A).

Next, as shown in FIG. 1B, an interlayer insulating film 23 such as BPSG 500 is formed on the semiconductor coating layer 22.
It is formed by depositing about nm and flattened by reflow or etch back. Next, about 100 nm of silicon nitride is deposited on the entire surface of the interlayer insulating film 23 by CVD. The resist is patterned and etched like a contact hole to form a mask layer 24. This resist may be removed after the formation of the mask layer and before the subsequent etching step of the semiconductor coating layer. In this embodiment, the resist is removed after the formation of the mask layer 24. Next, anisotropic etching is performed along the mask layer 24 to open a contact hole CH penetrating the interlayer insulating film 23. However, at this stage, the semiconductor coating layer 22 is used as an etching stopper layer,
Etching ends when the surface is exposed.

Next, as shown in FIG. 1C, the inner wall and bottom surface of the contact hole CH and the outer surface of the contact hole are covered, and for example, about 40 nm of silicon nitride is CVD-formed to form a contact hole covering layer 25. Form.

Next, as shown in FIG.
(Reactive ion etching) or other anisotropic etching to form a contact hole covering layer 25 at the bottom of the contact, a semiconductor covering layer 22, a gate electrode covering insulating film 21.
To expose the source / drain diffusion layer surface at the bottom of the contact. At the same time, by this etching, the contact hole covering layer 25 laminated outside the contact hole is removed, and a sidewall layer 25a is formed inside the contact hole.

Next, as shown in FIG. 2E, after removing the natural oxide film of the contact by hydrofluoric acid cleaning, the contact hole CH is formed by ordinary metallization or the like.
A conductive layer is laminated inside and on the mask layer 24 to form an upper wiring 32. After that, the semiconductor device is completed by processing the upper layer wiring into a desired wiring.

According to the above embodiment, in the step of exposing the surface of the semiconductor substrate at the bottom of the contact, the entire surface of the interlayer insulating film is covered with the semiconductor coating layer, the sidewall layer and the mask layer. By performing a proper process, carbon in the resist material and oxygen in the interlayer insulating film are driven into the contact hole by etching, so that a damaged layer is not easily formed.

Further, since the inner wall of the contact hole is protected, the diameter of the contact hole does not increase in the cleaning step of removing the natural oxide film at the bottom of the contact hole, and the margin of the distance to the underlying wiring is improved. be able to.

In the method of manufacturing a semiconductor device according to the present invention, it is preferable to simultaneously perform the step of forming the sidewall layer by etching the inner wall coating layer of the contact hole and the step of etching the semiconductor coating layer.

The sidewall layer is formed by anisotropically etching the contact hole inner wall coating layer and processing it into a side wall shape. The contact hole inner wall coating layer and the semiconductor coating layer have similar etching characteristics, preferably the same. By etching with etching characteristics, the step of forming the sidewall layer by etching the inner layer coating layer of the contact hole and the step of etching the semiconductor coating layer to expose the semiconductor substrate surface can be performed simultaneously,
Thereby, two etching steps can be reduced to one.

In this embodiment, the mask layer 24 and the side wall layer 25a can be formed of polysilicon instead of silicon nitride. In this case, the polysilicon of the mask layer 24 can be removed at the same time, and application to a poly plug is simple.

Embodiment 2 Next, a semiconductor device manufactured by the method for manufacturing a semiconductor device of Embodiment 2 will be described with reference to the cross-sectional view of the semiconductor device shown in FIG.

The semiconductor device according to the second embodiment is substantially the same as the semiconductor device according to the first embodiment shown in FIG. 2E. However, in the second embodiment, for example, a side wall mask layer also made of polysilicon is formed at the edge of the mask layer 33 made of polysilicon. The contact is opened using the sidewall as a mask.
Since the diameter of the contact hole is smaller than that of the first embodiment, it is suitable for a semiconductor device requiring finer processing.

Also in the semiconductor device of this embodiment, the formation of a damaged layer at the bottom of the contact is suppressed, and the expansion of the contact diameter at the time of removing the natural oxide film at the bottom of the contact is suppressed. It is difficult for the leakage current to increase.

Next, a method of manufacturing the semiconductor device according to the present embodiment will be described with reference to FIGS.

FIG. 3 is a sectional view showing a manufacturing process of the method for manufacturing a semiconductor device according to the present invention. Steps up to FIG. 3A will be described. After forming a field-effect transistor including a gate electrode 31 and a source / drain diffusion layer 11 on a substrate 10 in the same manner as in the first embodiment, a gate electrode covering insulating film 21, a semiconductor covering layer 22, and an interlayer insulating film 23 are respectively formed. The polysilicon is deposited, for example, at 200 nm C
VD and patterning like a contact hole to form a mask layer 33. The resist used for forming the mask layer 33 may be removed by a later step of etching the semiconductor coating layer. In this case, the resist is removed after forming the mask layer.

Next, as shown in FIG. 3B, the mask layer 33 is coated and, for example, polysilicon is CVD-coated on the entire surface.
The sidewall mask layer 34 is formed by etching back, and anisotropic etching is performed using the sidewall mask layer 34 as a mask to open a contact hole CH. At this time, the etching is stopped at the semiconductor coating layer 22 as in the first embodiment.

Next, as shown in FIG. 4C, a contact hole covering layer is formed by covering the inner wall and bottom surface of the contact hole CH and the outside of the contact hole with, for example, about 40 nm of silicon nitride by CVD. After that, RI
Anisotropic etching such as E (reactive ion etching) is performed to expose the semiconductor substrate surface at the bottom of the contact. At the same time, by this etching, the contact hole covering layer laminated outside the contact hole is removed, and a sidewall layer 25a is formed inside the contact hole.

Next, as shown in FIG. 4D, after removing the natural oxide film of the contact by hydrofluoric acid cleaning, the inside of the contact hole CH and on the mask layer 33 and the side wall mask layer 34 by ordinary metallization or the like. The upper layer wiring 32 is formed by laminating a conductive layer. After that, the semiconductor device is completed by processing the upper layer wiring into a desired wiring.

According to the second embodiment, similar to the first embodiment,
In the step of exposing the surface of the semiconductor substrate at the bottom of the contact, the interlayer insulating film includes a semiconductor coating layer, a side wall layer,
The entire surface is covered with the mask layer, and the oxide film and resist-free processing are performed, so that carbon in the resist material and oxygen in the interlayer insulating film are driven into the contact holes by etching to form a damaged layer. In addition, since the inner wall of the contact hole is protected, the diameter of the contact hole is not increased by the cleaning process for removing the natural oxide film at the bottom of the contact hole, and the margin of the distance to the underlying wiring is improved. Can be. Further, by opening the contact using the sidewall mask layer as a mask, a contact hole having a finer diameter can be opened.

In this embodiment, the mask layer 33 and the sidewall mask layer 34 can be formed of silicon nitride instead of polysilicon, and the sidewall layer 25a can be formed of polysilicon instead of silicon nitride. It can be formed of silicon.

Contact hole (connection hole) shown here
By using the method described above, it is possible to etch a contact hole of a substrate without oxygen of a resist (carbon) and an interlayer insulating film, and to remove a natural oxide film used as a pretreatment for metallization. The reverse sputtering can be performed in an oxygen / carbon free state, so that even in the formation of a contact hole having a high aspect ratio, there is no formation of a so-called damage layer, and low resistance and low junction leak current characteristics. Can be formed. Further, in the present invention, since the side wall is protected by the hydrofluoric acid resistant film, the diameter of the connection hole is not increased by the pretreatment, and the margin of the distance to the underlying wiring is improved.

The method of manufacturing a semiconductor device according to the present invention is not limited to the above embodiment. For example, in the embodiment, the gate electrode of the MOSFET has a two-layer structure, but may have a single-layer structure or three or more layers. The semiconductor coating layer, the interlayer insulating film, and the mask layer each have a single-layer structure.
It may be more than layers. The source / drain diffusion layer is L
It may have a DD structure. In addition, various changes can be made without departing from the gist of the present invention.

In the method of manufacturing a semiconductor device according to the present invention, a MOSFET-based semiconductor device is described in the present embodiment. In addition to a MOSFET-based semiconductor memory device such as a DRAM, a bipolar-based semiconductor device or an A-type semiconductor device is used. −
Applicable to semiconductor devices such as D converter
Any semiconductor device having a contact hole is applicable.

[0049]

According to the method of manufacturing a semiconductor device of the present invention, since a so-called damage layer is not formed at the bottom of the contact, a contact having a low resistance, a low junction leak, and a high aspect ratio can be formed. In addition, by protecting the inner wall of the contact hole, the diameter does not increase due to the removal of the natural oxide film, and a margin for the distance from the underlying wiring can be gained, thereby realizing miniaturization, high integration, and miniaturization. Can be manufactured at a high yield.

[Brief description of the drawings]

FIGS. 1A and 1B are cross-sectional views showing a manufacturing process of a method for manufacturing a semiconductor device according to the present invention, wherein FIG. 1A shows a semiconductor coating layer forming process, and FIG. 1B shows a contact hole opening stopped by the semiconductor coating layer. (C) shows up to the step of forming a contact hole covering layer.

FIG. 2 shows a step subsequent to that of FIG. 1, and (d) shows a step until an opening step of a contact hole exposing a semiconductor substrate;
(E) shows the process up to the step of forming the upper layer wiring.

FIGS. 3A and 3B are cross-sectional views illustrating a manufacturing process of a method for manufacturing a semiconductor device according to the present invention. FIG. 3A is a diagram showing an etching mask layer forming process, and FIG. The process is shown.

FIG. 4 shows a step subsequent to that of FIG. 3, and (c) shows a step until an opening step of a contact hole exposing a semiconductor substrate.
(D) shows the process up to the step of forming the upper wiring.

FIG. 5 is a cross-sectional view showing a manufacturing process of a conventional method of manufacturing a semiconductor device. FIG. 5 (a) shows a process up to a process of forming a gate electrode and an interlayer insulating film covering a gate electrode and a source / drain diffusion layer. And (b) show the steps up to the step of opening a contact hole for exposing the semiconductor substrate.

[Explanation of symbols]

Reference Signs List 10: substrate (well), 11: source / drain diffusion layer, 20: gate insulating film, 21: gate electrode coating insulating film, 22: semiconductor coating layer, 23: interlayer insulating film, 24: mask layer, 25: contact hole coating Layer, 25a side wall layer, 31 gate electrode, 32 upper wiring, 3
3 ... mask layer, 34 ... sidewall mask layer, CH ...
Contact hole, SO: Damage layer (suboxide layer)

Claims (11)

[Claims] A step of forming a semiconductor covering layer covering the semiconductor substrate; a step of forming an interlayer insulating film covering the semiconductor covering layer; a step of forming a mask layer on the interlayer insulating film; Forming a contact hole penetrating through the layer and the interlayer insulating film to reach the semiconductor cover layer; forming a sidewall layer covering at least the contact hole side wall; and etching the semiconductor cover layer to form the contact hole. Exposing a surface of the semiconductor substrate. 2. A semiconductor device according to claim 1, wherein said semiconductor coating layer, said mask layer and said sidewall layer have an etching selectivity with respect to said interlayer insulating film, and are substantially free of carbon and oxygen. Of manufacturing a semiconductor device. 3. The method according to claim 1, further comprising, after the step of exposing the semiconductor substrate, a step of purifying the semiconductor substrate to remove an oxide on the surface of the semiconductor substrate. 4. The method according to claim 1, further comprising the step of removing the carbon-containing layer before the step of etching the semiconductor coating layer to expose the surface of the semiconductor substrate. 5. A process for forming the sidewall layer,
2. The method according to claim 1, wherein the step of etching the semiconductor coating layer and exposing the surface of the semiconductor substrate is performed simultaneously. 6. The method according to claim 5, wherein the etching in the step of exposing the semiconductor substrate is anisotropic etching. 7. A step of forming a semiconductor coating layer covering the semiconductor substrate; a step of forming an interlayer insulating film covering the semiconductor coating layer; a step of forming a mask layer on the interlayer insulating film; Forming a contact hole penetrating the layer and the interlayer insulating film and reaching the semiconductor covering layer; forming a contact hole covering layer covering the inner wall of the contact hole; and etching the contact hole covering layer. Exposing the semiconductor substrate surface by etching the semiconductor coating layer while leaving at least a side wall portion of the contact hole coating layer. 8. The method according to claim 7, wherein the etching in the step of exposing the surface of the semiconductor substrate while leaving at least the side wall of the contact hole covering layer is anisotropic etching. 9. A step of forming a semiconductor covering layer covering the semiconductor substrate; a step of forming an interlayer insulating film covering the semiconductor covering layer; a step of forming a mask layer on the interlayer insulating film; Forming a sidewall mask layer in the opening of the layer, forming a contact hole penetrating the interlayer insulating film and reaching the semiconductor coating layer using the sidewall mask layer as a mask, at least the contact hole A method for manufacturing a semiconductor device, comprising: a step of forming a side wall layer covering an inner wall; and a step of exposing the semiconductor substrate surface by etching the semiconductor cover layer. 10. The method according to claim 9, wherein the step of forming the sidewall layer and the step of exposing the semiconductor substrate surface by etching the semiconductor coating layer are performed simultaneously. 11. The method according to claim 10, wherein the etching in the step of exposing the semiconductor substrate is anisotropic etching.