JPH11153794A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high quality picture display with a low power consumption and a backlight without flickering and without deteriorating a visual angle characteristic. SOLUTION: This liquid crystal display device is configured fro a liquid crystal panel constituted by holding a liquid crystal layer between two transparent substrates with picture element selecting electrodes formed on at least one of the substrates, and a backlight BL arranged on the rear surface of the liquid crystal panel, and the backlight BL is configured from linear light sources LP arranged along at least one of the edges of a light guide plate GLB consisting of a transparent plate, a reflecting plate RFS arranged on the side opposite to the liquid crystal panel of the light guide plate GLB, and a fluorescent layer PHS formed on the side of the light guide plate GLB of the reflecting plate RFS.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device provided on a back surface of a liquid crystal panel and having a backlight for illuminating the liquid crystal panel.

[0002]

2. Description of the Related Art A liquid crystal display device includes a simple matrix type in which a large number of pairs of electrodes are formed on a pair of substrate inner surfaces and a pixel is formed at the intersection, and an active matrix type in which a switching element is provided for each pixel. Are roughly divided into
In particular, active matrix type liquid crystal display devices are classified into so-called “vertical electric field type” and “horizontal electric field type” according to their liquid crystal driving modes.

In a vertical electric field type liquid crystal display device, a transparent substrate opposed to a liquid crystal composition layer (hereinafter, also simply referred to as a liquid crystal layer) is provided in each region corresponding to a unit pixel on the liquid crystal layer side on a transparent substrate. A pixel electrode made of a transparent electrode and a common electrode are provided to face each other, and light transmitted through the front liquid crystal layer is modulated by an electric field generated perpendicular to the transparent electrode between the pixel electrode and the common electrode. To visually display an image or the like.

On the other hand, a liquid crystal display device of the in-plane switching mode employs a transparent substrate disposed opposite to each other with a liquid crystal layer interposed therebetween.
A pixel electrode and a counter electrode are arranged on an area surface corresponding to a unit pixel on one or both liquid crystal layers, and the electric field component generated substantially in parallel with the transparent electrode between the pixel electrode and the counter electrode is used for the pixel electrode and the counter electrode. The light transmitted through the liquid crystal layer is modulated to display an image or the like visually.

The liquid crystal display device of the horizontal electric field type, unlike the liquid crystal display device of the vertical electric field type, can recognize a clear image or the like even when observed from a field of view at a large angle with respect to its display surface.
It is known as having an excellent so-called angular field of view.

[0006] Such a lateral electric field type liquid crystal display device is described in detail in, for example, Japanese Patent Application Laid-Open No. 6-160878.

In the above-mentioned active matrix type liquid crystal display device of the simple matrix type or the vertical electric field type or the horizontal electric field type, a liquid crystal panel and a backlight unit which is an illumination light source for displaying an image or the like are generally arranged on the upper side. It has a structure housed in a housing consisting of a shield case and a lower shield case. Polarizing plates for transmitting only a certain amount of polarized light are attached to both sides of the liquid crystal panel.

FIG. 20 is a schematic sectional view for explaining an example of the structure of this type of liquid crystal display device, where SUB1 is a first substrate,
SUB2 is a second substrate, LC is a liquid crystal layer, FIL / BM is a color filter / black matrix, ITO is a transparent conductive film, and SL is a seal for sealing the liquid crystal layer and bonding the first and second substrates. , POL1 is the first polarizing plate, POL2
Is a second polarizing plate, MD is a housing, GC is a rubber cushion,
SPC indicates a spacer, and BL indicates a backlight which is an illumination light source.

A first substrate SUB1 and a second substrate SUB2
Are made of a transparent substrate (generally, a glass substrate). A plurality of pixel forming electrodes are formed on the inner surface of the first substrate SUB1 or the first substrate SUB1 and the second substrate SUB2, but are not shown.

Second, a color filter / black matrix FIL / BM formed on the inner surface of the substrate SUB2
Is a black matrix, which is a color filter of a plurality of colors (generally three colors: red, green, and blue) and a light absorbing layer for partitioning these color filters to improve contrast.

The outer surface of the first substrate SUB1 (the second substrate S
A first polarizing plate POL1 is adhered to the surface opposite to UB2, and the outer surface of the second substrate SUB2 (first substrate SUB1).
A second polarizing plate POL2 is adhered to an upper layer of the transparent conductive film ITO formed on the surface opposite to the second conductive film ITO.

A liquid crystal composition is sealed in a bonding gap (liquid crystal gap) between the first substrate SUB1 and the second substrate SUB2 to form a liquid crystal layer LC.
The liquid crystal panel is integrated by bonding with L. A rubber cushion GC is inserted around the lower part of this liquid crystal panel,
A liquid crystal display device is constituted by being fixed together with a backlight BL by a housing MD formed of a metallic material with a spacer SPC such as an adhesive tape inserted around the upper portion. The housing M
D is the first substrate SUB1 side (lower side) and the second substrate SUB
There is a type in which the two are separated from each other (upper side) and both are mechanically connected.

By making a part or all of the spacer SPC conductive, the transparent conductive film ITO is connected to the ground, thereby preventing static electricity from being charged.

FIG. 21 is a schematic sectional view for explaining a conventional structure of a backlight mounted on the liquid crystal display device shown in FIG. 20, wherein SPS is a light diffusion plate, GLB is a light guide plate, LS is a reflection sheet, LP Denotes a linear light source, and RFS denotes a reflector.

In this configuration example, the linear light source LP is a cold-cathode tube, which is driven by an inverter power supply (not shown), is installed on two opposite sides of the light guide plate GLB, and emits the emitted light inside the light guide plate GLB. Incident on. The incident light is emitted in the direction of the light diffusion plate SPS while traveling on the opposite side of the light guide plate GLB, and illuminates the liquid crystal panel as a surface light source.

A part of the light traveling through the light guide plate GLB is also emitted in the direction of the reflector RFS, but this emitted light is reflected by the reflector RFS and again emitted through the light guide plate GLB in the direction of the light diffuser plate SPS. The luminance is improved by effectively using the light emitted from the light source.

[0017]

In the above-mentioned conventional backlight, it is necessary to increase the lighting power of the linear light source LP in order to further improve the luminance.
Since P is driven by the inverter power supply, the illumination light has a so-called flicker. Conventionally, a prism sheet is provided on the upper surface of the light diffusing plate SPS, and the luminance is improved and the flicker of illumination light is reduced by using the directivity.

However, such conventional means have problems that the viewing angle characteristics deteriorate and the power consumption increases.

An object of the present invention is to provide a liquid crystal display which can solve the above-mentioned problems of the prior art, has a low power consumption, has a flicker-free backlight, and can obtain a high quality image display without impairing the viewing angle characteristics. It is to provide a device.

[0020]

In order to achieve the above-mentioned object, the present invention is directed to a method in which a fluorescent layer is formed by applying a fluorescent paint to a reflector constituting a backlight.
(3).

(1) A liquid crystal panel having a liquid crystal layer sandwiched between two transparent substrates each having an electrode for pixel selection formed on at least one substrate, and a backlight provided on the back surface of the liquid crystal panel. A linear light source provided along at least one edge of a light guide plate made of a transparent plate; a reflector provided on a side of the light guide plate opposite to the liquid crystal panel; And a fluorescent layer formed on the light guide plate side of the plate.

With this configuration, the light emitted from the light guide plate toward the reflector is reflected by the fluorescent layer formed on the reflector, and at the same time, the fluorescent layer is excited to generate excitation light. Through the liquid crystal panel. Therefore, the flicker described in the related art can be eliminated, and the luminance can be improved without increasing the driving power.

(2) A liquid crystal panel in which a liquid crystal layer is sandwiched between two transparent substrates each having a pixel selection electrode formed on at least one substrate, and a backlight provided on the back surface of the liquid crystal panel. In the liquid crystal display device configured, the backlight is a linear light source installed along at least one edge of a light guide plate made of a transparent plate, and a reflection plate installed on a side of the light guide plate opposite to the liquid crystal panel. And a fluorescent layer formed on the reflection plate side of the light guide plate.

With this configuration, the light emitted from the light guide plate toward the reflection plate is reflected by the fluorescent layer formed on the back surface of the light guide plate, and at the same time, excites the fluorescent layer to generate excitation light. The light is emitted toward the liquid crystal panel through the light guide plate. The light emitted to the reflector side by the excitation is reflected by the reflector, and further excites the fluorescent layer to generate light. Therefore, the flicker described in the related art can be eliminated, and the luminance can be further improved without increasing the driving power.

(3) The fluorescent layer according to (1) or (2) is characterized in that it has an afterglow characteristic for compensating at least a low luminance period of a light emission cycle of the linear light source.

With this configuration, the flicker of the illumination light caused by the driving of the inverter power supply is compensated, and it is possible to obtain the planar illumination light of uniform and light luminance.

In the configuration (2), the reflection plate can be omitted.

Still other objects and features of the present invention will become apparent from the following description.

[0029]

Embodiments of the present invention will be described below in detail with reference to examples. In the drawings in the following description, components having the same function are denoted by the same reference numerals, and repeated description thereof will be omitted.

<First Embodiment> FIG. 1 is a sectional view for explaining the structure of a first embodiment of the liquid crystal display device according to the present invention.
As in FIG. 21, SPS denotes a light diffusion plate, GLB denotes a light guide plate, LS denotes a reflection sheet, LP denotes a linear light source, and RFS denotes a reflection plate. PHS is a fluorescent layer. In this configuration, a phosphor is applied to the upper surface (the liquid crystal panel side) of the reflection plate RFS provided on the back surface of the light guide plate GLB to form the phosphor layer PHS. The fluorescent layer PHS is excited by light emitted from the light guide plate GLB to the reflection plate RFS to generate light. The generated light is emitted toward the liquid crystal panel through the light guide plate GLB, and becomes light for illuminating the liquid crystal panel.

The flicker of the linear light source can be effectively eliminated by using, as the phosphor constituting the fluorescent layer, one having at least the afterglow characteristic for compensating for the low luminance period of the emission cycle of the linear light source. it can.

As a material for the fluorescent layer, thioflavin (Th
ioflavine), Basic Yellow HG, Rhodamine-B
Luminescent luminous paints containing (Rhodamine-B), fluorescein or Eosine can be used.

The use of a fluorescent paint that is made white by mixing a plurality of types of the above luminous paints can also solve the problem that the display screen is colored.

According to the configuration of this embodiment, the flicker of the linear light source LP can be eliminated, and the luminance can be improved without increasing the driving power.

<Second Embodiment> FIG. 2 is a sectional view for explaining the structure of a liquid crystal display device according to a second embodiment of the present invention.
The same as the first embodiment corresponds to the same function part.

This embodiment is the same as the first embodiment except for the portion where the fluorescent layer PHS is formed, so that the description of the overlapping portions will be omitted.

That is, in this embodiment, the fluorescent layer PHS
Are formed on the lower surface (reflector side) of the light guide pair GLB. The fluorescent layer PHS is excited by light to be emitted from the light guide plate GLB to the reflection plate RFS side to generate light. The generated light is emitted toward the liquid crystal panel through the inside of the light guide plate GLB, and becomes light for illuminating the liquid crystal panel.

It is to be noted that flicker of the linear light source can be effectively eliminated by using a phosphor constituting the fluorescent layer having a persistence characteristic of compensating at least a low luminance period of the light emitting cycle of the linear light source. it can.

As a material for the fluorescent layer, thioflavin (Th
ioflavine), Basic Yellow HG, Rhodamine-B
Luminescent luminous paints containing (Rhodamine-B), fluorescein or Eosine can be used.

Further, if a fluorescent paint which is made white by mixing plural kinds of the above luminous paint is used, the problem that the display screen is colored can be solved.

Similarly, according to the configuration of this embodiment, the flicker of the linear light source LP can be eliminated, and the luminance can be improved without increasing the driving power.

It is possible to omit the reflector RFS by applying a thick fluorescent layer PHS.

<Third Embodiment> FIG. 3 is a sectional view for explaining the structure of a liquid crystal display device according to a third embodiment of the present invention.
As in FIG. 21, SPS denotes a light diffusion plate, GLB denotes a light guide plate, LS denotes a reflection sheet, LP denotes a linear light source, and RFS denotes a reflection plate. PHS is a fluorescent layer.

In this configuration, the light guide plate GLB has a so-called wedge-shaped cross section, and one linear light source L extends along one thick side thereof.
P is installed.

Then, a fluorescent material is applied to the upper surface (the liquid crystal panel side) of the reflector RFS provided on the back surface of the light guide plate GLB to form a fluorescent layer PHS. The fluorescent layer PHS is excited by light emitted from the light guide plate GLB to the reflection plate RFS to generate light. The generated light is emitted toward the liquid crystal panel through the light guide plate GLB, and becomes light for illuminating the liquid crystal panel.

The flicker of the linear light source can be effectively eliminated by using, as the phosphor constituting the fluorescent layer, one having at least the afterglow characteristic for compensating for the low luminance period of the emission cycle of the linear light source. it can.

As a material for the fluorescent layer, thioflavin (Th
ioflavine), Basic Yellow HG, Rhodamine-B
Luminescent luminous paints containing (Rhodamine-B), fluorescein or Eosine can be used.

Further, the use of a fluorescent paint made white by mixing a plurality of types of the above luminous paints can also solve the problem that the display screen is colored.

According to the structure of this embodiment, the flicker of the linear light source LP can be eliminated, and the luminance can be improved without increasing the driving power.

<Fourth Embodiment> FIG. 4 is a sectional view for explaining the structure of a fourth embodiment of the liquid crystal display device according to the present invention.
The same components as in the second embodiment correspond to the same functional portions.

This embodiment is the same as the third embodiment except for the portion where the fluorescent layer PHS is formed, so that the description of the overlapping portions will be omitted.

That is, in this embodiment, the fluorescent layer PHS
Is formed on the lower surface (reflective plate side) of the light guide plate GLB having a wedge system cross section. The fluorescent layer PHS is formed by separating the light guide plate GLB from the reflector R
The light is excited by the light to be emitted to the FS side to generate light. The generated light is emitted toward the liquid crystal panel through the inside of the light guide plate GLB, and becomes light for illuminating the liquid crystal panel.

The flicker of the linear light source can be effectively eliminated by using, as the phosphor constituting the fluorescent layer, one having at least the afterglow characteristic for compensating for the low luminance period of the light emission cycle of the linear light source. it can.

As a material for the fluorescent layer, thioflavin (Th
ioflavine), Basic Yellow HG, Rhodamine-B
Luminescent luminous paints containing (Rhodamine-B), fluorescein or Eosine can be used.

Further, by using a fluorescent paint which is made white by mixing plural kinds of the above luminous paints, the problem that the display screen is colored can be solved.

Similarly, according to the structure of this embodiment, the flicker of the linear light source LP can be eliminated, and the luminance can be improved without increasing the driving power.

The reflector RFS can be omitted by applying a thick fluorescent layer PHS.

FIG. 5 is an explanatory diagram of a laptop personal computer as an example of an electronic device on which the liquid crystal display device of the present invention is mounted.

This personal computer is a liquid crystal display module MDL which incorporates a keyboard section containing a host (central processing unit) and the like, a control board PCB3 having driving boards PCB1, PCB2, and TCON mounted on a liquid crystal panel PNL, and an inverter power supply IV. Is connected to the display unit on which the display is mounted by a hinge.

In this personal computer, the backlight described in the above embodiment is incorporated on the back surface of the liquid crystal panel PNL constituting the display unit, and the personal computer has higher brightness, less flicker and lower power consumption than the conventional one. It has been electrified.

Next, details of the structure of the liquid crystal display device according to the present invention other than the above will be described by taking a color liquid crystal display device of a horizontal electric field type as an example.

In the following drawings, those having the same functions are denoted by the same reference numerals, and their repeated description will be omitted.

<Planar Configuration of Matrix Unit (Pixel Unit)> FIG. 6 is a plan view showing one pixel of the active matrix type color liquid crystal display device of the present invention, a light-shielding region of the black matrix BM, and its periphery.

As shown in FIG. 6, each pixel includes a scanning signal line (gate signal line or horizontal signal line) GL, a counter voltage signal line (counter electrode line) CL, and two adjacent video signal lines (drain). The signal line or the vertical signal line) is arranged in an intersecting region with the DL (in a region surrounded by four signal lines).

Each pixel includes a thin film transistor TFT, a storage capacitor Cstg, a pixel electrode PX, and a counter electrode CT. The scanning signal lines GL and the counter voltage signal lines CL extend in the left-right direction in FIG. The video signal lines DL extend in the up-down direction, and a plurality of video signal lines DL are arranged in the left-right direction. The pixel electrode PX is connected to the thin film transistor TFT, and the counter electrode CT is integrated with the counter voltage signal line CL.

The pixel electrode PX and the counter electrode CT face each other, and the electric field between each pixel electrode PX and the counter electrode CT controls the alignment state of the liquid crystal LC and modulates the transmitted light to control the display. The pixel electrode PX and the counter electrode CT are formed in a comb-like shape, and each is an electrode that is elongated in the vertical direction in FIG.

The number O (number of comb teeth) of the counter electrode CT in one pixel is equal to the number P (number of comb teeth) of the pixel electrode PX and O =
It is configured to always have the relationship of P + 1 (O = 2, P = 1 in this embodiment). This is because the counter electrode CT and the pixel electrode PX are alternately arranged, and the counter electrode CT is always adjacent to the video signal line DL.

Thus, the counter electrode CT and the pixel electrode PX are
The electric field lines from the video signal line DL can be shielded by the counter electrode CT so that the electric field between them is not affected by the electric field generated from the video signal line DL.

The potential of the counter electrode CT is stable because the potential is always supplied from the outside through the counter voltage signal line CL. Therefore, there is almost no change in potential even adjacent to the video signal line DL. In addition, since the geometric position of the pixel electrode PX from the video signal line DL becomes farther,
The parasitic capacitance between the pixel electrode PX and the video signal line DL is greatly reduced, and the fluctuation of the pixel electrode potential Vs due to the video signal voltage can be controlled.

As a result, crosstalk (defective image quality called vertical smear) occurring in the vertical direction can be suppressed.

The electrode width W between the pixel electrode PX and the counter electrode CT
Each of p and Wc is set to 6 μm, which is set sufficiently larger than 4.5 μm which exceeds the maximum set thickness of the liquid crystal layer described later.
It is preferable to have a margin of 20% or more in consideration of processing variations in manufacturing. Therefore, it is preferable that the margin be sufficiently larger than 5.4 μm.

Thus, the electric field component applied to the liquid crystal layer parallel to the substrate surface becomes larger than the electric field component in the direction perpendicular to the substrate surface, and it is possible to suppress an increase in the voltage for driving the liquid crystal. The maximum value of the electrode width Wp, Wc of each electrode is
It is preferable that the distance be smaller than the distance L between the pixel electrode PX and the counter electrode CT.

This is because if the distance between the electrodes is too small, the curvature of the lines of electric force becomes severe, and the region where the electric field component perpendicular to the substrate surface is larger than the electric field component parallel to the substrate surface increases. This is because an electric field component parallel to the above cannot be efficiently applied to the liquid crystal layer. Therefore, the pixel electrode PX and the counter electrode C
The interval L between T needs to be larger than 7.2 μm if the margin is 20%. In this embodiment, the diagonal is about 1
Since the pixel pitch is about 60 μm because the resolution is 4.5 cm (5.7 inches) and the resolution is 640 × 480 dots, the distance L> 7.2 μm by dividing the pixel into two.
Was realized.

The electrode width of the video signal line DL is set to 8 μm, which is slightly wider than the pixel electrode PX and the counter electrode CT in order to prevent disconnection, and the interval between the video signal line DL and the counter electrode CT is short-circuited. In order to prevent this, an interval of about 1 μm is provided, a video signal line DL is formed on the upper side of the gate insulating film, and a counter electrode CT is formed on the lower side.

On the other hand, the electrode interval between the pixel electrode PX and the counter electrode CT changes depending on the liquid crystal material used. this is,
Since the electric field strength that achieves the maximum transmittance varies depending on the liquid crystal material, the electrode spacing is set according to the liquid crystal material, and within the range of the maximum amplitude of the signal voltage set by the withstand voltage of the video signal driving circuit (signal side driver) used. , So that the maximum transmittance can be obtained. When a liquid crystal material described later is used, the electrode interval is about 15 μm.

In this configuration example, a black matrix BM is formed on the gate line GL, the counter voltage signal line CL, the thin film transistor TFT, the drain line DL, and between the drain line DL and the counter electrode CT in plan view.

<< Cross-Sectional Structure of Matrix (Pixel) >> FIG. 7 shows a thin film transistor TF taken along the line FF in FIG.
FIG. 8 is a cross-sectional view of the storage capacitor Cstg taken along the line GG of FIG. 6, and FIG. 9 is a cross-sectional view of the vicinity of one pixel electrode in the image display region of the in-plane switching liquid crystal display substrate and the periphery of the substrate. It is sectional drawing of a part.

As shown in FIG. 9, a thin film transistor TFT, a storage capacitor Cstg (not shown) and an electrode group C are provided on the lower transparent glass substrate SUB1 side with respect to the liquid crystal layer LC.
T, PX are formed, and a color filter FIL and a black matrix B for shading are formed on the upper transparent glass substrate SUB2 side.
An M pattern is formed. Although not publicly known,
As proposed in Japanese Patent Application No. 7-198349 by the same applicant, it is also possible to form the pattern of the light-shielding black matrix BM on the lower transparent glass substrate SUB1 side.

On the inner surface (on the liquid crystal LC side) of each of the transparent glass substrates SUB1 and SUB2, alignment films ORI11 and ORI12 for controlling the initial alignment of the liquid crystal are provided. Polarizing plates POL1 and POL2 whose polarization axes are orthogonally arranged (crossed Nicol arrangement) are provided on the outer surfaces of each.

Next, the lower transparent glass substrate SUB1 side (T
The configuration of the FT substrate will be described in detail.

TFT Substrate << Thin Film Transistor >> The thin film transistor TFT operates so that the channel resistance between the source and the drain decreases when a positive bias is applied to the gate electrode GT, and the channel resistance increases when the bias is set to zero.

As shown in FIG. 9, the thin film transistor TFT has a gate electrode GT, a gate insulating film GI, and an i-type (intrinsic, not doped with a conductivity type determining impurity) amorphous silicon (Si). Type semiconductor layer AS, a pair of source electrode SD1, drain electrode SD
2

It should be understood that the source and the drain are originally determined by the bias polarity between them, and in the circuit of this liquid crystal display device, since the polarity is inverted during the operation, the source and the drain are switched during the operation. However, in the following description, one is fixed and the other is fixed as a drain for convenience.

<< Gate Electrode GT >> The gate electrode GT is formed continuously with the scanning signal line GL, and a part of the scanning signal line GL is configured as the gate electrode GT. The gate electrode GT is a portion exceeding the active region of the thin film transistor TFT, and is formed larger than that so as to completely cover the i-type semiconductor layer AS (as viewed from below).

Thus, in addition to the role of the gate electrode GT, the gate electrode GT is designed so that external light and backlight do not hit the i-type semiconductor layer AS. In this example, the gate electrode GT is formed of a single-layer conductive film g1. As the conductive film g1, for example, an aluminum (Al) film formed by sputtering is used, and an anodic oxide film AOF of Al is provided thereon.

<< Scanning Signal Line GL >> The scanning signal line GL is formed of the conductive film g1. The conductive film g1 of the scanning signal line GL is formed in the same manufacturing process as the conductive film g1 of the gate electrode GT, and is integrally formed. Through this scanning signal line GL, a gate voltage Vg is supplied from an external circuit to the gate electrode GT.

An anodic oxide film AOF of Al is also provided on the scanning signal line GL. The portion that intersects with the video signal line DL is made thin to reduce the probability of short-circuit with the video signal line DL, and is made bifurcated so that even if it is short-circuited, it can be separated by laser trimming.

<< Counter Electrode CT >> The counter electrode CT is formed of the same conductive film g1 as the gate electrode GT and the scanning signal line GL. Also, an anodic oxide film A of Al is formed on the counter electrode CT.
An OF is provided. The counter electrode CT has an anodic oxide film A
Since they are completely covered with the OF, even if they are brought as close as possible to the video signal lines, they will not be short-circuited.

Further, they may be configured to cross each other. The counter electrode CT is configured to apply a counter voltage Vcom. In this embodiment, the counter voltage Vc
om is a potential lower than an intermediate DC potential between the minimum level drive voltage Vdmin and the maximum level drive voltage Vdmax applied to the video signal line DL by a feedthrough voltage ΔVs generated when the thin film transistor element TFT is turned off. However, if you want to reduce the power supply voltage of the integrated circuit used in the video signal drive circuit to about half,
An AC voltage may be applied.

<< Counter Voltage Signal Line CL >> Counter Voltage Signal Line C
L is composed of the conductive film g1. The conductive film g1 of the counter voltage signal line CL is formed in the same manufacturing process as the conductive film g1 of the gate electrode GT, the scanning signal line GL, and the counter electrode CT, and is formed integrally with the counter electrode CT.

The counter voltage Vcom is supplied from an external circuit to the counter electrode CT through the counter voltage signal line CL. or,
An anodic oxide film AOF of Al is also provided on the counter voltage signal line CL. Note that the portion that intersects with the video signal line DL is
Like the scanning signal line GL, it may be made thinner to reduce the probability of short-circuiting with the video signal line DL, or it may be split into two parts so that even if it is short-circuited, it can be separated by laser trimming.

<< Insulating Film GI >> The insulating film GI is used as a gate insulating film for applying an electric field to the semiconductor layer AS together with the gate electrode GT in the thin film transistor TFT. The insulating film GI is formed above the gate electrode GT and the scanning signal line GL.

As the insulating film GI, for example, plasma CVD
The silicon nitride film formed by
It is formed to a thickness of nm (240 nm in this embodiment).

The gate insulating film GI is formed in the matrix portion A
R is formed so as to surround the entirety of R, and the peripheral portion is removed so as to expose the external connection terminals DTM and GTM. Also,
The insulating film GI also contributes to electrical insulation between the scanning signal lines GL and the counter voltage signal lines CL and the video signal lines DL.

<< i-type semiconductor layer AS >> i-type semiconductor layer AS
Is amorphous silicon and is formed with a thickness of 20 to 220 nm (about 200 nm in this embodiment). Layer d
Numeral 0 denotes an N (+)-type amorphous silicon semiconductor layer doped with phosphorus (P) for ohmic contact. An i-type semiconductor layer AS is present on the lower side, and a conductive film d1 (d2) is present on the upper side. It is left only in places.

The i-type semiconductor layer AS is also provided between the scanning signal line GL and the intersection of the counter signal line CL and the video signal line DL. The i-type semiconductor layer AS at the intersection reduces a short circuit between the scanning signal line GL and the opposing signal line CL and the video signal line DL at the intersection.

<< Source electrode SDI, drain electrode SD
2 >> Each of the source electrode SDI and the drain electrode SD2 is composed of a conductive film d1 in contact with the N (+) type semiconductor layer d0 and a conductive film d2 formed thereon.

The conductive film d1 is formed of a chromium (Cr) film formed by sputtering to a thickness of 50 to 100 nm (about 60 nm in this embodiment). Since the stress increases when the Cr film is formed to have a large thickness, the Cr film has a thickness of 200 nm.
It is formed in a range that does not exceed a certain thickness. Cr film is N
To improve the adhesion to the (+) type semiconductor layer d0,
2 is used for the purpose of a so-called barrier layer that prevents Al from diffusing into the N (+) type semiconductor layer d0.

As the conductive film d1, a refractory metal (Mo, Ti, Ta, W) film or a refractory metal silicide (MoSi ₂ , TiSi ₂ , TaSi ₂ , WSi ₂ ) film may be used in addition to the Cr film. .

The conductive film d2 has a thickness of 30
It is formed to a thickness of 0 to 500 nm (about 400 nm in this embodiment). The Al film has a smaller stress than the Cr film and can be formed to have a large thickness.
It has functions of reducing the resistance values of D1, the drain electrode SD2, and the video signal line DL, and ensuring the step over caused by the gate electrode GT and the i-type semiconductor layer AS (to improve the step coverage).

After patterning the conductive films d1 and d2 with the same mask pattern, the N (+) type semiconductor layer d0 is removed using the same mask or using the conductive films d1 and d2 as a mask. That is, the i-type semiconductor layer AS
The remaining N (+) type semiconductor layer d0 is a conductive film d1,
Portions other than the conductive film d2 are removed by self-alignment.
At this time, since the N (+)-type semiconductor layer d0 is etched so as to completely remove its thickness, the i-type semiconductor layer A is removed.
Although the surface portion of S is also slightly etched, its degree may be controlled by the etching time.

<< Video Signal Line DL >> The video signal line DL is composed of the second conductive film d2 and the third conductive film d3 in the same layer as the source electrode SD1 and the drain electrode SD2. The video signal line DL is formed integrally with the drain electrode SD2.

<< Pixel Electrode PX >> The pixel electrode PX is the second conductive film d of the same layer as the source electrode SD1 and the drain electrode SD2.
2, the third conductive film d3. Also, the pixel electrode P
X is formed integrally with the source electrode SD1.

<< Storage Capacitor Cstg >> The pixel electrode PX is formed so as to overlap with the counter voltage signal line CL at the end opposite to the end connected to the thin film transistor TFT. This superposition constitutes a storage capacitor (capacitance element) Cstg having the pixel electrode PX as one electrode PL2 and the counter voltage signal line CL as the other electrode PL1, as is apparent from FIG. The dielectric film of the storage capacitor Cstg includes an insulating film GI used as a gate insulating film of the thin film transistor TFT and an anodic oxide film AOF.

As shown in FIG. 8, the storage capacitor Cstg is formed in the conductive film g1 of the counter voltage signal line CL in plan view.

In this case, the storage capacitor Cstg is made of aluminum because the material of the electrode positioned below the insulating film GI is formed of Al and the surface thereof is anodized. It is possible to obtain a storage capacitor which is less likely to cause adverse effects due to a point defect (short-circuit with an electrode positioned on the upper side) caused by a so-called hillock or the like.

<< Protective Film PSV1 >> Thin Film Transistor TF
On T, a protective film PSV1 is provided. Protective film PS
V1 is formed mainly to protect the thin film transistor TFT from moisture and the like, and uses a material having high transparency and good moisture resistance. The protective film PSV1 is formed of, for example, a silicon oxide film or a silicon nitride film formed by a plasma CVD apparatus, and has a thickness of about 500 nm.

The protective film PSV1 is formed so as to surround the entire matrix part AR, and the peripheral part is connected to the external connection terminal DT.
M and GTM have been removed to expose. Regarding the thickness relationship between the protective film PSV1 and the gate insulating film GI, the former is made thicker in consideration of the protective effect, and the latter is made thinner in consideration of the transconductance gm of the transistor.

[0109] The color filter substrate Subsequently, returning to FIG. 9 will be described in detail a configuration of the upper transparent glass substrate SUB2 side (color filter substrate).

<< Light-shielding film BM >> Upper transparent glass substrate SUB
On the second side, an unnecessary gap (pixel electrode PX and counter electrode CT)
Transmitted light from the gap other than the gap between
A light-shielding film BM (a so-called black matrix) is formed so as not to lower the contrast ratio and the like. Light shielding film BM
Also serves to prevent external light or backlight light from entering the i-type semiconductor layer AS. That is, the i-type semiconductor layer AS of the thin film transistor TFT is sandwiched between the upper and lower light-shielding films BM and the large gate electrode GT, so that external natural light or backlight does not shine.

In a horizontal electric field type liquid crystal display device, a black matrix having the highest possible resistance is suitable.
Generally, a resin composition is used. For this resistance standard,
Although it is not publicly known, Japanese Patent Application No. 7-1919 filed by the same applicant
No. 94. That is, if the specific resistance of the liquid crystal composition LC is described as 10 ^N as 10 ^N , then the specific resistance of the black matrix BM is 10 ^N Ω · cm or more, and the specific resistance of the black matrix BM is 10 M
When written as 10 ^M and 10 ^M Ω · cm or more and, N ≧
9, a relationship that satisfies M ≧ 6. Alternatively, N ≧ 13,
It is desirable that the relationship satisfy M ≧ 7.

Further, from the viewpoint of reducing the surface reflection of the liquid crystal display device, it is desirable to use a resin composition as a material for forming the black matrix.

Further, compared to the case where a metal film such as Cr is used for the black matrix, the step of etching the metal film is not required, so that the manufacturing process of the color filter substrate can be simplified. When a metal film is used, the manufacturing steps are: 1) metal film formation, 2) resist coating, 3) exposure, 4) development, 5)
Metal film etching, 6) resist stripping.

On the other hand, when a resin is used, the manufacturing process is as follows.
1) resin application, 2) exposure, and 3) development, and the process can be significantly shortened.

However, the resin composition has a lower light-shielding property than the metal film. Increasing the thickness of the resin improves the light-shielding properties, but increases the variation in the thickness of the black matrix. This means that, for example, when there is a thickness variation of ± 10%, when the thickness of the black matrix is 1.0 μm, ± 0.1 μm,
This is because when it is 2 μm, it becomes ± 0.2 μm.

When the thickness of the black matrix is increased, the thickness variation of the color filter substrate increases, and it becomes difficult to improve the gap accuracy of the liquid crystal display substrate.
For the above reasons, it is desirable that the thickness of the resin is 2 μm or less.

In order to increase the OD value to about 4.0 or more at a film thickness of 1 μm, for example, when blackening is performed by increasing the carbon content, the specific resistance value of the black matrix BM is about 10 ⁶
Ω · cm or less and cannot be used at present. OD
The value can be defined as the value obtained by multiplying the extinction coefficient by the film thickness.

For this reason, in this embodiment, the light shielding film BM
Is formed of a resin composition obtained by mixing a black inorganic pigment into a resist material, and is formed to a thickness of about 1.3 ± 0.1 μm. Examples of the inorganic pigment include palladium and electroless plated Ni. Further, the specific resistance of the black matrix BM was set to about 10 ⁹ Ω · cm, and the OD value was set to about 2.0.

The calculation results of the light transmission amount when this resin composition black matrix BM is used are shown below.

OD value = log (100 / Y) Y = ∫A (λ) · B (λ) · C (λ) dλ / ∫A (λ)
C (λ) dλ Here, A is the visibility, B is the transmittance, C is the light source spectrum, and λ is the wavelength of the incident light.

In the case where light is shielded by a film having an OD value of 2.0, Y = 1% is obtained from the above equation (1), and the incident light intensity is 4000 cd /
Assuming m ² , about 40 cd / m ² of light will be transmitted. This light intensity is sufficiently bright to be visually recognized by humans.

The light-shielding film BM is also formed in a frame shape in the peripheral portion, and its pattern is shown in FIG.
Are formed continuously with the pattern of the matrix section shown in FIG.

<< Color Filter FIL >> The color filter FIL is formed in a stripe shape by repeating red, green and blue at a position facing the pixel. The color filter FIL is formed so as to overlap the edge portion of the light shielding film BM.

In the present invention, the plane layout of the overlapping portion is defined. Details will be described later.

The color filter FIL can be formed, for example, as follows. First, the upper transparent glass substrate SU
A dye base such as an acrylic resin is formed on the surface of B2, and the dye base other than the red filter formation region is removed by photolithography. Thereafter, the dyed base material is dyed with a red dye and subjected to a fixing treatment to form a red filter R. Next, the green filter G,
Blue filters B are sequentially formed.

<< Overcoat Film OC >> The overcoat film OC is provided to prevent the dye of the color filter FIL from leaking to the liquid crystal LC and to flatten the steps formed by the color filter FIL and the light shielding film BM. The overcoat film OC is formed of, for example, a transparent resin material such as an acrylic resin or an epoxy resin.

[0127] The liquid crystal layer and the polarizing plate Subsequently, the liquid crystal layer, orientation film, described polarizing plate or the like.

<< Liquid Crystal Layer >> As the liquid crystal material LC, the dielectric anisotropy Δ △ is positive and the value is 13.2, and the refractive index anisotropy Δn
Is 0.081 (589 nm, 20 ° C.), a dielectric anisotropy Δ △ is negative and the value is −7.3, and a refractive index anisotropy Δn is 0.053 (589 nm, 20 ° C.). The nematic liquid crystal of C) was used.

The thickness (gap) of the liquid crystal layer is more than 2.8 μm and less than 4.5 μm when the dielectric anisotropy Δε is positive.
This is because the retardation Δn · d exceeds 0.25 μm.
When it is less than 32 μm, a dielectric constant characteristic having almost no wavelength dependence within the visible light range is obtained, and most of the liquid crystal having a positive dielectric anisotropy Δ △ has a birefringence anisotropy Δn of 0. 0.07 or more
This is because it is less than 09.

On the other hand, when the dielectric anisotropy Δ △ was negative, the thickness (gap) of the liquid crystal layer was more than 4.2 μm and less than 8.0 μm. This is because, like the liquid crystal having a positive dielectric anisotropy Δε, the retardation Δn · d exceeds 0.25 μm by 0.32 μm.
Most of the liquid crystal having a negative dielectric anisotropy Δ △ has a birefringence anisotropy Δn of more than 0.04 to suppress the dielectric anisotropy Δ △ is negative.
This is because it is less than 6.

Further, by combining an alignment film and a polarizing plate described later, the maximum transmittance can be obtained when the liquid crystal molecules are rotated by 45 ° from the rubbing direction to the electric field direction. The thickness (gap) of the liquid crystal layer is controlled by polymer beads.

The liquid crystal material LC is not particularly limited as long as it is a nematic liquid crystal. Dielectric anisotropy △ ε
The larger the value, the lower the driving voltage, and the smaller the refractive index anisotropy Δn, the smaller the thickness (gap) of the liquid crystal layer.
Can be made thicker, the liquid crystal filling time can be shortened, and the gap variation can be reduced.

<< Orientation Film >> Polyimide is used as the orientation film ORI. The rubbing direction RDR is parallel to each other between the upper and lower substrates, and the angle φLC between the applied electric field direction EDR and the angle φLC.
Is 75 °. FIG. 10 shows the relationship.

The rubbing direction RDR and the applied electric field direction E
The angle with DR is 45 ° or more and less than 90 ° when the dielectric anisotropy △ ε of the liquid crystal material is positive, and is more than 0 ° and 45 ° or less when the dielectric anisotropy △ ε is negative. Is fine.

<< Polarizing Plate >> G1220DU (trade name) manufactured by Nitto Denko Corporation was used as the polarizing plate POL. As shown in FIG. 10, the polarization transmission axis MAX1 of the lower polarizing plate POL1 was used.
With the rubbing direction RDR, and the upper polarizer POL
The polarization transmission axis MAX2 is orthogonal to it.

As a result, it is possible to obtain a normally closed characteristic in which the transmittance increases as the voltage applied to the pixel of the present invention (the voltage between the pixel electrode PX and the counter electrode CT) increases.

Further, in the liquid crystal display device referred to as the in-plane switching method disclosed in the present invention, display abnormalities occur when a high potential such as static electricity is applied from outside the surface on the upper substrate SUB2 side. . Therefore, a layer of a transparent conductive film having a sheet resistance of 1 × 10 ⁸ Ω / □ or less is formed further above or on the surface of the upper polarizing plate POL2, or a sheet resistance of 1 × is provided between the polarizing plate and the transparent substrate. I of 10 ⁸ Ω / □ or less
Forming a layer of a transparent conductive film such as TO, or mixing conductive particles such as ITO, SnO ₂ , and In ₂ O _{3 with} the adhesive layer of the polarizing plate to reduce the sheet resistance to 1 × 10 ⁸ Ω / □ or less. It becomes necessary. Regarding this measure, it is not publicly known, but in Japanese Patent Application No. 7-264443 filed by the same applicant,
There is a detailed description of the improvement of the shield function.

<< Configuration around Matrix >> FIG. 11 shows a display panel PNL including upper and lower glass substrates SUB1 and SUB2.
2 is a plan view of a main part around a matrix (AR) of FIG. FIG. 12 shows an external connection terminal GTM to which a scanning circuit is connected on the left side.
It is sectional drawing of a vicinity.

In the manufacture of this panel, if the size is small, to improve the throughput, a single glass substrate is processed at the same time for a plurality of devices and then divided, and if the size is large, the manufacturing equipment is shared. For each type, a glass substrate of a standardized size is processed and then reduced to a size suitable for each type. In each case, the glass is cut after passing through a single process.

FIGS. 11 and 12 show examples of the latter.
11 and 12, the upper and lower substrates SUB1 and SUB2 are used.
LN indicates the edge of both substrates before cutting. In any case, in the completed state, the external connection terminal group T
The size of the upper substrate SUB2 is limited to the inside of the lower substrate SUB1 so that g, Td, and the terminal CTM are present (the upper side and the left side in the figure) so as to expose them.

The terminal groups Tg and Td are respectively a scanning circuit connection terminal GTM and a video signal circuit connection terminal DT described later.
M and a plurality of lead wiring portions are collectively named in units of a tape carrier package TCP (see FIGS. 12 and 13) on which the integrated circuit chip CHI is mounted.

The lead wiring from the matrix section of each group to the external connection terminal section is inclined as approaching both ends. This is because the display panel P is set in the arrangement pitch of the package TCP and the connection terminal pitch in each package TCP.
This is for adjusting to the terminals DTM and GTM of the NL.

The opposite electrode terminal CTM is connected to the opposite electrode CT.
Is a terminal for applying a counter voltage from the outside. The counter electrode signal line CL in the matrix portion is connected to a scanning circuit terminal GTM.
, And the common voltage signal lines are grouped together by a common bus line CB to form a common electrode terminal CT
M.

Between the transparent glass substrates SUB1 and SUB2, along the edge thereof, except for the liquid crystal filling opening INJ, the liquid crystal L
A seal pattern SL is formed so as to seal C.
The sealing material is made of, for example, an epoxy resin.

The layers of the orientation films ORI1 and ORI2 are formed inside the seal pattern SL. Polarizing plates POL1, P
OL2 is formed on the outer surfaces of the lower transparent glass substrate SUB1 and the upper transparent glass substrate SUB2, respectively.

The etching LC is sealed in a region partitioned by the seal pattern SL between the lower alignment film ORI1 and the upper alignment film ORI2 for setting the direction of the liquid crystal molecules.
The lower alignment film ORI1 is formed above the protective film PSV1 on the lower transparent glass substrate SUB1 side.

In this liquid crystal display device, various layers are separately stacked on the lower transparent glass substrate SUB1 side and the upper transparent glass substrate SUB2 side, and the seal pattern SL is formed on the substrate SUB2.
Side, the lower transparent glass substrate SUB1 and the upper transparent glass substrate SUB2 are overlapped with each other to form a seal pattern SL
The liquid crystal LC is injected from the opening INJ, the inlet INJ is sealed with an epoxy resin or the like, and the upper and lower substrates are cut to be assembled.

<< Equivalent Circuit of Entire Display Device >> FIG. 14 is a schematic explanatory diagram of peripheral circuits of a liquid crystal display device according to the present invention.
As shown in the figure, the liquid crystal display substrate is constituted by a set of a plurality of pixels in which an image display unit is arranged in a matrix,
Each pixel is configured to independently control the modulation of transmitted light from a backlight disposed behind the liquid crystal display substrate.

An active pixel area is provided on an active matrix substrate SUB1, which is one of the components of the liquid crystal display substrate.
The gate signal line GL and the counter voltage signal line CL, which extend in the x direction (row direction) and are arranged in parallel in the y direction (column direction), extend in the y direction while being insulated from the AR, and extend in the x direction. The provided drain signal line DL is formed.

Here, a unit pixel is formed in a rectangular area surrounded by each of the gate signal line GL, the counter voltage signal line CL, and the drain signal line DL.

The liquid crystal display substrate is provided with a vertical scanning circuit V and a video signal driving circuit H as external circuits, and the vertical scanning circuit V sequentially supplies a scanning signal (voltage) to each of the gate signal lines GL. From the video signal drive circuit H to the drain signal line DL in accordance with the timing.
Is supplied with a video signal (voltage).

The vertical scanning circuit V and the video signal driving circuit H are supplied with power from the liquid crystal driving power supply circuit 3 and input image information from the CPU 1 after being divided into display data and control signals by the controller 2. It is supposed to be.

<< Driving Method >> FIG. 15 is a driving waveform diagram of the liquid crystal display device of the present invention. The opposite voltage is VCH and VCL.
Value AC rectangular wave and the scanning signal VG
(I-1) The non-selection voltage of VG (i) is changed by two values of VCH and VCL every scanning period. The amplitude width of the counter voltage and the amplitude value of the non-selection voltage are the same.

The video signal voltage is a voltage obtained by subtracting half the amplitude of the counter voltage from the voltage to be applied to the liquid crystal layer.

The counter voltage may be DC, but by converting it to AC, the maximum amplitude of the video signal voltage can be reduced, and a video signal drive circuit (signal side driver) having a low withstand voltage can be used.

<< Function of Storage Capacitance Cstg >> Storage Capacitance Cs
tg is written to the pixel (thin film transistor TFT
Is provided for long storage of video information (after the power is turned off).

In the method of applying an electric field parallel to the substrate surface used in the present invention, unlike the method of applying the electric field perpendicular to the substrate surface, the capacitance (the so-called liquid crystal capacitance) formed by the pixel electrode and the counter electrode is different. Since there is almost no storage, the storage Cstg is an essential component.

The storage capacitor Cstg also works to reduce the influence of the gate potential change ΔVg on the pixel electrode potential Vs when the thin film transistor TFT switches. This situation is represented by the following equation.

ΔVs = [Cgs / (Cgs + Cstg +
Cpix)] × ΔVg where Cgs is a parasitic capacitance formed between the gate electrode GT and the source electrode SDI of the thin film transistor TFT,
Cpix represents a capacitance formed between the pixel electrode PX and the counter electrode CT, and ΔVs represents a change in pixel electrode potential due to ΔVg, a so-called feedthrough voltage.

The change ΔVs causes a DC component applied to the liquid crystal LC, but the value can be reduced as the storage capacitance Cstg is increased.

The reduction of the DC component applied to the liquid crystal LC is as follows.
It is possible to improve the life of the liquid crystal LC and reduce so-called burn-in in which a previous image remains when the liquid crystal display screen is switched.

As described above, since the gate electrode GT is made large so as to completely cover the i-type semiconductor layer AS, the area of overlap with the source electrode SDI and the drain electrode SD2 increases, and therefore the parasitic capacitance Cgs increases. The pixel electrode potential Vs has an adverse effect of being easily affected by the gate (scanning) signal Vg. However, the storage capacity Cs
By providing tg, this disadvantage is also eliminated.

<< Manufacturing Method >> Next, a method of manufacturing the above-described substrate SUB1 of the liquid crystal display device will be described.

FIGS. 16, 17 and 18 are explanatory views of the manufacturing process of the liquid crystal display device according to the present invention. In FIG. 16, the central characters are abbreviations of the process names, and the left side in the figure is the thin film transistor TFT portion. The right side shows the flow of processing as viewed from the cross-sectional shape near the gate terminal. Steps A to I are classified according to each photographic process (photolithography) except for the steps B and D, and the cross-sectional views of each process are completed after the photographic process and the photoresist is removed. Shows the stage at which it was completed.

In the present invention, photographic processing refers to a series of operations from application of a photoresist, through selective exposure using a mask to development of the photoresist, and a repetitive description will be omitted. Description will be given below according to the divided steps.

Step A (FIG. 16) A 300 nm-thick Al-Pd or Al-Pd film was formed on a lower transparent glass substrate SUB1 made of AN635 glass (trade name).
Conductive film g made of W, Al-Ta, Al-Ti-Ta, etc.
1 is provided by sputtering. After the photographic processing, the conductive film g1 is selectively etched with a mixed acid solution of phosphoric acid, acid and glacial acetic acid. Thereby, the gate electrode GT, the scanning signal line GL, the counter electrode CT, the counter voltage signal line CL, and the electrode PL
1, gate terminal GTM, first conductive layer of common bus line CB, first conductive layer of counter electrode terminal CTM, gate terminal GT
An anodizing bus line SHg (not shown) connecting M and an anodizing pad (not shown) connected to the anodizing bus line SHg are formed.

Step B (FIG. 16) After the formation of the anodic oxidation mask AO by direct writing, a solution in which 3% tartaric acid was adjusted to PH 6.25 ± 0.05 with ammonia and diluted 1: 9 with ethylene glycol solution was used. The substrate SUB1 is immersed in an anodic oxidizing solution to adjust the formation current density to 0.5 mA / cm ² (constant current formation).

Next, anodic oxidation is performed until a formation voltage of 125 V necessary for obtaining a predetermined film thickness of alumina (Al ₂ O ₃ ) is reached. Thereafter, it is desirable to maintain this state for several tens of minutes (constant voltage formation). This is a uniform Al ₂ O
_This is important for obtaining _three films. Thereby, the conductive film g1 is anodized, and the gate electrode GT and the scanning signal line G
L, counter electrode CT, counter voltage signal line CL and electrode PL1
An anodic oxide film AOF having a thickness of 180 nm is formed thereon.

Step C (FIG. 16) A transparent conductive film g2 made of an ITO film having a thickness of 140 nm is provided by sputtering. After the photographic processing, the transparent conductive film g2 is selectively etched with a mixed acid solution of hydrochloric acid and nitric acid as an etchant, thereby forming the uppermost layer of the gate terminal GTM, the drain terminal DTM, and the second conductive film of the counter electrode terminal CTM. I do.

Step D (FIG. 17) Ammonia gas, silane gas, and nitrogen gas are introduced into the plasma CVD apparatus to provide a 220-nm-thick Si nitride film, and silane gas and hydrogen gas are introduced into the plasma CVD apparatus to form a film. After an i-type amorphous Si film having a thickness of 200 nm is provided, a silane gas, a hydrogen gas, and a phosphine gas are introduced into a plasma CVD apparatus to form an N (+)-type amorphous Si film having a thickness of 30 nm.

Step E (FIG. 17) After the photographic processing, the N (+)-type amorphous Si film and the i-type amorphous Si film are selectively etched using SF ₆ as a dry etching gas. An island of the i-type semiconductor layer AS is formed.

Step F (FIG. 17) After the photo processing, the Si nitride film is selectively etched using SF ₆ as a dry etching gas.

Step G (FIG. 18) A conductive film d1 made of Cr having a thickness of 60 nm is provided by sputtering, and an Al-P film having a thickness of 400 nm is further formed.
A conductive film d2 made of d, Al-Si, Al-Ta, Al-Ti-Ta, or the like is provided by sputtering. After the photographic processing, the conductive film d2 is etched with the same liquid as in Step A,
The conductive film d1 is etched with a ceric ammonium nitrate solution, and the video signal line DL, the source electrode SD1, the drain electrode SD2, the pixel electrode PX, the electrode PL2, the second conductive layer, the third conductive layer and the drain of the common bus line CB are formed. Terminal D
A bus line SHd (not shown) for short-circuiting TM is formed. Next, SF ₆ was introduced into the dry etching apparatus,
By etching the N (+) type amorphous Si film,
The N (+) type semiconductor layer d0 between the source and the drain is selectively removed.

Step H (FIG. 18) An ammonia gas, a silane gas, and a nitrogen gas are introduced into a plasma CVD apparatus to form a 500-nm-thick Si nitride film. After photographic processing, SF is used as the drain etching gas.
_The protective film PSV1 is formed by selectively etching the silicon nitride film by a photolithography technique using ₆ .

<< Display Panel PNL and Drive Circuit Board PCB
1 >> FIG. 19 is a top view showing a state where the display panel PNL, the video signal driving circuit H, and the vertical scanning circuit V shown in FIG. 14 are connected.

CH1 is a driving IC chip for driving the display panel PNL (the lower five are driving ICs on the vertical scanning circuit side)
Chip, drive ICs on the left side of the 10 video signal drive circuits
Chip). TCP is a tape carrier package in which the driving IC chip CH1 is mounted by a tape automated bonding (TAB) method as shown in FIGS. 12 and 13, and PCB1 is a driving circuit in which the above-described TCP, capacitors and the like are mounted. The substrate is divided into two, one for a video signal drive circuit and one for a scan signal drive circuit.

FGP is a frame ground pad.
A spring-shaped fragment provided by cutting into the shield case SHD is soldered. FC is the lower drive circuit board PC
This is a flat cable for electrically connecting B1 to the left drive circuit board PCB1.

As shown in the figure, a flat cable FC in which a plurality of lead wires (phosphor bronze material plated with Sn) is sandwiched and supported by a striped polyethylene layer and a polyvinyl alcohol layer. use.

<< Connection Structure of TCP >> FIG.
FIG. 12 is a diagram showing a cross-sectional structure of a tape carrier package in which an integrated circuit chip CHI constituting a scanning signal driving circuit V and a video signal driving circuit H is mounted on a flexible wiring board, and FIG. FIG. 3 is a cross-sectional view of a main part showing a pair connected to a scanning signal circuit terminal GTM.

In the figure, TTB is an input terminal / wiring portion of the integrated circuit CHI, and TTM is an output terminal / wiring portion of the integrated circuit CHI, which is made of, for example, Cu. The bonding pads PAD of the integrated circuit CHI are connected to the leads by a so-called face-down bonding method.

The outer ends (commonly called outer leads) of the terminals TTB and TTM are respectively connected to the semiconductor integrated circuit chips CH
Corresponds to input and output of I, CRT /
Anisotropic conductive film AC for TFT conversion circuit / power supply circuit SUP
F connects to the liquid crystal display panel PNL.

The package TCP is connected to the panel PNL such that the tip thereof covers the protective film PSV1 exposing the connection terminal GTM on the panel PNL side. Therefore,
Since the outer connection terminal GTM (DTM) is covered with at least one of the protective film PSV1 and the package TCP, the outer connection terminal GTM (DTM) is resistant to electric contact.

BF1 is a base film made of polyimide or the like, and SRS is a solder resist film for masking so that the solder does not stick to unnecessary portions during soldering. The gap between the upper and lower glass substrates outside the seal pattern SL is protected by an epoxy resin EPX or the like after cleaning, and the space between the package TCP and the upper substrate SUB2 is further filled with a silicon resin SIL to multiplex protection.

<< Drive Circuit Board PCB2 >> Drive Circuit Board P
The CB2 has electronic components such as an IC, a capacitor, and a resistor mounted thereon. The drive circuit board PCB2 includes a power supply circuit for obtaining a plurality of divided and stabilized voltage sources from one voltage source, and a CR (Crystal Control Unit) from a host (upper processing unit).
A circuit SUP including a circuit for converting information for T (cathode ray tube) into information for a TFT liquid crystal display device is mounted. C
J is a connector connection portion to which a connector (not shown) connected to the outside is connected.

Drive circuit board PCB1 and drive circuit board PC
B2 is electrically connected by a joiner JN such as a flat cable FC.

The present invention is not limited to a horizontal electric field type liquid crystal display device, but can be similarly applied to a vertical electric field type, other active matrix type liquid crystal display devices, and a simple matrix type liquid crystal display device.

[0187]

As described above, according to the present invention,
It is possible to provide a liquid crystal display device that has low power consumption, has a flicker-free backlight, and can obtain high-quality image display without deteriorating viewing angle characteristics.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a configuration of a first embodiment of a liquid crystal display device according to the present invention.

FIG. 2 is a cross-sectional view illustrating a configuration of a liquid crystal display device according to a second embodiment of the present invention.

FIG. 3 is a sectional view illustrating a configuration of a third embodiment of the liquid crystal display device according to the present invention.

FIG. 4 is a sectional view illustrating a configuration of a fourth embodiment of the liquid crystal display device according to the present invention.

FIG. 5 is an explanatory diagram of a laptop personal computer as an example of an electronic device on which the liquid crystal display device of the present invention is mounted.

FIG. 6 is a plan view showing one pixel of an active matrix type color liquid crystal display device of the present invention, a light-shielding region of a black matrix BM, and its periphery.

FIG. 7 is a cross-sectional view of the thin film transistor TFT taken along the line FF in FIG. 6;

8 is a diagram showing a storage capacitance Cstg along the line GG in FIG. 6;
FIG.

FIG. 9 is a cross-sectional view of the vicinity of an electrode of one pixel and a cross-sectional view of a peripheral portion of the substrate in an image display area of a liquid crystal display substrate of a horizontal electric field type.

FIG. 10 shows a rubbing direction of an alignment film and an applied electric field direction EDR.
FIG. 4 is an explanatory diagram of an angle formed by

FIG. 11 is a plan view of a main part around a matrix of a display panel including upper and lower substrates.

FIG. 12 is a cross-sectional view near an external terminal to which a scanning circuit is connected on the left side.

FIG. 13 is an explanatory diagram of a cross-sectional structure of an output side and an input side of a gate TCP.

FIG. 14 is a schematic explanatory diagram of a peripheral circuit of a liquid crystal display device according to the present invention.

FIG. 15 is a driving waveform diagram of the liquid crystal display device of the present invention.

FIG. 16 is an explanatory diagram of the manufacturing process of the liquid crystal display device according to the present invention.

FIG. 17 is a view showing a manufacturing process of the liquid crystal display device according to the present invention;
It is explanatory drawing following 6.

FIG. 18 is a view showing a manufacturing process of the liquid crystal display device according to the present invention;
It is explanatory drawing following 7.

19 is a top view showing a state where the display panel PNL, the video signal driving circuit H, and the vertical scanning circuit V shown in FIG. 14 are connected.

FIG. 20 is a schematic cross-sectional view illustrating a structural example of a liquid crystal display device.

21 is a schematic cross-sectional view illustrating a conventional structure of a backlight mounted on the liquid crystal display device shown in FIG.

[Explanation of symbols]

 SUB1 First substrate SUB2 Second substrate LC Liquid crystal layer FIL / BM Color filter / Black matrix ITO Transparent conductive film SL Seal POL1 First polarizer POL2 Second polarizer MD Housing GC Rubber cushion SPC Spacer BL Illumination light source There is a backlight unit. SPS light diffusion plate GLB light guide plate LS reflection sheet LP linear light source RFS reflection plate PHS fluorescent layer.

Claims (3)

[Claims] 1. A liquid crystal panel having a liquid crystal layer sandwiched between two transparent substrates each having a pixel selection electrode formed on at least one substrate, and a backlight provided on the back surface of the liquid crystal panel. In the liquid crystal display device, the backlight, a linear light source installed along at least one edge of a light guide plate made of a transparent plate, and a reflection plate installed on the side of the light guide plate opposite to the liquid crystal panel And a fluorescent layer formed on the light guide plate side of the reflection plate. 2. A liquid crystal panel having a liquid crystal layer sandwiched between two transparent substrates having electrodes for pixel selection formed on at least one substrate, and a backlight provided on the back surface of the liquid crystal panel. In the liquid crystal display device, the backlight, a linear light source installed along at least one edge of a light guide plate made of a transparent plate, and a reflection plate installed on the side of the light guide plate opposite to the liquid crystal panel And a fluorescent layer formed on the reflection plate side of the light guide plate. 3. The liquid crystal display device according to claim 1, wherein the fluorescent layer has an afterglow characteristic for compensating at least a low luminance period of a light emission cycle of the linear light source.