JPH1063611A5 - - Google Patents

Info

Publication number
JPH1063611A5
JPH1063611A5 JP1997162067A JP16206797A JPH1063611A5 JP H1063611 A5 JPH1063611 A5 JP H1063611A5 JP 1997162067 A JP1997162067 A JP 1997162067A JP 16206797 A JP16206797 A JP 16206797A JP H1063611 A5 JPH1063611 A5 JP H1063611A5
Authority
JP
Japan
Prior art keywords
transaction
buffer
bus
size
transactions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1997162067A
Other languages
English (en)
Japanese (ja)
Other versions
JPH1063611A (ja
Filing date
Publication date
Priority claimed from US08/658,533 external-priority patent/US6055590A/en
Application filed filed Critical
Publication of JPH1063611A publication Critical patent/JPH1063611A/ja
Publication of JPH1063611A5 publication Critical patent/JPH1063611A5/ja
Pending legal-status Critical Current

Links

JP9162067A 1996-06-05 1997-06-05 コンピュータシステム Pending JPH1063611A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/658,533 US6055590A (en) 1996-06-05 1996-06-05 Bridge circuit comprising independent transaction buffers with control logic adapted to store overflow data in second buffer when transaction size exceeds the first buffer size
US658533 1996-06-05

Publications (2)

Publication Number Publication Date
JPH1063611A JPH1063611A (ja) 1998-03-06
JPH1063611A5 true JPH1063611A5 (enExample) 2005-04-07

Family

ID=24641639

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9162067A Pending JPH1063611A (ja) 1996-06-05 1997-06-05 コンピュータシステム

Country Status (4)

Country Link
US (1) US6055590A (enExample)
EP (1) EP0811934B1 (enExample)
JP (1) JPH1063611A (enExample)
DE (1) DE69733101T2 (enExample)

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