JPH10507019A - ステートマシンを用いたマイクロプロセッサプログラミングのための一体型構造及びその回路基板の組み立て方法 - Google Patents
ステートマシンを用いたマイクロプロセッサプログラミングのための一体型構造及びその回路基板の組み立て方法Info
- Publication number
- JPH10507019A JPH10507019A JP8512107A JP51210796A JPH10507019A JP H10507019 A JPH10507019 A JP H10507019A JP 8512107 A JP8512107 A JP 8512107A JP 51210796 A JP51210796 A JP 51210796A JP H10507019 A JPH10507019 A JP H10507019A
- Authority
- JP
- Japan
- Prior art keywords
- microprocessor
- memory
- state machine
- state
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims description 16
- 230000015654 memory Effects 0.000 claims abstract description 51
- 230000008569 process Effects 0.000 claims description 9
- 230000004044 response Effects 0.000 claims description 7
- 230000004913 activation Effects 0.000 claims description 4
- 230000007246 mechanism Effects 0.000 claims description 3
- 230000003213 activating effect Effects 0.000 claims 1
- 230000006870 function Effects 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 6
- 238000012545 processing Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 238000012544 monitoring process Methods 0.000 description 3
- 102100037364 Craniofacial development protein 1 Human genes 0.000 description 2
- 101000880187 Homo sapiens Craniofacial development protein 1 Proteins 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000001010 compromised effect Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
- G06F9/4403—Processor initialisation
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Microcomputers (AREA)
- Stored Programmes (AREA)
Abstract
Description
Claims (1)
- 【特許請求の範囲】 1.マイクロプロセッサと、 プログラム命令を格納するための第1メモリと、 データを格納するための第2メモリと、 入力データバスと、 マイクロプロセッサ起動するための機構とを有する一体型構造(combination )において、 前記入力バスが第3メモリに接続されていることを特徴とし、 前記マイクロプロセッサを起動するための機構が、前記マイクロプロセッサを 起動するための第1状態を含む複数の安定状態を有するステートマシンを含むこ とを特徴とし、 前記ステートマシンからの出力を前記マイクロプロセッサ上の制御入力に接続 することによって、前記ステートマシンが前記第1メモリ及び前記第2メモリか ら情報を検索し、または情報を格納するようにするデータバスを有することを特 徴とする一体型構造。 2.前記ステートマシンが、1つの状態にある前記マイクロプロセッサにデータ メモリアドレス信号を供給して、前記マイクロプロセッサが前記データメモリア ドレス信号に応じて動作を中断している間に、前記第1メモリ及び前記第2メモ リからデータを検索することを特徴とする請求項1に記載の一体型構造。 3.前記入力データバスに接続されて、前記ステートマシンにプログラム命令を 入力すべく前記ステートマシンにプログラムコマンドを供給するプログラミング ユニットを有する請求項2に記載の一体型構造。 4.マイクロプロセッサを有する回路基板の組み立て方法であって、 前記回路基板上に前記マイクロプロセッサを取り付ける過程と、 前記回路基板上にステートマシンを組み込む過程と、 プログラマブルメモリの出力が第1データバスを介して前記マイクロプロセッ サの入力に接続されるように。前記回路基板上にプログラマブルメモリと第1デ ータバスとを組み付ける過程と、 追加的なメモリが、前記プログラマブルメモリからのプログラム命令を第2デ ータバスを通して受け取り、前記マイクロプロセッサにプログラム命令を送るよ に、前記回路基板上に少なくとも1つの追加的なメモリと第2データバスとを組 み付ける過程と、 前記プログラマブルメモリのための特定の状態を設定する命令を含む入力装置 を接続し、前記プログラマブルメモリへ前記第1データバス及び前記第2データ バスを介して命令を与える過程と、 前記状態が前記プログラマブルメモリに格納された後、前記入力装置を取り除 く過程とを有することを特徴とするマイクロプロセッサを有する回路基板の組み 立て方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/317,975 US5652886A (en) | 1994-10-03 | 1994-10-03 | System for loading a boot program into an initially blank programmable memory of a microprocessor using state machine and serial bus |
US08/317,975 | 1994-10-03 | ||
PCT/US1995/012637 WO1996010786A1 (en) | 1994-10-03 | 1995-09-29 | Microprocessor programming using a state machine |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH10507019A true JPH10507019A (ja) | 1998-07-07 |
JP3839844B2 JP3839844B2 (ja) | 2006-11-01 |
Family
ID=23236085
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP51210796A Expired - Fee Related JP3839844B2 (ja) | 1994-10-03 | 1995-09-29 | ステートマシンを用いたマイクロプロセッサシステム及びその起動方法 |
Country Status (6)
Country | Link |
---|---|
US (1) | US5652886A (ja) |
EP (1) | EP0784818B1 (ja) |
JP (1) | JP3839844B2 (ja) |
BR (1) | BR9509218A (ja) |
DE (1) | DE69503064T2 (ja) |
WO (1) | WO1996010786A1 (ja) |
Families Citing this family (29)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3540907B2 (ja) * | 1996-11-01 | 2004-07-07 | カルソニックカンセイ株式会社 | 車載マイクロコンピュータの初期値設定処理装置 |
US5941995A (en) * | 1997-05-20 | 1999-08-24 | Hewlett-Packard Company | Reloading state analyzer |
KR100257674B1 (ko) * | 1997-12-31 | 2000-06-01 | 송재인 | 이중화 프로세서 보드를 이용한 플레쉬 메모리 복사방법 |
SE520101C2 (sv) | 1998-05-13 | 2003-05-27 | Axis Ab | Integrerad krets och metod för att förmå en intgrerad krets att exekvera instruktioner |
US6009012A (en) * | 1998-06-03 | 1999-12-28 | Motorola Inc. | Microcontroller having a non-volatile memory and a method for selecting an operational mode |
US6715043B1 (en) | 1999-03-19 | 2004-03-30 | Phoenix Technologies Ltd. | Method and system for providing memory-based device emulation |
US6401202B1 (en) | 1999-06-18 | 2002-06-04 | Phoenix Technologies Ltd. | Multitasking during BIOS boot-up |
US6405309B1 (en) | 1999-06-18 | 2002-06-11 | Phoenix Technologies Ltd. | Method and apparatus for creating and deploying smaller Microsoft Windows applications for automatic configuration of a computing device |
US6542160B1 (en) | 1999-06-18 | 2003-04-01 | Phoenix Technologies Ltd. | Re-generating a displayed image |
US6457122B1 (en) | 1999-06-18 | 2002-09-24 | Phoenix Technologies Ltd. | Fault tolerant process for the delivery of programs to writeable storage device utilizing pre-operating system software/firmware |
US6453469B1 (en) | 1999-06-18 | 2002-09-17 | Phoenix Technologies Ltd. | Method and apparatus to automatically deinstall an application module when not functioning |
US6477642B1 (en) | 1999-06-18 | 2002-11-05 | Phoenix Technologies Ltd. | Method and apparatus for extending BIOS control of screen display beyond operating system boot process |
US6438750B1 (en) | 1999-06-18 | 2002-08-20 | Phoenix Technologies Ltd. | Determining loading time of an operating system |
US6373498B1 (en) | 1999-06-18 | 2002-04-16 | Phoenix Technologies Ltd. | Displaying images during boot-up and shutdown |
US6486883B1 (en) | 1999-06-18 | 2002-11-26 | Phoenix Technologies, Ltd. | Apparatus and method for updating images stored in non-volatile memory |
US6449682B1 (en) | 1999-06-18 | 2002-09-10 | Phoenix Technologies Ltd. | System and method for inserting one or more files onto mass storage |
US6519659B1 (en) | 1999-06-18 | 2003-02-11 | Phoenix Technologies Ltd. | Method and system for transferring an application program from system firmware to a storage device |
US6473855B1 (en) | 1999-06-18 | 2002-10-29 | Phoenix Technologies Ltd. | Method and apparatus for providing content on a computer system based on usage profile |
US6578142B1 (en) | 1999-06-18 | 2003-06-10 | Phoenix Technologies, Ltd. | Method and apparatus for automatically installing and configuring software on a computer |
DE19928259B4 (de) * | 1999-06-21 | 2009-07-09 | Infineon Technologies Ag | Verfahren und Vorrichtung zum Durchführen eines endlichen Zustandsautomaten |
US6629317B1 (en) * | 1999-07-30 | 2003-09-30 | Pitney Bowes Inc. | Method for providing for programming flash memory of a mailing apparatus |
US6487656B1 (en) | 1999-12-10 | 2002-11-26 | Phoenix Technologies Ltd. | System and method for providing functionalities to system BIOS |
US6622245B1 (en) * | 2000-03-30 | 2003-09-16 | Intel Corporation | Firmware field programming interface and module for programming non-volatile memory on a circuit board while isolating the processor from power using expansion bus controller |
US6839873B1 (en) * | 2000-06-23 | 2005-01-04 | Cypress Semiconductor Corporation | Method and apparatus for programmable logic device (PLD) built-in-self-test (BIST) |
US7051093B1 (en) | 2001-01-24 | 2006-05-23 | Lockheed Martin Corporation | QNX operation system network auto configuration |
FR2824646B1 (fr) * | 2001-05-09 | 2003-08-15 | Canal Plus Technologies | Procede de selection d'une image de logiciel executable |
US20030056071A1 (en) * | 2001-09-18 | 2003-03-20 | Triece Joseph W. | Adaptable boot loader |
US7356680B2 (en) * | 2005-01-22 | 2008-04-08 | Telefonaktiebolaget L M Ericsson (Publ) | Method of loading information into a slave processor in a multi-processor system using an operating-system-friendly boot loader |
WO2009095084A1 (en) * | 2008-02-01 | 2009-08-06 | Pazzi Luca | Method for ensuring safety and liveness rules in a state based design |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4430704A (en) * | 1980-01-21 | 1984-02-07 | The United States Of America As Represented By The Secretary Of The Navy | Programmable bootstrap loading system |
US5063536A (en) * | 1988-03-11 | 1991-11-05 | Washington State University Research Foundation, Inc. | Microprogrammable asynchronous controllers for digital electronic systems |
US5068780A (en) * | 1989-08-01 | 1991-11-26 | Digital Equipment Corporation | Method and apparatus for controlling initiation of bootstrap loading of an operating system in a computer system having first and second discrete computing zones |
EP0476195A1 (en) * | 1990-09-19 | 1992-03-25 | International Business Machines Corporation | Initial program load for computer workstation |
US5381538A (en) * | 1991-10-15 | 1995-01-10 | International Business Machines Corp. | DMA controller including a FIFO register and a residual register for data buffering and having different operating modes |
TW241346B (ja) * | 1991-10-15 | 1995-02-21 | Bull Hn Information Syst | |
FR2692696A1 (fr) * | 1992-06-19 | 1993-12-24 | Sgs Thomson Microelectronics | Procédé pour charger un programme dans une mémoire de programmes associée à un processeur. |
US5493667A (en) * | 1993-02-09 | 1996-02-20 | Intel Corporation | Apparatus and method for an instruction cache locking scheme |
-
1994
- 1994-10-03 US US08/317,975 patent/US5652886A/en not_active Expired - Lifetime
-
1995
- 1995-09-29 DE DE69503064T patent/DE69503064T2/de not_active Expired - Fee Related
- 1995-09-29 WO PCT/US1995/012637 patent/WO1996010786A1/en active IP Right Grant
- 1995-09-29 EP EP95935265A patent/EP0784818B1/en not_active Expired - Lifetime
- 1995-09-29 BR BR9509218A patent/BR9509218A/pt not_active IP Right Cessation
- 1995-09-29 JP JP51210796A patent/JP3839844B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
BR9509218A (pt) | 1998-01-27 |
WO1996010786A1 (en) | 1996-04-11 |
JP3839844B2 (ja) | 2006-11-01 |
EP0784818B1 (en) | 1998-06-17 |
DE69503064D1 (de) | 1998-07-23 |
EP0784818A1 (en) | 1997-07-23 |
DE69503064T2 (de) | 1998-12-03 |
US5652886A (en) | 1997-07-29 |
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