JPH10337046A - Power conversion device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To utilize the high-frequency operation of a semiconductor element and to stably drive current ranging from a zero current to a rated load current, by increasing the dead time of the positive and negative arms of a conversion device when an element current is smaller than a specific current and reducing a dead time when the element current is larger than a specific value. SOLUTION: The control circuit of a power conversion device has current transformers 21, 23, and 24 being provided for each arm, a level-discriminating circuit 31 for discriminating the output level or the polarity of the current transformers 21, 23, and 24, and for example a voltage frequency control circuit 32 as a control circuit for supplying on/off signals to elements 11, 12, 13, and 14a. Further, the control circuit of the power conversion device has a dead time control circuit 33, a gate pulse distributor for supplying a gate pulse to each semiconductor element, and a gate drive circuit 35. A dead time being set by the dead time control circuit 33 is switched by the output signal of the level-discriminating circuit 31 for discriminating the output level of the current transformers 21, 23, and 24 being provided for each arm.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power converter for performing gate control according to a load current.

[0002]

2. Description of the Related Art Power semiconductor devices are classified into a current driving type and a voltage driving type as gate driving methods. Conventionally, current-driven semiconductor devices include thyristors, gate turn-off thyristors (GTOs), and transistors. All of these current-driven semiconductor devices require a gate current of 1 A to several A, and a GTO of several 10 to several 100 A.

On the other hand, voltage-driven semiconductor devices include MOS transistors.
Gate type semiconductor devices having a gate type structure, for example, MOS-FET, IGBT, IEGT (Injection Enha
A current that charges and discharges the capacitance of the gate capacitance flows instantaneously at the time of on / off switching, but the gate current does not flow in a steady state. Therefore, since the gate power can be made very small and the high-speed operation peculiar to the MOS structure can be performed, in recent years, the development of this type of voltage-driven semiconductor device has been promoted, and a high-voltage large current (for example, 4.5 kV- (1000A class) insulated gate semiconductor devices have been developed.

As shown in FIG. 8, the turn-off characteristic of a current-driven semiconductor element, for example, a GTO, is as follows: when the load current of the element is small, the turn-off time is short and the load current is small. It is a general characteristic that the turn-off time becomes longer when is larger. Therefore, in a power converter such as an inverter using a current-driven semiconductor element, the on-gate supply inhibition time (dead time and dead time) to each semiconductor element of the positive and negative arms is considered in consideration of the maximum turn-off time when the maximum current of the element is turned off. ) Is taken longer than the maximum evening off time to prevent short-circuiting of the positive and negative arms (DC short-circuit).

On the other hand, the turn-off characteristics of a voltage-driven semiconductor device such as an insulated gate semiconductor device are completely opposite to those of a current-driven semiconductor device, as shown in FIG.
That is, it is actually observed that the turn-off time is short when the load current is large, and the turn-off time is long when the load current is small.

The reason for this is that, as shown in FIG. 10, when the collector-emitter voltage is small (such as when the element is on), the gate capacitance is large, and the collector-emitter voltage is low. On the other hand, when the load current is very small, the charging from the collector side to the gate capacitor becomes slow when the load current is very small. Therefore, in the insulated gate type semiconductor device, in order to prevent a short circuit of the positive and negative arms (DC short circuit), the dead time of the positive and negative arms should be increased in consideration of the turn-off time when turning off a minute current of the device. Good but
The characteristics of the insulated gate semiconductor device having high-speed switching characteristics cannot be utilized.

In a PWM inverter or the like, it is desirable to increase the switching frequency in order to make the load current as close to a sine wave as possible, but the upper limit frequency is limited by the dead time constraint.

[0008]

In a conventional current-driven semiconductor device, if the dead time of the positive and negative arms of the converter is determined based on the turn-off time when the maximum load current is cut off, the device turns off at light load. Although the time was short, there was no problem. However, in the voltage-driven semiconductor element, when the above-mentioned dead time was determined by the one-off time at the time of the maximum breaking current, the diode reflux mode at the minute current, especially during the regenerative mode operation of the inverter ( In the freewheel mode), no current flows through the self-extinguishing type semiconductor element, so that the turn-off time is longer than when the load current is flowing, and the dead time is insufficient.

If the dead time becomes insufficient, a short circuit between the positive and negative arms (DC short circuit) occurs, and an overcurrent flows through the device.
This causes a failure of the semiconductor element, which is a problem.
In addition, if the dead time is set to be always long, high-frequency operation will be limited, and there will be a problem that the semiconductor device cannot be applied utilizing the high-frequency operation characteristics.

[0010] Accordingly, the present invention has been made in view of the above problems, and an object of the present invention is to make use of the high-frequency operation of a semiconductor device and to provide a reliable device capable of driving stably from zero current to a rated load current. An object of the present invention is to provide a power conversion device having a high gate driving method.

[0011]

In order to achieve the above object, the invention according to claim 1 is provided for each semiconductor element,
An element current detector for detecting a current flowing through the semiconductor element; and, when the detection current of the element current detector is equal to or more than a predetermined value, the semiconductor element provided with the element current detector is turned off, and then the element is turned off. The dead time for supplying the on-gate signal to the semiconductor element paired with the semiconductor element to be detected by the current detector is short, and when the detection current of the element current detector is equal to or less than a predetermined value, the element current detection is performed. Control means for controlling so as to lengthen a dead time from when the semiconductor element provided with the device is turned off to when an on-gate signal is supplied to the paired semiconductor elements.

According to a second aspect of the present invention, there is provided a polarity discriminating means for discriminating a polarity of a current flowing through a semiconductor element based on an output signal of an element current detector. Control is performed so that the on-gate signal to the element is delayed for a predetermined time to extend the dead time.

According to a third aspect of the present invention, there is provided a power supply current detector for detecting a current of a DC power supply, and when a detected current of the power supply current detector is equal to or more than a predetermined value, a predetermined semiconductor element is turned off. After that, the dead time until the on-gate signal is supplied to the semiconductor element paired with the predetermined semiconductor element is short, and when the detection current of the power supply current detector is equal to or less than a predetermined value, after the predetermined semiconductor element is turned off, Control is performed so as to increase the dead time until an on-gate signal is supplied to a semiconductor element that is paired with the predetermined semiconductor element.

According to a fourth aspect of the present invention, an AC output detector is provided in an AC output section of the power converter, and when a current detected by the AC output detector is equal to or more than a predetermined value, a predetermined semiconductor device is provided. After the turn-off, the dead time until the supply of the on-gate signal to the semiconductor element paired with the predetermined semiconductor element is reduced, and when the detection current of the AC output detector is equal to or less than a predetermined value, the predetermined semiconductor element Is controlled so as to lengthen a dead time until an on-gate signal is supplied to a semiconductor element paired with the predetermined semiconductor element after turning off.

Still further, according to a fifth aspect of the present invention, there is provided negative bias voltage detecting means for detecting that the absolute value of the gate negative bias voltage of the semiconductor element has exceeded a predetermined value. A logical product of an output signal and an on-gate command of the semiconductor element paired with the semiconductor element to be detected by the negative bias voltage detection means is controlled to supply an on-gate signal to the paired semiconductor element.

According to a sixth aspect of the present invention, there is provided a gate current detecting means for detecting a negative gate current of the semiconductor element, and an output signal of the gate current detecting means and an output signal of the gate current detecting means are provided. A gate signal is supplied to the paired semiconductor element by a logical product of the semiconductor element to be detected and an on-gate command of the paired semiconductor element.

[0017]

Embodiments of the present invention will be described below with reference to the drawings. (First Embodiment) FIG. 1 shows a first embodiment of the present invention.
And FIG.

As shown in FIG. 1, the main circuit of the power converter according to the present embodiment includes a DC power supply 1 and an insulated gate semiconductor element (hereinafter referred to as an element) 11 connected in series.
, 14, diodes 11 a to 14 a connected in anti-parallel to the respective elements 11 to 14, and at least two sets of diodes connected in anti-parallel to each insulated gate semiconductor element (referred to as an arm). The above-described arm is used to obtain an AC output. The control circuit of the power converter includes a current transformer 2 provided for each arm.
1 to 24, a level discriminating circuit 31 for discriminating the output level or polarity of each current transformer, and a voltage frequency (V / F) control circuit 32 as a control circuit for supplying an on / off signal to each of the elements 11 to 14 And dead time control circuit 33
And a gate pulse distributor 34 for supplying a gate pulse to each semiconductor element, and a gate drive circuit 35.

Current transformers 21 to 24 provided for each arm
The dead time set by the dead time control circuit 33 is switched according to the output signal of the level judgment circuit 31 for judging the output level. That is, when the arm current is smaller than the predetermined value, the dead time is lengthened, and when the arm current is larger than the predetermined value, the dead time is shortened.

As shown in FIG. 2, the level discriminating circuit 31 includes two photocouplers PH1 on the secondary side of a current transformer (21 in FIG. 2) provided for each arm. It can be determined by obtaining the A and B signals in parallel with the polarity and obtaining the A and B signals according to the + direction and one direction of the current.

Second Embodiment Next, a second embodiment of the present invention will be described.
3 is shown in FIG. As shown in FIG. 3, the power converter according to the present embodiment includes a DC power supply 1, insulated gate semiconductor elements (hereinafter, referred to as elements) 11 to 14 connected in series, and respective elements 11 to 14. With the diodes 11a to 14a connected in anti-parallel and the diodes connected in anti-parallel to each element as one arm, at least two or more sets of arms are used to obtain an AC output, and a DC current is detected. The current transformer 25 and the current transformer 2
5 and a V / V which supplies an on / off signal to each of the elements 11 to 14 described above.
It comprises an F control circuit 32, a dead time control circuit 33, a gate distribution circuit 34, and a gate drive circuit 35.

The dead time set in the gate control circuit is switched according to the output signal of the level determination circuit 31 for determining the output level of the current transformer 25 provided for detecting the DC current. That is, when the DC current is smaller than the predetermined value, the dead time is controlled to be long, and when the DC current is larger than the predetermined value, the dead time is controlled to be small.

(Third Embodiment) Next, a third embodiment of the present invention will be described.
FIG. 4 shows an embodiment of the present invention. 4, the same reference numerals as those in FIGS. 1 and 3 indicate the same elements, and the difference is that a current transformer 26 is provided on the AC output line.

A level discriminating circuit 31 for discriminating the output level of the current transformer 26 provided for detecting the AC output current.
, The dead time set in the dead time control circuit 33 is switched. That is, when the DC current is smaller than the predetermined value, the dead time is controlled to be long, and when the DC current is larger than the predetermined value, the dead time is controlled to be small.

(Fourth Embodiment) Next, a fourth embodiment of the present invention will be described.
5 is shown in FIG. 5, the same reference numerals as those in FIGS. 1 and 3 indicate the same elements, and indicate only two arms of the conversion device.

In FIG. 5, a light emitting element (for example, a photocoupler) 40 is provided as means for detecting a negative bias between the gate and the emitter of the elements 11 and 12.
It is determined from the light detection signal that the LED 12 has actually turned off. The elements 11, 1 of the paired arm via AND circuits AND1, AND2 and amplifiers AMP1, AMP2 for obtaining the logical product of the signals X, Y and the gate signals A, B of the paired arm.
2 are supplied with gate signals GA and GB.

FIG. 6 shows the collector voltage VCE, the collector current IC and the gate-emitter voltage VGE when the device is turned off. In order to cut off a relatively large current, a mirror voltage appears once when a gate signal is supplied as shown by a solid line waveform, and immediately thereafter becomes a negative bias voltage. On the other hand, it has been found that when a minute current is cut off, the waveform becomes gentle as shown by a dotted line, and the turn-off time is twice or more.

In FIG. 5, when the element is turned off and the current becomes zero, a negative bias voltage is generated between the gate and the emitter as shown in FIG. 6, and the voltage causes a current to flow through the light emitting element 40. . Thus, by detecting that the element has been turned off and combining the insulated signal with the on-gate command of the paired element and outputting the gate signal, simultaneous turning on of the positive and negative arms can be prevented. Therefore, even if the turn-off time of the element changes, occurrence of a DC short circuit can be prevented.

(Fifth Embodiment) FIG. 7 shows a fifth embodiment of the present invention. In FIG. 7, the same reference numerals as those in FIG. 5 denote the same elements, in which a current detector 50 for detecting a negative gate current when the element is turned off is provided, and a flip-flop 51 operated by the signal is provided. .

While an output signal of the current detector 50 is level-converted and an off-gate current is flowing, a positive gate current (turn-on) of the current detector 50 is used so as not to output an on-gate signal to the paired elements. The flip-flop 51 is reset, the flip-flop 51 is set with a negative gate current, and its output signal a is ANDed with the gate signal of the other arm to output a gate signal so as to output a gate signal. It is constituted by a resistor R7. By using the output signal of the current detector 50 and acting in the same manner as the operation of the fourth embodiment described above, it is possible to prevent the positive and negative arms from being simultaneously turned on. Can be prevented.

[0031]

As described above, according to the present invention, the semiconductor device has a characteristic turn-off characteristic, that is, the turn-off time is short when the current is large and the turn-off time is long when the load current is small. Means for detecting the current flowing in the semiconductor element and its polarity, so that when the current value is smaller than the predetermined current value, the dead time of the positive and negative arms of the converter is extended, and the element current is set to the predetermined value. When it is larger, by controlling the dead time to be smaller, the high frequency operation of the semiconductor element can be utilized, and a power conversion system having a highly reliable gate drive system that can drive stably from zero current to the rated load current. An apparatus can be provided.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram showing a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing a level determining circuit according to the first embodiment shown in FIG. 1;

FIG. 3 is a configuration diagram showing a second embodiment of the present invention.

FIG. 4 is a configuration diagram showing a third embodiment of the present invention.

FIG. 5 is a configuration diagram showing a fourth embodiment of the present invention.

FIG. 6 is a diagram showing an operation of the semiconductor element shown in FIG.

FIG. 7 is a configuration diagram showing a fifth embodiment of the present invention.

FIG. 8 is a diagram showing turn-off characteristics of a GTO.

FIG. 9 is a diagram showing turn-off characteristics of a voltage-driven semiconductor device.

10 is an explanatory diagram of capacitance and voltage of the voltage-driven semiconductor device shown in FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... DC power supply 11-14 ... Semiconductor element 11a-14a ... Freewheel diode 21-26 ... Current transformer 31 ... Level discrimination circuit 32 ... Voltage / frequency (V / F) control circuit 33 ... Dead time control circuit 34 Gate pulse distributor 35 Gate drive circuit 40 Photocoupler 50 Current detector 51 Flip-flop

Claims (6)

[Claims] 1. A series body in which a plurality of semiconductor elements and a diode connected in anti-parallel to the semiconductor element are connected in series, a DC power supply in which a plurality of sets of the series bodies are connected, and the semiconductor element are connected in series. In a power converter configured to obtain AC power from a connection point, an element current detector provided for each of the semiconductor elements and configured to detect a current flowing through the semiconductor element, wherein a detection current of the element current detector is a predetermined value If the value is equal to or greater than the value, the dead time from when the semiconductor element provided with the element current detector is turned off to when the semiconductor element provided with the element current detector is supplied to the semiconductor element paired with the semiconductor element provided with the element current detector is supplied with a dead time. Short, when the detection current of the element current detector is equal to or smaller than a predetermined value, the semiconductor element provided with the element current detector is turned off, and then the semiconductor element forming the pair is turned off. Power conversion device is characterized in that and a control means for controlling so as to increase the dead time until the supply ON gate signal to. 2. A polarity discriminating means for discriminating a polarity of a current flowing through the semiconductor element based on an output signal of the element current detector, and an on-gate signal to the paired semiconductor element based on a discrimination result of the polarity discriminating means. 2. A power conversion apparatus according to claim 1, further comprising control means for delaying a predetermined time to extend the dead time. 3. A power supply current detector for detecting a current of the DC power supply, and when the detected current of the power supply current detector is equal to or more than a predetermined value, the predetermined semiconductor element is turned off and then turned on. The dead time until the on-gate signal is supplied to the paired semiconductor element is short, and when the detection current of the power supply current detector is equal to or less than a predetermined value, the predetermined semiconductor element is turned off, and then the paired semiconductor element is turned off. 2. A control means for controlling so as to extend a dead time until an on-gate signal is supplied.
The power converter according to any one of the preceding claims. 4. An AC output detector in an AC output section of the power converter, and, when a current detected by the AC output detector is equal to or more than a predetermined value, after the predetermined semiconductor element is turned off, the predetermined semiconductor is turned off. The dead time until the on-gate signal is supplied to the semiconductor element to be paired with the element is short, and when the current detected by the AC output detector is equal to or less than a predetermined value, after the predetermined semiconductor element is turned off, the predetermined semiconductor 2. The power conversion device according to claim 1, further comprising control means for controlling so as to increase a dead time until an on-gate signal is supplied to a semiconductor device to be paired with the device. 5. A negative bias voltage detecting means for detecting that an absolute value of a gate negative bias voltage of the semiconductor element has become equal to or more than a predetermined value; an output signal of the negative bias voltage detecting means; Control means for controlling the semiconductor element to be detected by the means to supply an on-gate signal to the paired semiconductor element by a logical product of an on-gate command of the semiconductor element to be paired with the semiconductor element. The power converter according to claim 1. 6. A gate current detecting means for detecting a negative gate current of the semiconductor element, an output signal of the gate current detecting means, and the semiconductor element detected by the gate current detecting means. 2. The power conversion device according to claim 1, further comprising control means for supplying a gate signal to the paired semiconductor device by a logical product of the on-gate command of the paired semiconductor device and an on-gate command of the paired semiconductor device.