JPH10300817A - Semiconductor inspection device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To perform an output signal timing inspection based on output signal in a short time by comparing the output of a semiconductor device with a comparative voltage at a judgment timing set by a delay control circuit. SOLUTION: The function inspection and timing inspection of a semiconductor device 5 are simultaneously performed. The output edge timing 14 of the output A6 of the semiconductor device 5 is inspected by use of a timing detecting circuit 13. An optional judgment timing delay value 15 is added to the output edge timing 14 by a delay control circuit 12, and a timing generating circuit 2 is controlled by the delay control circuit 12 to generate a judgment timing 9 from the timing generating circuit 2. On the other hand, the output A6 of the semiconductor device 5 is compared with a H-comparative voltage value 7 and an L-comparative voltage value 8 by a comparator circuit 1 at the judgment timing 9, and the result is theoretically compared with an expected value pattern 10 from a pattern generator 3 by a theoretical comparative circuit 4 to provide a result of quality judgment.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor inspection apparatus for inspecting a shipment of a semiconductor device.

[0002]

2. Description of the Related Art FIG. 3 shows a configuration diagram of a function test circuit of a conventional semiconductor inspection device. 1 is a comparator circuit, 2 is a timing generator, 3 is a pattern generator, 4 is a logical comparison circuit, and 5 is a semiconductor device. FIG. 4 shows the judgment timing 9,
The relationship between the comparative voltage values 7, 8, the expected value pattern 10, and the output A6 (H output detection pattern) of the semiconductor device 5 is shown.
A conventional technique will be described with reference to FIGS. When the function test of the semiconductor device 5 is performed, the output A of the semiconductor device 5
6 is determined as follows. Timing generator 2
The comparator circuit 1 compares the H-comparison voltage value 7 and the L-comparison voltage value 8 with the output A6 of the semiconductor device 5 at a judgment timing 9 generated by Logical comparison with the expected value pattern 10 is performed to obtain a pass / fail judgment result 11. FIG. 4A shows a state where the determination result is good, and FIG. 4B shows a state where the determination result is negative.

By using such a configuration, it is possible to perform a function test of the semiconductor device 5 at high speed.

[0004]

In recent years, as the speed of a semiconductor device has been increased, the timing accuracy of input / output signals of the semiconductor device 5 has been more strictly required. Therefore, in the shipping inspection of the semiconductor device 5, it is necessary to perform not only the function inspection but also the timing inspection. Among the timings of the input / output signals of the semiconductor device 5, the timing of the input signal and the timing of the output signal based on the input signal are as follows:
It can be generated and determined with high accuracy based on the system clock of the semiconductor inspection device.

However, in order to accurately determine the timing of the output signal based on the output signal of the semiconductor device 5, the determination timing of the comparator circuit 1 is first changed to search for the output edge timing of the semiconductor device 5. There is a need. This search method includes a sequential search method and a binary search method. In any case, it is necessary to execute the function test a plurality of times. For this reason, when inspecting the timing of the output signal based on the output signal of the semiconductor device, there has been a problem that the inspection time becomes longer.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a semiconductor inspection apparatus capable of performing a timing inspection of an output signal based on an output signal in a short time.

[0007]

According to a first aspect of the present invention, there is provided a semiconductor inspection apparatus comprising: a timing detection circuit for detecting an output edge timing of a semiconductor device; a delay control circuit for adding a judgment timing delay value to the output edge timing; A timing generator that generates a determination timing set by the control circuit, a comparator circuit that compares an output of the semiconductor device with a comparison voltage at the determination timing,
The logic circuit includes a logical comparison circuit that performs a logical comparison between a comparison value from the comparator circuit and an expected value from the pattern generator at the determination timing.

According to the semiconductor inspection apparatus of the first aspect, since the determination timing can be controlled in conjunction with the output timing of the semiconductor device, the function inspection and the timing inspection can be performed simultaneously. Compared with the device, the timing inspection can be performed in a short time of one tenth to several tenths.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described with reference to FIGS. FIG. 1 shows a configuration diagram of a timing inspection and function inspection circuit of a semiconductor inspection device according to an embodiment of the present invention. 1 is a comparator circuit, 2 is a timing generator, 3 is a pattern generator, 4 is a logic comparison circuit, 5 is a semiconductor device, 12 is a delay control circuit, and 13 is a timing detection circuit. The function test and the timing test of the semiconductor device 5 are performed simultaneously as follows. First, the output edge timing 14 of the output A6 of the semiconductor device is detected using the timing detection circuit 13. Next, the output edge timing 14 is output from the delay control circuit 12.
Then, an arbitrary judgment timing delay value 15 is added to the signal, and the delay control circuit 12 controls the timing generator 2 to generate the judgment timing 9 from the timing generator 2. On the other hand, the comparator circuit 1 compares the H-comparison voltage value 7 and the L-comparison voltage value 8 with the output A6 of the semiconductor device 5 at the judgment timing 9, and the logical comparison circuit 4 compares the result to the Logical comparison with the value pattern 10 is performed to obtain a pass / fail judgment result 11.

Here, by setting the timing inspection standard value to the judgment timing delay value 15, the function inspection and the timing inspection of the semiconductor device 5 can be simultaneously performed at high speed. FIG. 2 shows the output edge timing 14,
The relationship between the judgment timing delay value 15, the judgment timing 9, and the comparison voltage values 7, 8 is shown in FIG.
(A ') shows the case of the output A6 of the semiconductor device 5, and (b) and (b') show the case of the output B16 (L output detection pattern) of the semiconductor device 5. The output B16 also has the output A6. Perform in the same manner as described above. In this case, the output edge timing 14 of the timing detection circuit 13 matches the output A6, and the output edge timing 14 of the output A6 is reflected not only in the determination timing 9 of the same terminal but also in the determination timing of another terminal. .

FIG. 2A shows a case where the judgment result of the logical comparison circuit 4 for the output A6 is good, and FIG.
Indicates a case where the determination result is negative. Also, FIG.
16 shows a case where the determination result is good, and (b ') shows a case where the determination result is negative.

[0012]

According to the semiconductor inspection apparatus of the first aspect, since the determination timing can be controlled in conjunction with the output timing of the semiconductor device, the function inspection and the timing inspection can be performed simultaneously. Compared with a semiconductor inspection device, a timing inspection can be performed in a short time of several tenths to several tenths.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a timing inspection and function inspection circuit of a semiconductor inspection device according to an embodiment of the present invention.

FIGS. 2A and 2B are explanatory diagrams showing the relationship among the output edge timing, the judgment timing delay value, the judgment timing, the comparison voltage value, and the output of the semiconductor device. FIG. ') Is a state where the judgment result of the output A is negative, (b) is a state where the judgment result of the output B is good,
(B ') is a state where the determination result of the output B is negative.

FIG. 3 is a configuration diagram of a function inspection circuit of a conventional semiconductor inspection device.

FIGS. 4A and 4B are explanatory diagrams showing the relationship among the determination timing, the comparison voltage value, the expected value pattern, and the output of the semiconductor device, wherein FIG. 4A shows a state in which the determination result is good and FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Comparator circuit 2 Timing generator 3 Pattern generator 4 Logical comparison circuit 5 Semiconductor device 6 Output of semiconductor device A 7 H comparison voltage value 8 L comparison voltage value 9 Judgment timing 10 Expected value pattern 11 Pass / fail judgment result 12 Delay control circuit 13 Timing detection circuit 14 Output edge timing 15 Judgment timing delay value 16 Output B of semiconductor device

Claims (1)

[Claims] 1. A timing detection circuit for detecting an output edge timing of a semiconductor device, a delay control circuit for adding a judgment timing delay value to the output edge timing, and a timing for generating a judgment timing set by the delay control circuit A generator, a comparator circuit for comparing the output of the semiconductor device with a comparison voltage at the determination timing, and a logical comparison for performing a logical comparison between a comparison value from the comparator circuit and an expected value from the pattern generator at the determination timing A semiconductor inspection device equipped with a circuit.