JPH10223994A - Electronic circuit board - Google Patents
Electronic circuit boardInfo
- Publication number
- JPH10223994A JPH10223994A JP2392897A JP2392897A JPH10223994A JP H10223994 A JPH10223994 A JP H10223994A JP 2392897 A JP2392897 A JP 2392897A JP 2392897 A JP2392897 A JP 2392897A JP H10223994 A JPH10223994 A JP H10223994A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- electronic circuit
- electrode
- hole
- break groove
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/403—Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、電子回路基板に関
し、特に、ブレーク溝とスルーホールとを備えた電子回
路基板に関する。The present invention relates to an electronic circuit board, and more particularly, to an electronic circuit board having a break groove and a through hole.
【0002】[0002]
【従来の技術】図6(a)に、複数の子基板からなる従
来の電子回路基板の一部拡大図を示し、図6(b)に、
図6(a)のVI−VI線矢視断面斜視図を示す。電子
回路基板50は、各子基板51a、51bの周辺に、除
去縁部または他の子基板から分離するためのブレーク溝
51を備える。また、ブレーク溝51と交差するよう
に、スルーホール52が多数配置される。各スルーホー
ル52側へ延びる複数のリードパターン53は、スルー
ホール52の開口部の全周に形成された表面電極54に
連続している。この表面電極54は、スルーホール52
の内面に形成されるスルーホール電極55を介して電子
回路基板50の裏面にまで延びている。2. Description of the Related Art FIG. 6A is a partially enlarged view of a conventional electronic circuit board including a plurality of sub-boards, and FIG.
6A is a cross-sectional perspective view taken along line VI-VI in FIG. The electronic circuit board 50 is provided with a break groove 51 around each of the daughter boards 51a and 51b for separating from a removal edge or another daughter board. Also, a large number of through holes 52 are arranged so as to intersect with the break grooves 51. The plurality of lead patterns 53 extending to the side of each through hole 52 are continuous with the surface electrode 54 formed on the entire periphery of the opening of the through hole 52. This surface electrode 54 is
Extends to the back surface of the electronic circuit board 50 via the through-hole electrode 55 formed on the inner surface of the electronic circuit board 50.
【0003】このような構成の電子回路基板50では、
ブレーク溝51で子基板51a、51b及び除去縁部
(図示せず)を分割すると、所定の回路が形成された子
基板51a、51bが得られる。そして、得られた子基
板51a、51bは、表面実装用基板として用いられ
る。In the electronic circuit board 50 having such a configuration,
When the sub-boards 51a and 51b and the removal edges (not shown) are divided by the break grooves 51, the sub-boards 51a and 51b on which predetermined circuits are formed are obtained. The obtained sub-boards 51a and 51b are used as surface mounting boards.
【0004】[0004]
【発明が解決しようとする課題】ところが、上記の従来
の電子回路基板においては、表面電極をスルーホールの
開口部の全周に形成し、表面電極に電気的に接続される
スルーホール電極をスルーホールの内面全面に形成する
ため、ブレーク溝に沿って電子回路基板を子基板に分割
する際に、ブレーク溝内に形成される表面電極、及びブ
レーク溝の底部直下に位置するスルーホール電極が障害
となり、電子回路基板がブレーク溝に沿ってスムーズに
分割されず、各子基板に欠けや割れが発生するという問
題がある。However, in the above-mentioned conventional electronic circuit board, the surface electrode is formed all around the opening of the through-hole, and the through-hole electrode electrically connected to the surface electrode is formed. When the electronic circuit board is divided into sub-boards along the break groove, the surface electrode formed in the break groove and the through-hole electrode located immediately below the bottom of the break groove are obstacles when forming the electronic circuit board along the break groove. Therefore, there is a problem that the electronic circuit board is not divided smoothly along the break groove, and chipping or cracking occurs in each of the daughter boards.
【0005】また、電子回路基板を各子基板に分割する
際に、表面電極あるいはスルーホール電極が剥がれると
いう不良が発生し、子基板の歩留りが悪くなるという問
題も生じる。Further, when the electronic circuit board is divided into the respective sub-boards, a defect that the surface electrode or the through-hole electrode is peeled off occurs, and there is also a problem that the yield of the sub-boards is deteriorated.
【0006】本発明は、このような問題点を解決するた
めになされたものであり、ブレーク溝に沿ってスムーズ
に子基板に分割され、かつ子基板の歩留りの良い電子回
路基板を提供することを目的とする。The present invention has been made to solve such a problem, and an object of the present invention is to provide an electronic circuit board which is smoothly divided into sub-boards along break grooves and has a good yield of the sub-boards. Aim.
【0007】[0007]
【課題を解決するための手段】上述する問題点を解決す
るため本発明は、子基板に分割するために形成されたブ
レーク溝に跨るように複数のスルーホールが形成される
とともに、該スルーホールの周囲に形成された表面電極
と、内面に形成されたスルーホール電極とを備えた電子
回路基板であって、前記表面電極の両端部は、前記ブレ
ーク溝の縁から一定間隔離れた箇所に位置し、前記スル
ーホール電極は、前記両端部が相対する表面電極に電気
的に接続され、かつ前記ブレーク溝の底部から一定間隔
離れた箇所で互いに接続されることを特徴とする。SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a method of forming a plurality of through-holes over a break groove formed for dividing a daughter board. An electronic circuit board comprising a surface electrode formed around the periphery of the substrate, and a through-hole electrode formed on the inner surface, wherein both end portions of the surface electrode are located at positions separated by a predetermined distance from an edge of the break groove. The through-hole electrodes are electrically connected at opposite ends thereof to surface electrodes facing each other, and are connected to each other at locations spaced apart from the bottom of the break groove by a predetermined distance.
【0008】本発明の電子回路基板によれば、表面電極
をブレーク溝の縁に、スルーホール電極をブレーク溝の
底部に接触しないようにそれぞれ形成するため、ブレー
ク溝に沿って分割する際に、表面電極及びスルーホール
電極が障害とならない。According to the electronic circuit board of the present invention, the surface electrode is formed at the edge of the break groove and the through-hole electrode is formed so as not to contact the bottom of the break groove. The surface electrode and the through-hole electrode do not hinder.
【0009】[0009]
【発明の実施の形態】図1に、本発明に係る電子回路基
板の一実施例の平面図を示す。電子回路基板10は、セ
ラミック製の平板状基板であり、4つの子基板11a〜
11dを備える。そして、各子基板11a〜11dの周
辺には、除去縁部12または他の子基板子11a〜11
dから分離するためのブレーク溝13が設けられる。ま
た、ブレーク溝13と交差するスルーホール14が多数
配置される。FIG. 1 is a plan view showing an embodiment of an electronic circuit board according to the present invention. The electronic circuit board 10 is a ceramic flat board, and includes four sub-boards 11a to 11c.
11d. The removal edge 12 or other child substrates 11a to 11d are provided around each of the child substrates 11a to 11d.
A break groove 13 is provided for separation from d. Also, a large number of through holes 14 intersecting with the break grooves 13 are arranged.
【0010】各子基板11a〜11dの上面中央部には
ICチップ等の電子部品が搭載されるようになってお
り、そのグランド端子に接続されるグランド電極15が
配置される。また、グランド電極15の周囲には、グラ
ンド電極15の近傍から各スルーホール14側へ延びる
複数のリードパターン16がそれぞれ独立して配置され
る。各リードパターン16は、スルーホール14の周囲
近傍に形成される表面電極17に接続される。An electronic component such as an IC chip is mounted on the center of the upper surface of each of the daughter boards 11a to 11d, and a ground electrode 15 connected to the ground terminal is arranged. Around the ground electrode 15, a plurality of lead patterns 16 extending from the vicinity of the ground electrode 15 to the side of each through hole 14 are independently arranged. Each lead pattern 16 is connected to a surface electrode 17 formed near the periphery of the through hole 14.
【0011】図2(a)に、図1のAの部分の拡大平面
図を示し、図2(b)に、図2(a)のII−II線矢
視断面斜視図を示す。表面電極17の両端部17a、1
7bは、図2(a)に示すように、ブレーク溝13から
一定間隔隔てた箇所に位置する。すなわち、両端部17
a、17bが相対する表面電極17は、ブレーク溝13
を境として分断され、連続的に形成されていない。FIG. 2A is an enlarged plan view of a portion A in FIG. 1, and FIG. 2B is a cross-sectional perspective view taken along the line II-II in FIG. 2A. Both ends 17a, 1 of the surface electrode 17
As shown in FIG. 2A, 7b is located at a position spaced apart from the break groove 13 by a predetermined distance. That is, both ends 17
a, 17b are opposed to the surface electrode 17
And are not formed continuously.
【0012】一方、スルーホール14の内面に形成さ
れ、かつ両端部17a、17bが相対する各表面電極1
7に電気的に接続される各スルーホール電極18は、図
2(b)に示すように、ブレーク溝13の底部19から
一定間隔隔てた箇所で互いに接続され、縁部が略U字状
をなすように連続している。On the other hand, each surface electrode 1 formed on the inner surface of the through hole 14 and having opposite ends 17a and 17b facing each other.
As shown in FIG. 2B, the through-hole electrodes 18 electrically connected to each other are connected to each other at a position spaced from the bottom 19 of the break groove 13 by a constant distance, and the edges have a substantially U-shape. It is continuous as it does.
【0013】そして、このような電子回路基板10を分
割すると、図3に示すような子基板11a(〜11d)
が得られる。子基板11aの側面には、表面上の表面電
極17に電気的に接続されるスルーホール電極18が形
成される。When the electronic circuit board 10 is divided, the sub-boards 11a (to 11d) as shown in FIG.
Is obtained. On the side surface of the daughter board 11a, a through-hole electrode 18 electrically connected to the surface electrode 17 on the front surface is formed.
【0014】以上のような構成となる電子回路基板10
(図1)の製造工程の一例を示す。まず、セラミック材
料を混練してシート状に伸ばしたセラミックシートの所
望の箇所にパンチング等でスルーホール14を形成す
る。次いで、これらのセラミックシートをスルーホール
14が一致するように積層し、プレス加工することによ
り、スルーホール14を備えた平板状のセラミック製基
板を作る。この際、子基板11a〜11dの境界線に沿
ってブレーク溝13を形成する型を用い、セラミック製
基板をプレス加工するときに、同時にブレーク溝13を
形成する。The electronic circuit board 10 having the above configuration
An example of the manufacturing process of FIG. 1 is shown. First, a through hole 14 is formed at a desired position of a ceramic sheet obtained by kneading a ceramic material and extending the sheet by punching or the like. Next, these ceramic sheets are laminated so that the through holes 14 coincide with each other, and pressed to form a flat ceramic substrate having the through holes 14. At this time, a break groove 13 is formed along a boundary line between the daughter boards 11a to 11d, and the break groove 13 is formed at the same time when the ceramic substrate is pressed.
【0015】次いで、プレス加工されたセラミック製基
板は、半焼成され、グランド電極15、リードパターン
16、表面電極17及びスルーホール電極18の各パタ
ーンを印刷した後、完全に焼成される。そして、図2
(b)に示すような形状のスルーホール電極18は、例
えば、表面電極17をスクリーン印刷する際に、スルー
ホール14の一部を有機系樹脂等でマスクした上で、電
極ペーストを裏面から吸引し、その後マスクを除去する
ことにより形成される。Next, the pressed ceramic substrate is semi-baked, and after the respective patterns of the ground electrode 15, the lead pattern 16, the surface electrode 17, and the through-hole electrode 18 are printed, the substrate is completely baked. And FIG.
For example, when the surface electrode 17 is screen-printed, a part of the through-hole 14 is masked with an organic resin or the like, and the electrode paste is sucked from the back surface of the through-hole electrode 18 having the shape shown in FIG. Then, it is formed by removing the mask.
【0016】このように製造された電子回路基板10
は、各子基板11a〜11d毎に分割できることから、
多量の異種、あるいは同種の電子回路を形成することが
でき、各電子回路を有する子基板の量産化ができる。The electronic circuit board 10 manufactured as described above
Can be divided for each of the sub-boards 11a to 11d.
A large number of different types or the same type of electronic circuits can be formed, and mass production of a child substrate having each electronic circuit can be achieved.
【0017】上記のような、本実施例の電子回路基板に
よれば、表面電極がブレーク溝の縁に、スルーホール電
極がブレーク溝の底部に接触しないように形成されるた
め、ブレーク溝に沿って電子回路基板を各子基板に分割
する際に、表面電極及びスルーホール電極が障害となら
ない。したがって、ブレーク溝に沿ってスムーズに分割
することができため、各子基板に欠けや割れが生じず、
電子回路基板から子基板を得る製造工程において、歩留
りが向上する。According to the electronic circuit board of the present embodiment as described above, the surface electrode is formed at the edge of the break groove and the through-hole electrode is formed so as not to contact the bottom of the break groove. When the electronic circuit board is divided into the respective sub-boards, the surface electrodes and the through-hole electrodes do not hinder. Therefore, since it can be divided smoothly along the break groove, chipping or cracking does not occur in each child substrate,
In a manufacturing process of obtaining a sub-board from an electronic circuit board, the yield is improved.
【0018】また、電子回路基板を子基板に分割する際
に、導電パターンが剥がれるという不良の発生が少なく
なる。したがって、信頼性の高い子基板を製造すること
ができる。Further, when the electronic circuit board is divided into the sub-boards, the occurrence of defects such as peeling of the conductive pattern is reduced. Therefore, a highly reliable child substrate can be manufactured.
【0019】さらに、スルーホール電極が形成されない
部分がきっかけとなって、容易に、電子回路基板を分割
することができるため、子基板の製造工程を簡略化する
ことができる。Furthermore, the portion where the through-hole electrode is not formed triggers the electronic circuit board to be easily divided, so that the manufacturing process of the daughter board can be simplified.
【0020】また、両端部が相対する表面電極に電気的
に接続されるスルーホール電極が互いに接続されるた
め、各表面電極及び各スルーホール電極を、電子回路基
板内で連続させることができる。したがって、除去縁部
に存在する表面電極にめっき用の電極を接続することに
より、簡単に、各表面電極及び各スルーホール電極にめ
っきを施すことができる。Further, since the through-hole electrodes whose both ends are electrically connected to the opposing surface electrodes are connected to each other, each surface electrode and each through-hole electrode can be made continuous in the electronic circuit board. Therefore, by connecting the plating electrode to the surface electrode present at the removed edge, it is possible to easily perform plating on each surface electrode and each through-hole electrode.
【0021】図4及び図5に、図1の電子回路基板10
から得られた子基板11a(〜11d)をマザーボード
に実装した場合の上面図及び図4におけるV−V線矢視
断面図を示す。FIGS. 4 and 5 show the electronic circuit board 10 of FIG.
5A and 5B are a top view and a cross-sectional view taken along line VV in FIG. 4 when the child boards 11a (to 11d) obtained from FIG.
【0022】マザーボード20に配置された電極21と
子基板11aの側面に配置されたスルーホール電極18
とは互いに正対するように同一ピッチである。そして、
マザーボード20上の電極21と子基板12の側面のス
ルーホール電極18は、リフローソルダリング等によっ
てはんだ22により固着される。この際、はんだ22は
スルーホール電極18に沿って這い上がり、広いはんだ
付け面積となって機械的に強固なものが得られる。な
お、子基板11a上には、子基板11a上に搭載される
素子を保護するために、樹脂ポッティング層からなる保
護層23が設けられる。The electrode 21 disposed on the motherboard 20 and the through-hole electrode 18 disposed on the side surface of the daughter board 11a
Have the same pitch so as to face each other. And
The electrodes 21 on the motherboard 20 and the through-hole electrodes 18 on the side surfaces of the child substrate 12 are fixed by solder 22 by reflow soldering or the like. At this time, the solder 22 creeps up along the through-hole electrode 18 and has a large soldering area, so that a mechanically strong solder can be obtained. Note that a protective layer 23 made of a resin potting layer is provided on the sub-substrate 11a to protect elements mounted on the sub-substrate 11a.
【0023】なお、上述の実施例では、スルーホールの
形状を略長円形状としたが、表面電極がブレーク溝に接
しなければ、円形状、矩形状等どのような形状でもよ
い。In the above-described embodiment, the shape of the through-hole is substantially elliptical, but any shape such as a circle or a rectangle may be used as long as the surface electrode does not contact the break groove.
【0024】また、スルーホール電極は、電子回路基板
の裏面近傍で互いに接続される場合について説明した
が、ブレーク溝の底部に接しなければ、スルーホールの
どの部分で接続されてもよい。Although the case where the through-hole electrodes are connected to each other near the back surface of the electronic circuit board has been described, any portion of the through-hole may be connected as long as it does not contact the bottom of the break groove.
【0025】[0025]
【発明の効果】本発明の電子回路基板によれば、表面電
極がブレーク溝の縁に、スルーホール電極がブレーク溝
の底部に接触しないように形成されるため、ブレーク溝
に沿って電子回路基板を各子基板に分割する際に、表面
電極及びスルーホール電極が障害とならない。したがっ
て、ブレーク溝に沿ってスムーズに分割することができ
ため、各子基板に欠けや割れが生じず、電子回路基板か
ら子基板を得る製造工程において、歩留りが向上する。According to the electronic circuit board of the present invention, since the surface electrode is formed at the edge of the break groove and the through-hole electrode is formed so as not to contact the bottom of the break groove, the electronic circuit board is formed along the break groove. When the substrate is divided into sub-substrates, the surface electrodes and the through-hole electrodes do not hinder. Therefore, since it can be divided smoothly along the break groove, chipping or cracking does not occur in each sub-board, and the yield is improved in the manufacturing process of obtaining the sub-board from the electronic circuit board.
【0026】また、電子回路基板を子基板に分割する際
に、導電パターンが剥がれるという不良の発生が少なく
なる。したがって、信頼性の高い子基板を製造すること
ができる。In addition, when the electronic circuit board is divided into the sub-boards, the occurrence of defects such as peeling of the conductive pattern is reduced. Therefore, a highly reliable child substrate can be manufactured.
【0027】さらに、スルーホール電極が形成されない
部分がきっかけとなって、容易に、電子回路基板を分割
することができるため、子基板の製造工程を簡略化する
ことができる。Furthermore, since the portion where the through-hole electrode is not formed triggers the electronic circuit board to be easily divided, the manufacturing process of the daughter board can be simplified.
【0028】また、両端部が相対する表面電極に電気的
に接続されるスルーホール電極が互いに接続されるた
め、各表面電極及び各スルーホール電極を、電子回路基
板内で連続させることができる。したがって、除去縁部
に存在する表面電極にめっき用の電極を接続することに
より、簡単に、各表面電極及び各スルーホール電極にめ
っきを施すことができる。Further, since the through-hole electrodes whose both ends are electrically connected to the opposing surface electrodes are connected to each other, each surface electrode and each through-hole electrode can be made continuous in the electronic circuit board. Therefore, by connecting the plating electrode to the surface electrode present at the removed edge, it is possible to easily perform plating on each surface electrode and each through-hole electrode.
【図1】本発明の電子回路基板に係る一実施例を示す平
面図である。FIG. 1 is a plan view showing an embodiment of an electronic circuit board according to the present invention.
【図2】(a)は、図1のAの部分の拡大平面図、
(b)は、(a)のII−II線矢視断面斜視図であ
る。FIG. 2A is an enlarged plan view of a portion A in FIG. 1;
(B) is a sectional perspective view taken along line II-II of (a).
【図3】図1の電子回路基板から得られた子基板の一部
拡大斜視図である。FIG. 3 is a partially enlarged perspective view of a child board obtained from the electronic circuit board of FIG. 1;
【図4】図3の子基板をマザーボードに実装した場合の
上面図である。FIG. 4 is a top view when the child board of FIG. 3 is mounted on a motherboard.
【図5】図4におけるV−V線矢視断面図である。FIG. 5 is a sectional view taken along line VV in FIG. 4;
【図6】(a)は、従来の電子回路基板を示す一部拡大
平面図、(b)は、(a)のVI−VI線矢視断面斜視
図である。6A is a partially enlarged plan view showing a conventional electronic circuit board, and FIG. 6B is a cross-sectional perspective view taken along line VI-VI of FIG.
10 電子回路基板 11a〜11d 子基板 13 ブレーク溝 14 スルーホール 17 表面電極 18 スルーホール電極 17a、17b 両端部 19 底部 DESCRIPTION OF SYMBOLS 10 Electronic circuit board 11a-11d Substrate 13 Break groove 14 Through hole 17 Surface electrode 18 Through hole electrode 17a, 17b Both ends 19 Bottom
───────────────────────────────────────────────────── フロントページの続き (72)発明者 西村 幸起 京都府長岡京市天神二丁目26番10号 株式 会社村田製作所内 (72)発明者 窪田 憲二 京都府長岡京市天神二丁目26番10号 株式 会社村田製作所内 (72)発明者 足立 登志郎 京都府長岡京市天神二丁目26番10号 株式 会社村田製作所内 ──────────────────────────────────────────────────の Continued on the front page (72) Inventor Koki Nishimura 2-26-10 Tenjin, Nagaokakyo-shi, Kyoto Stock Company Murata Manufacturing Co., Ltd. (72) Inventor Kenji Kubota 2-26-10 Tenjin, Nagaokakyo-city, Kyoto Stock (72) Inventor Toshiro Adachi 2-26-10 Tenjin, Nagaokakyo-shi, Kyoto Inside Murata Manufacturing Co., Ltd.
Claims (1)
ーク溝に跨るように複数のスルーホールが形成されると
ともに、該スルーホールの周囲に形成された表面電極
と、内面に形成されたスルーホール電極とを備えた電子
回路基板であって、 前記表面電極の両端部は、前記ブレーク溝の縁から一定
間隔離れた箇所に位置し、 前記スルーホール電極は、前記両端部が相対する表面電
極に電気的に接続され、かつ前記ブレーク溝の底部から
一定間隔離れた箇所で互いに接続されることを特徴とす
る電子回路基板。A plurality of through holes are formed so as to straddle a break groove formed for dividing into a daughter board, a surface electrode formed around the through hole, and a through electrode formed on an inner surface. An electronic circuit board comprising: a hole electrode; wherein both end portions of the surface electrode are located at positions separated by a predetermined distance from an edge of the break groove; and the through hole electrode is a surface electrode whose both end portions face each other. An electronic circuit board, which is electrically connected to the circuit board and is connected to each other at a location separated by a predetermined distance from the bottom of the break groove.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2392897A JPH10223994A (en) | 1997-02-06 | 1997-02-06 | Electronic circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2392897A JPH10223994A (en) | 1997-02-06 | 1997-02-06 | Electronic circuit board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH10223994A true JPH10223994A (en) | 1998-08-21 |
Family
ID=12124195
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2392897A Pending JPH10223994A (en) | 1997-02-06 | 1997-02-06 | Electronic circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH10223994A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006128297A (en) * | 2004-10-27 | 2006-05-18 | Kyocera Corp | Multiple wiring board and electronic device |
JP2007250659A (en) * | 2006-03-14 | 2007-09-27 | Murata Mfg Co Ltd | Circuit module and its manufacturing method |
JP2007329318A (en) * | 2006-06-08 | 2007-12-20 | Hitachi Aic Inc | Substrate |
JP2009010103A (en) * | 2007-06-27 | 2009-01-15 | Ngk Spark Plug Co Ltd | Multiple patterning ceramic substrate |
KR20160026806A (en) * | 2014-08-31 | 2016-03-09 | 스카이워크스 솔루션즈, 인코포레이티드 | Devices and methods related to metallization of ceramic substrates for shielding applications |
CN111093321A (en) * | 2020-01-07 | 2020-05-01 | 深圳市江霖电子科技有限公司 | PCB capable of flatly breaking waste edge |
-
1997
- 1997-02-06 JP JP2392897A patent/JPH10223994A/en active Pending
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006128297A (en) * | 2004-10-27 | 2006-05-18 | Kyocera Corp | Multiple wiring board and electronic device |
JP2007250659A (en) * | 2006-03-14 | 2007-09-27 | Murata Mfg Co Ltd | Circuit module and its manufacturing method |
JP2007329318A (en) * | 2006-06-08 | 2007-12-20 | Hitachi Aic Inc | Substrate |
JP2009010103A (en) * | 2007-06-27 | 2009-01-15 | Ngk Spark Plug Co Ltd | Multiple patterning ceramic substrate |
KR20160026806A (en) * | 2014-08-31 | 2016-03-09 | 스카이워크스 솔루션즈, 인코포레이티드 | Devices and methods related to metallization of ceramic substrates for shielding applications |
US11277901B2 (en) | 2014-08-31 | 2022-03-15 | Skyworks Solutions, Inc. | Methods related to metallization of ceramic substrates for shielding applications |
CN111093321A (en) * | 2020-01-07 | 2020-05-01 | 深圳市江霖电子科技有限公司 | PCB capable of flatly breaking waste edge |
CN111093321B (en) * | 2020-01-07 | 2021-05-18 | 深圳市江霖电子科技有限公司 | PCB capable of flatly breaking waste edge |
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