JPH10223993A - Electronic circuit board - Google Patents

Electronic circuit board

Info

Publication number
JPH10223993A
JPH10223993A JP2392797A JP2392797A JPH10223993A JP H10223993 A JPH10223993 A JP H10223993A JP 2392797 A JP2392797 A JP 2392797A JP 2392797 A JP2392797 A JP 2392797A JP H10223993 A JPH10223993 A JP H10223993A
Authority
JP
Japan
Prior art keywords
electronic circuit
circuit board
divided
break groove
along
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2392797A
Other languages
Japanese (ja)
Inventor
Ken Tonegawa
謙 利根川
Harufumi Bandai
治文 萬代
Satoshi Ishino
聡 石野
Yukioki Nishimura
幸起 西村
Kenji Kubota
憲二 窪田
Toshiro Adachi
登志郎 足立
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP2392797A priority Critical patent/JPH10223993A/en
Publication of JPH10223993A publication Critical patent/JPH10223993A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0097Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards

Landscapes

  • Structure Of Printed Boards (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide an electronic circuit board which can be smoothly divided into subordinate substrates along breaking grooves at a high yield. SOLUTION: An electronic circuit board 10 is provided with an ceramic insulating substrate 2, breaking grooves 3, assumed boundary lines 6, and conductor patterns 11. The patterns 11 are formed so that the widths of the patterns 11 may become the narrowest at the parts A crossing the grooves 3, namely, at the parts corresponding to the boundary lines 6. The circuit board 1 is divided into individual subordinate substrates along the grooves 3.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、導体パターン及び
電子回路部品等の電子回路が配置される電子回路基板に
関する。
The present invention relates to an electronic circuit board on which electronic circuits such as conductive patterns and electronic circuit components are arranged.

【0002】[0002]

【従来の技術】厚膜混成集積回路などに適した電子回路
基板を製造するに際しては、従来、半焼成した単一のセ
ラミック絶縁体基板上に、導電パターン、抵抗体パター
ンなどを印刷することにより所望の複数の独立した電子
回路のパターンを形成し、さらに、100℃〜850℃
の雰囲気内で焼成し、各パターンをセラミック絶縁体基
板に固着させて電子回路を形成している。
2. Description of the Related Art Conventionally, when manufacturing an electronic circuit board suitable for a thick-film hybrid integrated circuit, a conductive pattern, a resistor pattern, and the like are printed on a single semi-baked ceramic insulator substrate. Forming a desired plurality of independent electronic circuit patterns,
And an electronic circuit is formed by fixing each pattern to a ceramic insulator substrate.

【0003】このようにして作られた電子回路基板は、
焼成することによりセラミックが脆くなることから、各
電子回路毎に切断することができ、切断された各電子回
路は他の回路素子やリード線が接続されて厚膜混成集積
回路が形成される。したがって、単一の電子回路基板に
は、多量の異種、あるいは、同種の電子回路を形成する
ことができ、厚膜混成集積回路の量産化ができる。
[0003] The electronic circuit board thus produced is
Since the ceramic becomes brittle by firing, it can be cut for each electronic circuit, and each cut electronic circuit is connected to other circuit elements and lead wires to form a thick film hybrid integrated circuit. Therefore, a large number of different types or the same type of electronic circuits can be formed on a single electronic circuit substrate, and mass production of a thick-film hybrid integrated circuit can be achieved.

【0004】ところで、電子回路基板を切断して各電子
回路に分割するためには、各電子回路の間の境界線に沿
って電子回路基板が切断されなければならない。このた
めに、半焼成前のセラミック絶縁体基板上に想定される
境界線に沿って、あらかじめブレーク溝を設け、焼成し
た後押圧などによってブレーク溝に沿い分割することが
できるようにしている。
By the way, in order to cut an electronic circuit board and divide it into each electronic circuit, the electronic circuit board must be cut along a boundary between the electronic circuits. For this purpose, a break groove is provided in advance along a boundary line assumed on the ceramic insulator substrate before semi-firing, and after the firing, it can be divided along the break groove by pressing or the like.

【0005】図5は、従来の電子回路基板1を示す上面
図であり、2はセラミック絶縁体基板、3はブレーク
溝、4は導体パターン、5は抵抗体パターン、6は想定
される境界線を示す。この電子回路基板1は想定される
境界線6で分割されるそれぞれの領域a、b、c、d
に、導電パターン4、抵抗体パターン5により電子回路
が形成される。図6(a)及び図6(b)は、図5に示
すA’部の拡大上面図及び図6(a)のB−B線矢視断
面図である。各境界線6に沿ってブレーク溝3を設けら
れていることにより、焼成して完成した電子回路基板1
に圧力を加えると、電子回路基板1は境界線6に沿って
容易に切断され、各領域a、b、c、d毎に、すなわち
各電子回路を有する子基板毎に分割することができる。
FIG. 5 is a top view showing a conventional electronic circuit board 1, wherein 2 is a ceramic insulator substrate, 3 is a break groove, 4 is a conductor pattern, 5 is a resistor pattern, and 6 is an assumed boundary line. Is shown. This electronic circuit board 1 has respective regions a, b, c, d divided by an assumed boundary line 6.
Then, an electronic circuit is formed by the conductive pattern 4 and the resistor pattern 5. 6 (a) and 6 (b) are an enlarged top view of a portion A ′ shown in FIG. 5 and a cross-sectional view taken along line BB of FIG. 6 (a). Since the break groove 3 is provided along each boundary line 6, the electronic circuit board 1 completed by firing is completed.
When the pressure is applied to the electronic circuit board 1, the electronic circuit board 1 is easily cut along the boundary line 6, and can be divided into each of the regions a, b, c, and d, that is, into each of the sub-boards having each electronic circuit.

【0006】そして、各子基板の側面には、図示しない
が、表面上の導電パターン4に電気的に接続される側面
電極を設ける。
[0006] Although not shown, a side surface electrode electrically connected to the conductive pattern 4 on the surface is provided on the side surface of each daughter board.

【0007】[0007]

【発明が解決しようとする課題】ところが、上記の従来
の電子回路基板においては、導体パターンの抵抗を小さ
くするために、導体パターン上に電気めっきを施す必要
があるが、この際、一度のめっき工程ですべての導体パ
ターン上にめっきが施されるように、各領域の導体パタ
ーンは、ブレーク溝に跨って形成されている。しかしな
がら、電子回路基板を各領域に分割する際に、導体パタ
ーンのブレーク溝に跨っている部分が障害となり、ブレ
ーク溝に沿ってスムーズに分割されず、各子基板に欠け
や割れが発生するという問題がある。
However, in the above-mentioned conventional electronic circuit board, it is necessary to perform electroplating on the conductor pattern in order to reduce the resistance of the conductor pattern. The conductor pattern in each region is formed over the break groove so that plating is performed on all the conductor patterns in the process. However, when the electronic circuit board is divided into the respective regions, a portion straddling the break groove of the conductor pattern becomes an obstacle, and is not smoothly divided along the break groove, and chipping or cracking occurs in each child substrate. There's a problem.

【0008】また、電子回路基板を各子基板に分割する
際に、導電パターンが剥がれるという不良が発生し、子
基板の歩留りが悪くなるという問題も生じる。
Further, when the electronic circuit board is divided into the respective sub-boards, a defect that the conductive pattern is peeled off occurs, and the yield of the sub-boards is deteriorated.

【0009】本発明は、このような問題点を解決するた
めになされたものであり、このような問題点を解決する
ためになされたものであり、ブレーク溝に沿ってスムー
ズに子基板に分割され、かつ子基板の歩留りの良い電子
回路基板を提供することを目的とする。
The present invention has been made to solve such a problem, and has been made to solve such a problem. The present invention has been made to smoothly divide a child substrate along a break groove. It is another object of the present invention to provide an electronic circuit board having a high yield of the sub-board and a good yield.

【0010】[0010]

【課題を解決するための手段】上述する問題点を解決す
るため本発明は、複数の独立した電子回路が形成される
とともに、前記電子回路のそれぞれの境界線に沿ってブ
レーク溝が形成され、前記境界線に沿って前記電子回路
毎に切断、分割される電子回路基板において、前記電子
回路を構成する複数の導体パターンが、前記ブレーク溝
を跨ぐ部位で幅狭に形成されることを特徴とする。
SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention comprises forming a plurality of independent electronic circuits, forming break grooves along respective boundaries of the electronic circuits, In the electronic circuit board cut and divided for each of the electronic circuits along the boundary line, a plurality of conductor patterns constituting the electronic circuit are formed to be narrow at a portion straddling the break groove. I do.

【0011】本発明の電子回路基板によれば、導体パタ
ーンをブレーク溝を跨ぐ部位で幅狭に形成するため、ブ
レーク溝に沿ってスムーズに分割することができる。
According to the electronic circuit board of the present invention, since the conductor pattern is formed to be narrow at a portion straddling the break groove, it can be divided smoothly along the break groove.

【0012】[0012]

【発明の実施の形態】図1(a)は、本発明に係る電子
回路基板の一実施例を示す上面図であって、電子回路基
板のブレーク溝近傍を拡大して示す。また、図1(b)
は、図1(a)のB−B矢視断面図を示す。なお、従来
例と同等の部分には同一符号を付け、その説明を省略す
る。
FIG. 1 (a) is a top view showing an embodiment of an electronic circuit board according to the present invention, and shows an enlarged view of the vicinity of a break groove of the electronic circuit board. FIG. 1 (b)
1 shows a cross-sectional view taken along the line BB in FIG. The same parts as those in the conventional example are denoted by the same reference numerals, and description thereof will be omitted.

【0013】図1において、セラミック絶縁体基板2の
想定される境界線6に沿ってブレーク溝3を設け、導体
パターン11がブレーク溝3を跨ぐ部位A、すなわち境
界線6に対応する部分で最も幅狭になるように形成され
る。そして、電子回路基板10がブレーク溝3に沿って
それぞれの子基板12に分割される。その後、各子基板
12の側面には、図2に示すように、表面上の導体パタ
ーン11に電気的に接続される側面電極13が、スクリ
ーン印刷等の方法で形成される。
In FIG. 1, a break groove 3 is provided along an assumed boundary 6 of the ceramic insulator substrate 2, and a portion A where the conductor pattern 11 straddles the break groove 3, that is, a portion corresponding to the boundary 6, is the most. It is formed so as to be narrow. Then, the electronic circuit board 10 is divided into the respective sub-boards 12 along the break grooves 3. Thereafter, as shown in FIG. 2, a side electrode 13 electrically connected to the conductor pattern 11 on the surface is formed on the side surface of each daughter board 12 by a method such as screen printing.

【0014】このような電子回路基板10を製造するた
めには、セラミック材料を混練し、これをプレス加工し
てまずセラミック絶縁体基板2を作るが、想定される境
界線6に沿ってブレーク溝3を形成する型を用い、セラ
ミック絶縁体基板2をプレス加工するときに、同時にブ
レーク溝3を形成する。次に、プレス加工されたセラミ
ック基板2は、半焼成され、導電パターン11、抵抗体
パターン5による電子回路のパターンを印刷した後、完
全に焼成される。
In order to manufacture such an electronic circuit board 10, a ceramic material is kneaded and pressed to form a ceramic insulator substrate 2. First, a break groove is formed along an assumed boundary line 6. When the ceramic insulator substrate 2 is pressed using the mold for forming the groove 3, the break groove 3 is formed at the same time. Next, the pressed ceramic substrate 2 is semi-baked, and after printing a pattern of an electronic circuit by the conductive pattern 11 and the resistor pattern 5, it is completely baked.

【0015】上記のような、本実施例の電子回路基板に
よれば、電子回路基板に設ける導体パターンをブレーク
溝を跨ぐ部位、すなわち境界線6に対応する部分で最も
幅狭になるように形成するため、電子回路基板をスムー
ズに分割することができ、子基板に欠けや割れが生じな
い。したがって、電子回路基板から子基板を得る製造工
程において、歩留りが向上する。
According to the electronic circuit board of the present embodiment as described above, the conductor pattern provided on the electronic circuit board is formed so as to be narrowest at a portion straddling the break groove, that is, at a portion corresponding to the boundary 6. Therefore, the electronic circuit board can be divided smoothly, and chipping or cracking does not occur in the sub-board. Therefore, the yield is improved in the manufacturing process of obtaining the sub-board from the electronic circuit board.

【0016】また、電子回路基板を子基板に分割する際
に、導電パターンが剥がれるという不良の発生が少なく
なる。したがって、信頼性の高い子基板を得ることがで
きる。
In addition, when the electronic circuit board is divided into the sub-boards, the occurrence of defects such as peeling of the conductive pattern is reduced. Therefore, a highly reliable child substrate can be obtained.

【0017】図3及び図4に、図1の電子回路基板10
から得られた子基板をマザーボードに実装した場合の上
面図及び図3におけるIV−IV線矢視断面図を示す。
FIGS. 3 and 4 show the electronic circuit board 10 of FIG.
FIG. 4 shows a top view in the case where the daughter board obtained from FIG.

【0018】マザーボード20に配置された電極21と
子基板12の側面に配置された側面電極13とは互いに
正対するように同一ピッチである。そして、マザーボー
ド20上の電極21と子基板12の側面の側面電極13
は、リフローソルダリング等によってはんだ14により
固着される。この際、はんだ14は側面電極13に沿っ
て這い上がり、広いはんだ付け面積となって機械的に強
固なものが得られる。
The electrodes 21 arranged on the motherboard 20 and the side electrodes 13 arranged on the side surfaces of the daughter board 12 have the same pitch so as to face each other. Then, the electrodes 21 on the motherboard 20 and the side electrodes 13 on the side surfaces of the child substrate 12 are formed.
Are fixed by solder 14 by reflow soldering or the like. At this time, the solder 14 creeps up along the side electrode 13 and has a large soldering area, so that a mechanically strong solder can be obtained.

【0019】なお、子基板12上には、子基板12上に
搭載されている素子を保護するために、樹脂ポッティン
グ層からなる保護層15が設けられる。
Note that a protective layer 15 made of a resin potting layer is provided on the sub-substrate 12 in order to protect the elements mounted on the sub-substrate 12.

【0020】[0020]

【発明の効果】本発明の電子回路基板によれば、電子回
路基板に設ける導体パターンをブレーク溝を跨ぐ部位で
幅狭になるように形成するため、電子回路基板をブレー
ク溝に沿ってスムーズに分割することができ、子基板に
欠けや割れが生じない。したがって、電子回路基板から
子基板を得る製造工程において、歩留りが向上する。
According to the electronic circuit board of the present invention, since the conductor pattern provided on the electronic circuit board is formed so as to be narrow at a portion straddling the break groove, the electronic circuit board can be smoothly moved along the break groove. It can be divided, and chipping and cracking do not occur in the child substrate. Therefore, the yield is improved in the manufacturing process of obtaining the sub-board from the electronic circuit board.

【0021】また、電子回路基板を子基板に分割する際
に、導電パターンが剥がれるという不良の発生が少なく
なる。したがって、信頼性の高い子基板を得ることがで
きる。
In addition, when the electronic circuit board is divided into the sub-boards, the occurrence of defects such as peeling of the conductive pattern is reduced. Therefore, a highly reliable child substrate can be obtained.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の電子回路基板に係る一実施例を示す
(a)一部拡大平面図、(b)B−B矢視断面図であ
る。
FIG. 1A is a partially enlarged plan view showing an embodiment of an electronic circuit board according to the present invention, and FIG.

【図2】図1の電子回路基板から得られた子基板の一部
拡大斜視図である。
FIG. 2 is a partially enlarged perspective view of a child board obtained from the electronic circuit board of FIG.

【図3】図2の子基板をマザーボードに実装した場合の
上面図である。
FIG. 3 is a top view when the child board of FIG. 2 is mounted on a motherboard.

【図4】図3におけるIV−IV線矢視断面図である。FIG. 4 is a sectional view taken along line IV-IV in FIG. 3;

【図5】従来の電子回路基板を示す上面図である。FIG. 5 is a top view showing a conventional electronic circuit board.

【図6】図2の電子回路基板のA部を示す(a)一部拡
大平面図、(b)B−B矢視断面図である。
6A is a partially enlarged plan view showing part A of the electronic circuit board of FIG. 2, and FIG. 6B is a cross-sectional view taken along line BB.

【符号の説明】[Explanation of symbols]

3 ブレーク溝 6 境界線 10 電子回路基板 11 導体パターン A 幅狭の部位 DESCRIPTION OF SYMBOLS 3 Break groove 6 Boundary line 10 Electronic circuit board 11 Conductor pattern A Narrow part

───────────────────────────────────────────────────── フロントページの続き (72)発明者 西村 幸起 京都府長岡京市天神二丁目26番10号 株式 会社村田製作所内 (72)発明者 窪田 憲二 京都府長岡京市天神二丁目26番10号 株式 会社村田製作所内 (72)発明者 足立 登志郎 京都府長岡京市天神二丁目26番10号 株式 会社村田製作所内 ──────────────────────────────────────────────────の Continued on the front page (72) Inventor Koki Nishimura 2-26-10 Tenjin, Nagaokakyo-shi, Kyoto Stock Company Murata Manufacturing Co., Ltd. (72) Inventor Kenji Kubota 2-26-10 Tenjin, Nagaokakyo-city, Kyoto Stock (72) Inventor Toshiro Adachi 2-26-10 Tenjin, Nagaokakyo-shi, Kyoto Inside Murata Manufacturing Co., Ltd.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 複数の独立した電子回路が形成されると
ともに、前記電子回路のそれぞれの境界線に沿ってブレ
ーク溝が形成され、前記境界線に沿って前記電子回路毎
に切断、分割される電子回路基板において、 前記電子回路を構成する複数の導体パターンが、前記ブ
レーク溝を跨ぐ部位で幅狭に形成されることを特徴とす
る電子回路基板。
1. A plurality of independent electronic circuits are formed, break grooves are formed along respective boundaries of the electronic circuits, and cut and divided for each of the electronic circuits along the boundaries. An electronic circuit board, wherein a plurality of conductor patterns constituting the electronic circuit are formed to be narrow at a portion straddling the break groove.
JP2392797A 1997-02-06 1997-02-06 Electronic circuit board Pending JPH10223993A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2392797A JPH10223993A (en) 1997-02-06 1997-02-06 Electronic circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2392797A JPH10223993A (en) 1997-02-06 1997-02-06 Electronic circuit board

Publications (1)

Publication Number Publication Date
JPH10223993A true JPH10223993A (en) 1998-08-21

Family

ID=12124170

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2392797A Pending JPH10223993A (en) 1997-02-06 1997-02-06 Electronic circuit board

Country Status (1)

Country Link
JP (1) JPH10223993A (en)

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