JPH10190176A - Circuit board - Google Patents

Circuit board

Info

Publication number
JPH10190176A
JPH10190176A JP8347197A JP34719796A JPH10190176A JP H10190176 A JPH10190176 A JP H10190176A JP 8347197 A JP8347197 A JP 8347197A JP 34719796 A JP34719796 A JP 34719796A JP H10190176 A JPH10190176 A JP H10190176A
Authority
JP
Japan
Prior art keywords
circuit board
circuit
metal
ceramic substrate
heat
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8347197A
Other languages
Japanese (ja)
Inventor
Kenji Kadota
健次 門田
Junichi Suzaki
純一 須崎
Toichi Takagi
東一 高城
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denka Co Ltd
Original Assignee
Denki Kagaku Kogyo KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denki Kagaku Kogyo KK filed Critical Denki Kagaku Kogyo KK
Priority to JP8347197A priority Critical patent/JPH10190176A/en
Publication of JPH10190176A publication Critical patent/JPH10190176A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a circuit board high in reliability by a method in which crack generated readily in a ceramic substrate due to residue stress attributed to a heat cycle, etc., are reduced when the circuit board is used for applications generating large heat for a power module, etc. SOLUTION: In a circuit board in which a metal circuit a is formed on one face of a ceramic board and a metal heat-radiating plate e is formed on the reverse face via junction layers, b, d, control is performed by projecting the junction layer 0.1 to 1.0 times the thickness of a metal member from an end part of the metal member, thereby a circuit board excellent in heat-cycle- resistance is obtained. Further, if a contact angle made by the junction layer and the board is set 90 deg. or less, preferably 45 deg. or less, further, is effective for reducing a residual stress and this affects cracks prevention.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、高い信頼性、放熱
性を要する電子部品のパワーモジュール等に使用される
回路基板に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board used for a power module of an electronic component requiring high reliability and heat radiation.

【0002】[0002]

【従来の技術】従来から各種電子機器の構成部品とし
て、アルミナ(Al2O3)、窒化アルミニウム(Al
N)、酸化ベリリウム(BeO)などのセラミックス焼
結体基板表面に導電層として銅(Cu)回路板等を一体
に接合した回路基板が広く使用されている。
2. Description of the Related Art Conventionally, alumina (Al2O3), aluminum nitride (Al
N), a circuit board in which a copper (Cu) circuit board or the like is integrally bonded as a conductive layer to the surface of a ceramic sintered body substrate such as beryllium oxide (BeO) is widely used.

【0003】これらの回路基板は、熱伝導性および電気
伝導性に優れたCu等の金属により回路板を形成してい
るため、回路動作の遅延が減少するとともに回路配線の
寿命も向上するし、半田等の接合材料に対する濡れ性が
向上し、セラミックス焼結体表面に半導体素子(ICチ
ップ)や電極板を高い接合強さで接合することができ、
その結果、半導体素子からの発熱の放散性や素子の動作
信頼性を良好に保つことができ、更にセラミックス基板
の放熱面にもCu等の金属板を接合することにより、セ
ラミックス基板の応力緩和および熱変形防止の目的も達
成できるという利点を有している。
[0003] In these circuit boards, since the circuit board is formed of a metal such as Cu having excellent thermal conductivity and electric conductivity, the delay of circuit operation is reduced and the life of circuit wiring is improved. Improves wettability to bonding materials such as solder and enables semiconductor elements (IC chips) and electrode plates to be bonded to the surface of the ceramic sintered body with high bonding strength.
As a result, the heat dissipation from the semiconductor element and the operation reliability of the element can be kept good. Further, by joining a metal plate such as Cu to the heat radiation surface of the ceramic substrate, the stress relaxation of the ceramic substrate can be reduced. It has the advantage that the object of preventing thermal deformation can also be achieved.

【0004】パワーモジュール用回路基板は、パワーモ
ジュールへの実装工程において、金属回路のパターンと
パターンの間のセラミックス基板や金属回路の端部のセ
ラミックス基板にクラックが発生し、パワーモジュール
使用時に破壊し、パワーモジュールが動作不能となる問
題がある。セラミックス基板にクラックが発生する原因
としては、セラミックスとろう材及び回路用又は放熱用
の金属板との熱膨張差に起因する残留応力の影響が大き
いと考えられている。
[0004] In the process of mounting on a power module, a crack occurs in the ceramic substrate between the patterns of the metal circuit and the ceramic substrate at the end of the metal circuit during the mounting process on the power module. There is a problem that the power module becomes inoperable. It is considered that the cause of cracks in the ceramic substrate is largely due to the residual stress caused by the difference in thermal expansion between the ceramic and the brazing material and between the circuit board and the metal plate for heat dissipation.

【0005】回路基板の回路形成方法としては以下に示
すような方法が知られている。 (1)セラミックス基板上にろう材ペーストを回路パタ
ーンに印刷し、その回路パターンを少なくとも覆うよう
にあらかじめ作製された金属回路板を接合する搭載法。
The following method is known as a method for forming a circuit on a circuit board. (1) A mounting method in which a brazing material paste is printed on a ceramic substrate in a circuit pattern, and a metal circuit board prepared in advance so as to cover at least the circuit pattern is bonded.

【0006】(2)セラミックス基板の全面にろう材ペ
ーストを塗布し、それを覆うように全面に金属板を接合
し、回路面とする金属板上に回路パターンをエッチング
レジストにより形成させた後、エッチング処理して不要
回路、接合材を部分除去するフルエッチ法。
(2) A brazing material paste is applied to the entire surface of the ceramic substrate, a metal plate is bonded to the entire surface so as to cover the paste, and a circuit pattern is formed on the metal plate serving as a circuit surface by etching resist. A full-etch method in which unnecessary circuits and bonding materials are partially removed by etching.

【0007】(3)セラミックス基板上にろう材ペース
トを目的とする回路形状にパターン印刷し、その全面を
覆うように金属板を接合し、接合体の金属板上に回路パ
ターンをエッチングレジストにより形成させた後、エッ
チング処理して金属回路を形成させるパターン印刷法。
(3) A pattern is printed on a ceramic substrate with a brazing material paste in a desired circuit shape, a metal plate is joined so as to cover the entire surface thereof, and a circuit pattern is formed on the joined metal plate with an etching resist. After that, a pattern printing method in which a metal circuit is formed by etching.

【0008】しかし上記方法には一長一短がある。すな
わち、(1)の方法では、セラミックス基板に与える残
留応力は少ないが、あらかじめ作成された金属回路板を
接合するため、ろう材と金属板の位置関係を精度良く制
御するのが困難であり、また生産性が低く、量産には不
向きであるという問題がある。(2)の方法は生産性は
良好であるが、不要な回路及びろう材除去工程を経るた
め、エッチング後セラミックス基板に大きな応力が残留
する。ろう材の端部は金属板の端部より内側か、直下に
ある。(3)のパターン印刷法は、(2)のフルエッチ
法ほどセラミックス基板に残留応力を与えない。しか
し、基板が大きくなると依然としてセラミックスにクラ
ックを生じ易い問題がある。
However, the above method has advantages and disadvantages. That is, in the method (1), although the residual stress applied to the ceramic substrate is small, it is difficult to control the positional relationship between the brazing material and the metal plate with high accuracy because the metal circuit board prepared in advance is joined. In addition, there is a problem that productivity is low and it is not suitable for mass production. Although the method (2) has good productivity, a large stress remains on the ceramic substrate after the etching because of an unnecessary circuit and a brazing material removing step. The end of the brazing material is inside or just below the end of the metal plate. The pattern printing method of (3) does not give residual stress to the ceramic substrate as much as the full etching method of (2). However, there is still a problem that the ceramics are liable to crack when the substrate is large.

【0009】セラミックス基板に窒化アルミニウムを用
いた場合の窒化アルミニウム回路基板においては、ヒー
トショックやヒートサイクルなどの熱衝撃、熱履歴によ
って生じる損傷に対して十分な耐久性をもたせるため、
銅回路と窒化アルミニウム基板との間に介在させる接合
層の厚みを例えば20μm以上に厚くする例が報告され
ている。(特開平6−196828号公報)しかしなが
ら、接合層の厚みを厚くすると不要なろう材の除去が困
難となるなど、未だ解決すべき課題があった。
In the case where aluminum nitride is used for the ceramic substrate, the aluminum nitride circuit board has sufficient durability against damage caused by heat shock and heat history such as heat shock and heat cycle.
There has been reported an example in which the thickness of a bonding layer interposed between a copper circuit and an aluminum nitride substrate is increased to, for example, 20 μm or more. However, when the thickness of the bonding layer is increased, there is still a problem to be solved such that it becomes difficult to remove unnecessary brazing material.

【0010】[0010]

【発明が解決しようとする課題】本発明は、上記に鑑み
てなされたものであり、回路基板の放熱性、絶縁耐圧を
損なうことなく、セラミックス基板のクラックの発生を
低減させ、信頼性の高いパワーモジュール用回路基板を
提供することを目的とする。
SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and reduces the occurrence of cracks in a ceramic substrate without deteriorating the heat dissipation and dielectric strength of a circuit board, and achieves high reliability. An object of the present invention is to provide a power module circuit board.

【0011】[0011]

【課題を解決するための手段】本発明者らは上記目的を
達成するため、セラミックス基板を用いた回路基板のろ
う材と銅板の位置関係について見直しを行い、ろう材が
銅板の縁よりも少なくとも外にはみ出しているように接
合する事により、クラックが大幅に減少することを見出
し、本発明に到達した。
Means for Solving the Problems In order to achieve the above object, the present inventors reviewed the positional relationship between the brazing material of a circuit board using a ceramic substrate and a copper plate, and found that the brazing material was at least as large as the edge of the copper plate. The inventors have found that cracks are greatly reduced by joining them so as to protrude outside, and have reached the present invention.

【0012】すなわち本発明は、セラミックス基板の片
面に金属回路が、その反対面に金属放熱板が接合層を介
して形成されてなる回路基板であって、接合層が金属部
材の端部から金属部材の厚みの0.1倍以上、1.0倍
以下の長さはみ出している回路基板である。
That is, the present invention relates to a circuit board comprising a ceramic substrate having a metal circuit formed on one surface thereof and a metal radiating plate formed on the other surface thereof via a bonding layer, wherein the bonding layer is formed of metal from an end of the metal member. The circuit board protrudes over a length of 0.1 to 1.0 times the thickness of the member.

【0013】さらに、本発明は接合層とセラミックス基
板のなす角が90度以下である上記の回路基板である。
Further, the present invention is the above circuit board, wherein the angle between the bonding layer and the ceramic substrate is 90 degrees or less.

【0014】さらに、本発明は、セラミックス基板に窒
化アルミニウム焼結体また窒化珪素焼結体を用いた上記
の回路基板である。
Further, the present invention is the above-mentioned circuit substrate using a ceramic substrate with an aluminum nitride sintered body or a silicon nitride sintered body.

【0015】[0015]

【発明の実施の形態】本発明で使用されるセラミックス
基板の材質に特に制限はないが、金属との熱膨張差の大
きい窒化アルミニウム、又は窒化珪素の場合特にクラッ
ク低減効果が大きい。セラミックス基板は、良好な放熱
性を示すためには、熱伝導率が80W/mK以上のもの
が適している。また、セラミックス基板の曲げ強さにつ
いては、回路基板の強さに影響を及ぼすため350MP
a以上が好ましい。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The material of the ceramic substrate used in the present invention is not particularly limited. However, in the case of aluminum nitride or silicon nitride having a large thermal expansion difference from a metal, the effect of reducing cracks is particularly large. A ceramic substrate having a thermal conductivity of 80 W / mK or more is suitable for exhibiting good heat dissipation. Also, regarding the bending strength of the ceramic substrate, 350 MPa
a or more is preferable.

【0016】セラミックス基板の厚みとしては、要求さ
れる回路基板の強さによって異なるが、通常、0.3m
mから1.5mmのものが使われる。
The thickness of the ceramic substrate varies depending on the required strength of the circuit board.
m to 1.5 mm are used.

【0017】本発明において、セラミックス基板に形成
される金属回路もしくは金属回路と金属放熱板について
説明すると、その材質は、銅、ニッケル、アルミニウ
ム、モリブデン、タングステン等の純金属もしくは合金
が用いられる。その金属回路又は金属放熱板の厚みは
0.1〜2.0mmが好ましい。
In the present invention, a metal circuit or a metal circuit formed on a ceramic substrate and a metal heat radiating plate will be described. The material used is a pure metal or alloy such as copper, nickel, aluminum, molybdenum, and tungsten. The thickness of the metal circuit or metal radiator plate is preferably 0.1 to 2.0 mm.

【0018】本発明において重要なことは、図1に示す
回路基板断面略図において、金属回路の厚みをT、接合
層のはみ出し幅をwとした場合に、w/Tが0.1〜
1.0であることである。 また、w/Tを1.0より
大きくしても残留応力低減の効果は得られない。また図
2に示すように接合層と基板とのなす接触角を90度以
下に好ましくは45度以下にすると、更に残留応力を低
減する効果がありクラック防止に有効である。
What is important in the present invention is that when the thickness of the metal circuit is T and the width of the protrusion of the bonding layer is w in the schematic cross section of the circuit board shown in FIG.
1.0. Further, even if w / T is larger than 1.0, the effect of reducing the residual stress cannot be obtained. As shown in FIG. 2, when the contact angle between the bonding layer and the substrate is set to 90 degrees or less, preferably 45 degrees or less, the residual stress is further reduced, which is effective in preventing cracks.

【0019】本発明のろう材のはみ出しは金属部材の全
周囲で完全に達成されている必要はなく、その一部がは
み出していれば十分である。すなわち回路のコーナー
部、特に凸型のコーナー部、回路の電極取り付け部周
辺、又回路形成部等に残留応力が残りやすく、その部分
で達成されていればよい。はみ出し形成部の長さががあ
まりにも少なければ当然その効果は期待できず、金属回
路の全周の長さの20%以上の長さが接合層のはみ出し
部を形成していることが好ましく、更に好ましくは40
%以上である。さらに、パターンとパターンとの間隔が
狭いと回路間の干渉が起きる危険性があるため、パター
ン間隔は金属回路の厚みの2倍以上であることが好まし
い。
The protrusion of the brazing material of the present invention does not need to be completely achieved around the entire periphery of the metal member, but it is sufficient if a part of the protrusion protrudes. That is, residual stress is likely to remain at the corners of the circuit, particularly at the corners of the convex shape, around the electrode mounting portion of the circuit, and at the circuit forming portion, and it is sufficient if the residual stress is achieved at that portion. If the length of the protruding portion is too small, the effect cannot of course be expected. It is preferable that 20% or more of the entire circumference of the metal circuit forms the protruding portion of the bonding layer. More preferably 40
% Or more. Further, if the distance between the patterns is small, there is a risk of causing interference between circuits. Therefore, the pattern interval is preferably at least twice the thickness of the metal circuit.

【0020】本発明に係る接合層はろう材ペーストを用
いて形成されたものである。ここで使用されるろう材ペ
ーストは、例えば金属回路又は金属放熱板の材質がCu
である場合、AgもしくはCuもしくはAgとCuを含
むろう材である。また基板が窒化アルミニウム、又は窒
化珪素である場合、適宜Ti、Zr等からなる活性金属
成分をろう材に添加することが出来る。
The bonding layer according to the present invention is formed using a brazing material paste. The brazing material paste used here is, for example, the material of the metal circuit or the metal radiator plate is Cu.
Is Ag or Cu or a brazing material containing Ag and Cu. When the substrate is made of aluminum nitride or silicon nitride, an active metal component made of Ti, Zr, or the like can be appropriately added to the brazing material.

【0021】本発明の回路基板を製造する方法は前記
(3)のパターン印刷法がろう材のはみ出し量を制御し
やすい事から好ましい方法であるが、本発明はフルエッ
チ法、搭載法、もしくはその他の製造方法に制限される
ものではない。
The method of manufacturing a circuit board according to the present invention is the preferred method because the pattern printing method (3) is easy to control the amount of protrusion of the brazing material. However, the present invention relates to a full etching method, a mounting method, or a method. It is not limited to other manufacturing methods.

【0022】金属回路、金属放熱板の材質がCuである
場合について製造方法を一例を挙げて説明する。先ず、
セラミックス基板上にろう材ペーストを目的とする銅回
路形状よりはみ出し代分だけ大きく印刷する。はみ出し
代は請求範囲に従って行う。
A method for manufacturing a case where the material of the metal circuit and the metal radiator plate is Cu will be described with reference to an example. First,
The solder paste is printed on the ceramic substrate larger than the intended copper circuit shape by the margin. The protruding margin is performed according to the claims.

【0023】本発明を達成するためには精度良く印刷す
る必要がある。基準となるセラミックス基板の位置決め
精度を上げるため、基板の縁部をダイヤで研削仕上げを
行って、真直度、直角度を1/100以下に高精度加工
してから用いるのが好ましい。その後、全面を覆うよう
にベタCu板を接触配置する。ベタCu板の配置された
窒化アルミニウム基板を熱処理して両者の接合体を得
る。このようにして製造された接合体のCu板上にエッ
チングレジストを用いて目的とする回路パターンを精度
良くスクリーン印刷し、レジスト回路パターンを形成さ
せる。
In order to achieve the present invention, it is necessary to print with high accuracy. In order to improve the positioning accuracy of the reference ceramic substrate, it is preferable that the edge of the substrate is ground and finished with diamond, and the straightness and the squareness are processed to a high precision of 1/100 or less before use. Thereafter, a solid Cu plate is placed in contact so as to cover the entire surface. The aluminum nitride substrate on which the solid Cu plate is disposed is heat-treated to obtain a joined body of the two. A target circuit pattern is screen-printed on the Cu plate of the joined body manufactured in this manner with high precision using an etching resist to form a resist circuit pattern.

【0024】次いで、エッチング処理してパターン外の
不要なCuを除去した後、エッチングレジスト膜を除去
してCu回路を有する窒化アルミニウム回路基板とす
る。その後、Cu回路の酸化と腐食を防止するため、必
要に応じて Niメッキ等により選択的にCu回路上に
保護膜を形成させる。
Next, after etching to remove unnecessary Cu outside the pattern, the etching resist film is removed to obtain an aluminum nitride circuit board having a Cu circuit. Thereafter, in order to prevent oxidation and corrosion of the Cu circuit, a protective film is selectively formed on the Cu circuit by Ni plating or the like as necessary.

【0025】[0025]

【実施例】長さ60mm×幅50mm×厚み0.635
mmの窒化アルミニウム焼結体上の片面にろう材をスク
リーン印刷法により回路パターン+はみ出し量に印刷
し、もう片面にはロウ材を同様に塗布した後、両面にC
u板(厚み:金属回路用Cu板0.3mm、金属放熱用
Cu板0.15mm)を接触配置し、真空中830℃で
30分間熱処理を行い窒化アルミニウム基板とCu板の
接合体を得た。
[Example] Length 60 mm x width 50 mm x thickness 0.635
mm of aluminum nitride sintered body, a brazing material is printed on one side by a screen printing method in a circuit pattern + protruding amount, a brazing material is similarly applied on the other side, and C is applied on both sides.
A u plate (thickness: Cu plate for metal circuit: 0.3 mm, Cu plate for metal heat dissipation: 0.15 mm) was placed in contact with the plate, and heat-treated at 830 ° C. for 30 minutes in vacuum to obtain a joined body of the aluminum nitride substrate and the Cu plate. .

【0026】この接合体のCu板上に紫外線硬化型エッ
チングレジストを、接合層のはみ出し量が所定の寸法と
なるようにスクリーン印刷法により回路パターンを印刷
して硬化させた後、塩化第2鉄溶液でパターン外の不要
なCuを除去した。次いで、レジストを除去した。更
に、無電解NiメッキによりCu回路に選択的にNi保
護膜を形成させた。このようにして、表1の実施例1〜
4、比較例1、2に示す窒化アルミニウム回路基板を完
成させた。また、実施例5については、セラミックス基
板に窒化珪素焼結体を用いた以外は上記と同様にして、
回路基板を作製した。
An ultraviolet-curing etching resist is printed on the Cu plate of the joined body by printing a circuit pattern by a screen printing method so that the amount of protrusion of the joining layer becomes a predetermined size, and is cured. Unnecessary Cu outside the pattern was removed with a solution. Next, the resist was removed. Further, a Ni protective film was selectively formed on the Cu circuit by electroless Ni plating. Thus, Examples 1 to 1 of Table 1
4. The aluminum nitride circuit boards shown in Comparative Examples 1 and 2 were completed. Moreover, about Example 5, it carried out similarly to the above except having used the silicon nitride sintered compact for the ceramics board | substrate,
A circuit board was manufactured.

【0027】これらの回路基板についてヒートサイクル
試験を実施した。ヒートサイクル試験は、−40℃で3
0分間保持し、+125℃で30分間保持する加熱冷却
操作を1サイクルとし、JIS−C−0025に示され
ている温度変化試験方法に準じて実施した。10回、3
0回、50回、100回のヒートサイクル後のクラック
発生の有無を評価した結果を表1に示す。クラックは発
生率で示した。クラックの評価は、ヒートサイクル終了
後、回路間のクラックの有無を蛍光探傷検査により観察
することで行った。
A heat cycle test was performed on these circuit boards. The heat cycle test was performed at -40 ° C for 3 hours.
The heating / cooling operation in which the temperature was held for 0 minute and the temperature was held at + 125 ° C. for 30 minutes was defined as one cycle, and the test was performed according to the temperature change test method shown in JIS-C-0025. 10 times, 3
Table 1 shows the results of evaluating the occurrence of cracks after 0, 50, and 100 heat cycles. Cracks are indicated by incidence. The evaluation of cracks was performed by observing the presence or absence of cracks between circuits by a fluorescence inspection after completion of the heat cycle.

【0028】表1に示す結果から明らかなように、比較
例1、2の回路基板には、ヒートサイクル試験30回で
クラックが発生しているのに比べ、実施例1〜4は、ヒ
ートサイクル30回ではクラックは発生しておらず高い
信頼性を有することは、明らかである。
As is clear from the results shown in Table 1, the circuit boards of Comparative Examples 1 and 2 show cracks in the heat cycle test 30 times. It is clear that no cracks occurred 30 times and high reliability was obtained.

【0029】また、実施例1の回路基板はヒートサイク
ル試験50回でクラックが発生しているのに比べ、実施
例4はヒートサイクル50回ではクラックは発生してお
らず、接合層とセラミックス基板との接触角は45度以
下にする方が効果が高いことは明らかである。更に、実
施例5では、ヒートサイクル試験100回後もクラック
は発生しておらず、本発明の優位性が明らかである。
The circuit board of Example 1 had cracks after 50 heat cycle tests, whereas the circuit board of Example 4 had no cracks after 50 heat cycles, indicating that the bonding layer and the ceramic substrate were not cracked. It is clear that the effect is higher when the contact angle with the substrate is 45 degrees or less. Further, in Example 5, no crack was generated even after 100 heat cycle tests, and the superiority of the present invention is apparent.

【0030】[0030]

【表1】 [Table 1]

【0031】[0031]

【発明の効果】本発明によれば、回路パターンを変更す
ることなく、接合層を金属部材よりはみ出させることに
より、より高い信頼性・放熱性を有するパワーモジュー
ルなどに用いられる回路基板を提供することができる。
According to the present invention, a circuit board used for a power module or the like having higher reliability and heat dissipation can be provided by extending a bonding layer from a metal member without changing a circuit pattern. be able to.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明に係る回路基板について、その断面を
模式的に示したものである。
FIG. 1 schematically shows a cross section of a circuit board according to the present invention.

【図2】 接合層とセラミックス基板との接触角FIG. 2 Contact angle between bonding layer and ceramic substrate

【図3】 実施例、比較例に用いた回路パターンFIG. 3 is a circuit pattern used in Examples and Comparative Examples.

【符号の説明】[Explanation of symbols]

a:金属回路 b:金属回路接合層 c:セラミックス基板 d:金属放熱板接合層 e:金属放熱板 T:金属回路の厚み w:金属回路接合層のはみ出し幅 θ1、θ2、θ3:接合層とセラミックス基板との接触角 a: metal circuit b: metal circuit bonding layer c: ceramic substrate d: metal heat sink bonding layer e: metal heat sink T: thickness of metal circuit w: protrusion width of metal circuit bonding layer θ1, θ2, θ3: bonding layer Contact angle with ceramic substrate

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】セラミックス基板の片面に金属回路が、そ
の反対面に金属放熱板が接合層を介してなる回路基板で
あって、接合層が金属部材の端部から金属部材の厚みの
0.1倍以上、1.0倍以下はみ出していることを特徴
とする回路基板。
1. A circuit board comprising a ceramic substrate having a metal circuit on one side and a metal radiating plate on the opposite side via a bonding layer, wherein the bonding layer has a thickness of 0.1 mm from the end of the metal member to the metal member. A circuit board having an extension of 1 to 1.0 times.
【請求項2】接合層とセラミックス基板のなす角が90
度以下であることを特徴とする請求項1記載の回路基
板。
2. The angle between the bonding layer and the ceramic substrate is 90.
The circuit board according to claim 1, wherein the temperature is equal to or less than a degree.
【請求項3】セラミックス基板に窒化アルミニウム焼結
体また窒化珪素焼結体を用いたことを特徴とする請求項
1または2記載の回路基板。
3. The circuit board according to claim 1, wherein a sintered body of aluminum nitride or sintered body of silicon nitride is used as the ceramic substrate.
JP8347197A 1996-12-26 1996-12-26 Circuit board Pending JPH10190176A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8347197A JPH10190176A (en) 1996-12-26 1996-12-26 Circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8347197A JPH10190176A (en) 1996-12-26 1996-12-26 Circuit board

Publications (1)

Publication Number Publication Date
JPH10190176A true JPH10190176A (en) 1998-07-21

Family

ID=18388584

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8347197A Pending JPH10190176A (en) 1996-12-26 1996-12-26 Circuit board

Country Status (1)

Country Link
JP (1) JPH10190176A (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007018050A1 (en) 2005-08-11 2007-02-15 Denki Kagaku Kogyo Kabushiki Kaisha Silicon nitride substrate, silicon nitride circuit substrate using the same, and its use
US7372132B2 (en) 2004-03-15 2008-05-13 Hitachi, Ltd. Resin encapsulated semiconductor device and the production method
JP2010238753A (en) * 2009-03-30 2010-10-21 Kyocera Corp Heat radiating member, and module using the same
WO2011034075A1 (en) 2009-09-15 2011-03-24 株式会社 東芝 Ceramic circuit board and process for producing same
JP2011211217A (en) * 2011-05-25 2011-10-20 Dowa Holdings Co Ltd Manufacturing method for metal-ceramic junction circuit board
US8269248B2 (en) * 2009-03-02 2012-09-18 Thompson Joseph B Light emitting assemblies and portions thereof
JP2014053619A (en) * 2013-09-30 2014-03-20 Dowa Holdings Co Ltd Method for manufacturing metal-ceramic bonded circuit board
JP2016132113A (en) * 2015-01-16 2016-07-25 昭和電工株式会社 Method for producing composite material of aluminum with carbon particle, and method for producing insulated substrate
EP3358615A4 (en) * 2015-09-28 2019-05-15 Kabushiki Kaisha Toshiba Silicon nitride circuit board and semiconductor module using same
WO2023188670A1 (en) * 2022-03-31 2023-10-05 デンカ株式会社 Circuit board and manufacturing method therefor

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05347469A (en) * 1992-06-12 1993-12-27 Toshiba Corp Ceramic circuit board
JPH06263554A (en) * 1993-03-10 1994-09-20 Toshiba Corp Jointed substrate of ceramics-metal

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05347469A (en) * 1992-06-12 1993-12-27 Toshiba Corp Ceramic circuit board
JPH06263554A (en) * 1993-03-10 1994-09-20 Toshiba Corp Jointed substrate of ceramics-metal

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7372132B2 (en) 2004-03-15 2008-05-13 Hitachi, Ltd. Resin encapsulated semiconductor device and the production method
DE102005008491B4 (en) * 2004-03-15 2009-08-20 Hitachi, Ltd. Power semiconductor device and method for its manufacture
WO2007018050A1 (en) 2005-08-11 2007-02-15 Denki Kagaku Kogyo Kabushiki Kaisha Silicon nitride substrate, silicon nitride circuit substrate using the same, and its use
US8269248B2 (en) * 2009-03-02 2012-09-18 Thompson Joseph B Light emitting assemblies and portions thereof
JP2010238753A (en) * 2009-03-30 2010-10-21 Kyocera Corp Heat radiating member, and module using the same
WO2011034075A1 (en) 2009-09-15 2011-03-24 株式会社 東芝 Ceramic circuit board and process for producing same
US8785785B2 (en) 2009-09-15 2014-07-22 Kabushiki Kaisha Toshiba Ceramic circuit board and process for producing same
US9101065B2 (en) 2009-09-15 2015-08-04 Kabushiki Kaisha Toshiba Ceramic circuit board and process for producing same
EP2480052A4 (en) * 2009-09-15 2016-01-27 Toshiba Kk Ceramic circuit board and process for producing same
EP3273755A1 (en) 2009-09-15 2018-01-24 Kabushiki Kaisha Toshiba Process for producing a ceramic circuit board
JP2011211217A (en) * 2011-05-25 2011-10-20 Dowa Holdings Co Ltd Manufacturing method for metal-ceramic junction circuit board
JP2014053619A (en) * 2013-09-30 2014-03-20 Dowa Holdings Co Ltd Method for manufacturing metal-ceramic bonded circuit board
JP2016132113A (en) * 2015-01-16 2016-07-25 昭和電工株式会社 Method for producing composite material of aluminum with carbon particle, and method for producing insulated substrate
EP3358615A4 (en) * 2015-09-28 2019-05-15 Kabushiki Kaisha Toshiba Silicon nitride circuit board and semiconductor module using same
WO2023188670A1 (en) * 2022-03-31 2023-10-05 デンカ株式会社 Circuit board and manufacturing method therefor

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