JPH10189575A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

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Publication number
JPH10189575A
JPH10189575A JP35596396A JP35596396A JPH10189575A JP H10189575 A JPH10189575 A JP H10189575A JP 35596396 A JP35596396 A JP 35596396A JP 35596396 A JP35596396 A JP 35596396A JP H10189575 A JPH10189575 A JP H10189575A
Authority
JP
Japan
Prior art keywords
film
semiconductor substrate
bpsg film
bpsg
reflow
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP35596396A
Other languages
Japanese (ja)
Inventor
Takuya Horio
琢矢 堀尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Steel Corp
Original Assignee
Nippon Steel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Steel Corp filed Critical Nippon Steel Corp
Priority to JP35596396A priority Critical patent/JPH10189575A/en
Publication of JPH10189575A publication Critical patent/JPH10189575A/en
Withdrawn legal-status Critical Current

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  • Formation Of Insulating Films (AREA)

Abstract

PROBLEM TO BE SOLVED: To lessen a thermal load imposed on a BPSG film in a reflow process so as to planarize the BPSG film by a method wherein a silicon oxide doped with impurities is formed on a semiconductor substrate where a device is formed, and then the semiconductor substrate is subjected to a thermal treatment in an ammonia atmosphere. SOLUTION: A transistor structure equipped with a polysilicon gate electrode 2 is formed on a silicon semiconductor substrate 1. An undoped silicon oxide film 3 of comparatively high quality is formed thereon as a protective film 3. For instance, a BPSG film 5 is formed as an interlayer insulating film on all the surface by a CVD method. The silicon semiconductor substrate 1 is introduced into an oven filled with N2 at an atmospheric pressure, and then the oven is filled with NH3 replacing N2 , treated up to a temperatures of 700 to 800 deg.C, and then kept at a constant temperature. NH3 is fed into the oven at a flow rate of 10 to 50slm or so, and the BPSG film 5 is subjected to a reflow process for 20 to 50 minutes.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は半導体装置の製造方
法に関し、例えば、多層配線構造における層間絶縁膜の
形成方法に適用して特に好適なものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and is particularly suitably applied to, for example, a method for forming an interlayer insulating film in a multilayer wiring structure.

【0002】[0002]

【従来の技術】多層配線構造における層間絶縁膜には、
硼素(B)と燐(P)を含むシリコン酸化膜である硼素
−燐シリケートガラス(BPSG)膜が一般的に用いら
れているが、これは、BPSG膜が、CVD成膜後に熱
処理を行うことによりリフローと呼ばれる膜の流動現象
が生じて素子表面を平坦化させる効果が大きい特徴を有
した高性能な絶縁膜であることによる。
2. Description of the Related Art An interlayer insulating film in a multilayer wiring structure includes:
A boron-phosphorus silicate glass (BPSG) film, which is a silicon oxide film containing boron (B) and phosphorus (P), is generally used. This is because the BPSG film is subjected to a heat treatment after the CVD film formation. This is because the film is a high-performance insulating film having a feature that a flow phenomenon of a film called reflow occurs to greatly flatten the element surface.

【0003】BPSG膜を用いた従来の半導体装置の製
造方法では、例えば、図3(a)に示すように、シリコ
ン基板1に、ゲート電極2を備えたトランジスタ構造
(図示省略)を形成した後、その上に保護膜として、例
えば、プラズマ化学気相成長(プラズマCVD)法によ
りノンドープのシリコン酸化膜3を形成し、次に、図3
(b)に示すように、BPSG膜5をCVD法にて堆積
し、次に、図3(c)に示すように、窒素(N2 )雰囲
気中で700〜900℃程度、20〜50分間の熱処理
を行って、BPSG膜5を平坦化するためのリフロー処
理を行う。
In a conventional method of manufacturing a semiconductor device using a BPSG film, for example, as shown in FIG. 3A, a transistor structure (not shown) having a gate electrode 2 formed on a silicon substrate 1 is formed. A non-doped silicon oxide film 3 is formed thereon as a protective film by, for example, a plasma enhanced chemical vapor deposition (plasma CVD) method.
As shown in FIG. 3B, a BPSG film 5 is deposited by a CVD method, and then, as shown in FIG. 3C, in a nitrogen (N 2 ) atmosphere at about 700 to 900 ° C. for 20 to 50 minutes. Is performed, and a reflow process for flattening the BPSG film 5 is performed.

【0004】或いは、図4(a)に示すように、シリコ
ン基板1に、ゲート電極2を備えたトランジスタ構造
(図示省略)を形成した後、その上に保護膜として窒化
シリコン膜4を形成し、次に、図4(b)に示すよう
に、BPSG膜5をCVD法にて堆積し、次に、図4
(c)に示すように、水蒸気雰囲気中でBPSG膜5の
リフロー処理を行う。
Alternatively, as shown in FIG. 4A, after a transistor structure (not shown) having a gate electrode 2 is formed on a silicon substrate 1, a silicon nitride film 4 is formed thereon as a protective film. Next, as shown in FIG. 4B, a BPSG film 5 is deposited by a CVD method.
As shown in (c), the BPSG film 5 is reflowed in a water vapor atmosphere.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、半導体
装置の製造プロセス上における素子特性、例えば、トラ
ンジスタ特性(Vt特性等)の劣化の軽減目的から、ト
ランジスタ等の素子形成後はできる限り熱処理工程によ
る熱負荷を抑制する必要が有り、上述のリフロー処理工
程についても低温化することは重要な課題である。
However, for the purpose of reducing the deterioration of the element characteristics in the manufacturing process of the semiconductor device, for example, the transistor characteristics (Vt characteristics, etc.), after the formation of the elements such as the transistors, the heat treatment is preferably performed as much as possible. It is necessary to suppress the load, and it is an important subject to reduce the temperature in the reflow process.

【0006】上述した従来の窒素雰囲気中リフロー処理
においては、BPSG膜中の不純物濃度(B、P濃度)
を高くし、膜自体の相転移温度を下げて膜流動性を向上
することによりリフロー処理の低温化は可能であるが、
析出の発生問題といった膜質に関する限界が有った。ま
た、従来の水蒸気雰囲気中リフロー処理は、低温化の方
法としては有効であるが、この方法では、保護膜として
BPSG膜の下に窒化シリコン膜を設ける必要が有り、
この窒化シリコン膜の内部応力による膜剥がれの問題
や、後工程の水素シンター処理におけるリフレッシュ効
果がその窒化シリコン膜により妨げられて低下するとい
う問題が有った。
In the above-described conventional reflow treatment in a nitrogen atmosphere, the impurity concentration (B, P concentration) in the BPSG film is
It is possible to lower the temperature of the reflow process by increasing the temperature and lowering the phase transition temperature of the film itself to improve the fluidity of the film.
There is a limit on the film quality such as the problem of occurrence of deposition. Further, the conventional reflow treatment in a steam atmosphere is effective as a method for lowering the temperature, but in this method, it is necessary to provide a silicon nitride film under the BPSG film as a protective film,
There are problems such as film peeling due to internal stress of the silicon nitride film and a problem that a refresh effect in a hydrogen sintering process in a later process is hindered by the silicon nitride film and is reduced.

【0007】[0007]

【課題を解決するための手段】上述した課題を解決する
本発明の半導体装置の製造方法は、素子が形成された半
導体基板上に、不純物が添加されたシリコン酸化膜を形
成する第1の工程と、前記第1の工程後、前記半導体基
板をアンモニア雰囲気中で熱処理する第2の工程と、を
備える。
According to the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of: forming a silicon oxide film doped with an impurity on a semiconductor substrate having elements formed thereon; And a second step of heat-treating the semiconductor substrate in an ammonia atmosphere after the first step.

【0008】本発明の一態様では、前記第2の工程で、
前記半導体基板を700〜800℃の温度で熱処理す
る。
[0008] In one embodiment of the present invention, in the second step,
The semiconductor substrate is heat-treated at a temperature of 700 to 800C.

【0009】本発明の一態様では、前記シリコン酸化膜
が硼素及び燐を含有する。
In one embodiment of the present invention, the silicon oxide film contains boron and phosphorus.

【0010】[0010]

【発明の実施の形態】以下、本発明を好ましい実施の形
態に従い説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described according to preferred embodiments.

【0011】まず、図1(a)に示すように、シリコン
半導体基板1に、例えば、ポリシリコンからなるゲート
電極2を備えたトランジスタ構造を形成する。なお、ト
ランジスタ構造のゲート絶縁膜やソース/ドレイン拡散
層等は図示省略する。次に、その上に、保護膜として、
例えば、プラズマCVD法により比較的膜質の良いノン
ドープのシリコン酸化膜3を形成する。
First, as shown in FIG. 1A, a transistor structure having a gate electrode 2 made of, for example, polysilicon is formed on a silicon semiconductor substrate 1. Note that a gate insulating film, a source / drain diffusion layer, and the like having a transistor structure are not shown. Next, on it, as a protective film,
For example, a non-doped silicon oxide film 3 having relatively good film quality is formed by a plasma CVD method.

【0012】次に、図1(b)に示すように、例えば、
層間絶縁膜として全面にCVD法によりBPSG膜5を
形成する。ここで、BPSG膜5は、例えば、硼素
(B)を2.0〜4.0wt%程度、燐(P)を5.5〜
7.0wt%程度含有している。
Next, for example, as shown in FIG.
A BPSG film 5 is formed on the entire surface as an interlayer insulating film by a CVD method. Here, for example, the BPSG film 5 contains boron (B) in an amount of about 2.0 to 4.0 wt% and phosphorus (P) in an amount of 5.5 to 5.5%.
It contains about 7.0% by weight.

【0013】次に、図1(c)に示すように、シリコン
半導体基板1を、大気圧でN2 置換した炉体内に入れた
後、その炉体内の雰囲気をNH3 置換し、炉温度を70
0〜800℃程度の処理温度まで上げて安定させる。そ
して、10〜50slm程度の流量でNH3 を炉体内に
供給しながら、大気圧にて、20〜50分間程度、BP
SG膜5のリフロー処理を行う。リフロー処理が完了し
たら、炉温度をリフロー温度以下まで下げ、雰囲気をN
3 からN2 に充分に置換した後、炉体を開き、シリコ
ン半導体基板1を大気雰囲気に放置して降温させる。
Next, as shown in FIG. 1 (c), after the silicon semiconductor substrate 1 is placed in a furnace in which N 2 has been replaced at atmospheric pressure, the atmosphere in the furnace has been replaced with NH 3 and the furnace temperature has been reduced. 70
Raise the processing temperature to about 0 to 800 ° C and stabilize it. Then, while supplying NH 3 into the furnace at a flow rate of about 10 to 50 slm, the BP is maintained at atmospheric pressure for about 20 to 50 minutes.
The reflow process of the SG film 5 is performed. After the reflow process is completed, lower the furnace temperature to below the reflow temperature and set the atmosphere to N
After sufficiently replacing H 3 with N 2 , the furnace body is opened and the silicon semiconductor substrate 1 is left in an air atmosphere to lower the temperature.

【0014】図2に、本発明によるNH3 雰囲気リフロ
ーの場合と従来のN2 雰囲気リフローの場合の、リフロ
ー後のBPSG膜中のウェハ厚さ方向における窒素
(N)濃度分布を示す。なお、図2には、参考のため
に、硼素(B)と燐(P)、シリコン(Si)及び酸素
(O)の濃度分布も合わせて示す。また、膜中濃度は相
対値で示す。
FIG. 2 shows the nitrogen (N) concentration distribution in the wafer thickness direction in the BPSG film after the reflow in the case of the NH 3 atmosphere reflow according to the present invention and in the case of the conventional N 2 atmosphere reflow. FIG. 2 also shows the concentration distributions of boron (B), phosphorus (P), silicon (Si), and oxygen (O) for reference. The concentration in the film is indicated by a relative value.

【0015】図2から分かるように、本発明によるNH
3 雰囲気リフローでは、従来のN2雰囲気リフローに比
し、多くの窒素(N)がBPSG膜中に拡散する。この
ことは、BPSG膜の膜流動性が向上することを意味し
ている。この結果、本発明によるNH3 雰囲気リフロー
では、BPSG膜中の硼素及び燐の濃度が同じで且つ従
来のN2 雰囲気リフローと同じ処理時間で、リフロー処
理温度を50〜100℃程度低温化することができる。
As can be seen from FIG. 2, the NH according to the invention
In the three atmosphere reflow, more nitrogen (N) diffuses into the BPSG film than in the conventional N 2 atmosphere reflow. This means that the film fluidity of the BPSG film is improved. As a result, in the NH 3 atmosphere reflow according to the present invention, the reflow processing temperature is reduced by about 50 to 100 ° C. in the same processing time as the conventional N 2 atmosphere reflow in which the concentrations of boron and phosphorus in the BPSG film are the same. Can be.

【0016】[0016]

【発明の効果】本発明によれば、半導体基板上に形成し
た、例えば、BPSG膜をアンモニア雰囲気中で熱処理
してリフローさせることにより、従来のように窒素雰囲
気中でリフロー処理するよりも、BPSG膜中へ多くの
窒素が拡散して、膜流動性が向上する。従って、例え
ば、BPSG膜中の硼素及び燐の濃度並びにリフロー処
理時間は従来のままで、リフロー処理温度を従来よりも
低くすることができる。この結果、リフロー処理工程に
おける熱負荷が軽減されるので、素子特性、例えば、ト
ランジスタ特性(Vt特性等)の劣化を抑制しつつ、更
に、従来と同様にBPSG膜の不純物析出を抑制しなが
ら、従来と同等のBPSG膜の平坦化を達成することが
できる。
According to the present invention, a BPSG film formed on a semiconductor substrate, for example, is heat-treated in an ammonia atmosphere and reflowed, whereby the BPSG film is more reflowed in a nitrogen atmosphere than in the conventional case. A large amount of nitrogen diffuses into the membrane, and the membrane fluidity is improved. Therefore, for example, the concentration of boron and phosphorus in the BPSG film and the reflow processing time remain the same, and the reflow processing temperature can be made lower than before. As a result, the thermal load in the reflow process is reduced, so that the deterioration of the device characteristics, for example, the transistor characteristics (Vt characteristics, etc.) is suppressed, and further, while the impurity deposition of the BPSG film is suppressed as in the related art, The flattening of the BPSG film equivalent to the conventional one can be achieved.

【0017】また、従来の水蒸気雰囲気中でリフロー処
理する場合と異なり、例えば、ゲート電極上に保護膜と
して窒化シリコン膜を形成する必要が無いので、窒化シ
リコン膜の内部応力による膜剥がれの問題等が生じな
い。
Also, unlike the conventional case of performing reflow treatment in a water vapor atmosphere, for example, there is no need to form a silicon nitride film as a protective film on the gate electrode. Does not occur.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施の形態による半導体装置の製造
方法を示す工程断面図である。
FIG. 1 is a process sectional view illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.

【図2】半導体装置の膜中不純物濃分布を示すグラフで
ある。
FIG. 2 is a graph showing an impurity concentration distribution in a film of a semiconductor device.

【図3】従来の半導体装置の製造方法を示す工程断面図
である。
FIG. 3 is a process sectional view showing a conventional method for manufacturing a semiconductor device.

【図4】従来の別の半導体装置の製造方法を示す工程断
面図である。
FIG. 4 is a process sectional view illustrating another conventional method for manufacturing a semiconductor device.

【符号の説明】[Explanation of symbols]

1…シリコン半導体基板 2…ゲート電極 3…シリコン酸化膜 4…窒化シリコン膜 5…BPSG膜 REFERENCE SIGNS LIST 1 silicon semiconductor substrate 2 gate electrode 3 silicon oxide film 4 silicon nitride film 5 BPSG film

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 素子が形成された半導体基板上に、不純
物が添加されたシリコン酸化膜を形成する第1の工程
と、 前記第1の工程後、前記半導体基板をアンモニア雰囲気
中で熱処理する第2の工程と、 を備えることを特徴とする半導体装置の製造方法。
A first step of forming a silicon oxide film to which an impurity is added on a semiconductor substrate on which an element is formed; and a heat treatment of the semiconductor substrate in an ammonia atmosphere after the first step. 2. A method for manufacturing a semiconductor device, comprising:
【請求項2】 請求項1において、前記第2の工程で、
前記半導体基板を700〜800℃の温度で熱処理する
ことを特徴とする半導体装置の製造方法。
2. The method according to claim 1, wherein in the second step,
A method for manufacturing a semiconductor device, wherein the semiconductor substrate is heat-treated at a temperature of 700 to 800C.
【請求項3】 請求項1において、前記シリコン酸化膜
が硼素及び燐を含有することを特徴とする半導体装置の
製造方法。
3. The method according to claim 1, wherein the silicon oxide film contains boron and phosphorus.
JP35596396A 1996-12-25 1996-12-25 Manufacture of semiconductor device Withdrawn JPH10189575A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP35596396A JPH10189575A (en) 1996-12-25 1996-12-25 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP35596396A JPH10189575A (en) 1996-12-25 1996-12-25 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH10189575A true JPH10189575A (en) 1998-07-21

Family

ID=18446633

Family Applications (1)

Application Number Title Priority Date Filing Date
JP35596396A Withdrawn JPH10189575A (en) 1996-12-25 1996-12-25 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH10189575A (en)

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