JP3437111B2 - Method for manufacturing semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device having a laminated electrode wiring film composed of a refractory metal silicide film and a semiconductor film such as polysilicon, and more particularly to a tungsten silicide (WSi) film and polysilicon (PS). The present invention relates to a method of manufacturing a laminated film for a gate electrode, which mainly includes a laminated film with a film.

[0002]

2. Description of the Related Art In recent years, there has been an increasing demand for miniaturization of element patterns of semiconductor integrated circuit devices and speedup of element operation, and there has been a demand for lower resistance of wirings in semiconductor integrated circuit devices. Among the wirings, a part of the gate wiring functions as the gate electrode of the MOS transistor,
It is an important member that affects the function of device characteristics. As one means for reducing the resistance of the gate wiring, a stacked film of a tungsten silicide (WSi) film and a polysilicon (DPS) film doped with impurities such as phosphorus is often used as a gate electrode.

When a laminated film of a WSi film and a DPS film is used as a gate electrode, (1) D of the WSi film is formed by heat treatment after the electrode formation in the manufacturing process of the semiconductor integrated circuit device.
Peeling from the PS film, (2) disconnection in the stepped portion of the base,
(3) The thickness of the gate oxide film is increased compared to the case where the DPS film is used as a single film, (4) Degradation of electric characteristics such as flat band voltage and dielectric breakdown charge amount (Qbd), etc. Inconvenience occurs.

Of these, the cause of the problem (1) is a change in stress acting on the WSi film during heat treatment. Further, the above problem (2) is caused by the generation of cracks due to the change in the stress of the WSi film due to the heat treatment in the step portion or the like. As a method for solving these two problems, a method of forming a layer of a silicon oxide film, a silicon nitride film, or a phosphorous silicate glass (PSG) film on a WSi film (Japanese Patent Laid-Open Publication No. Hei 8)
No. 88,198) is proposed.

[0005]

However, although the problems such as film peeling and wire breakage may be suppressed by the conventional laminated wiring described in the above publication, the phenomenon of increase in the thickness of the gate oxide film and the flatness may be suppressed. Band voltage and Qbd
It is not possible to solve the inconveniences such as the deterioration of the electric characteristics of.

Phenomenon of increasing film thickness of oxide film (for example, Vivec)
Jain and K. C. Saraswat, Sy
mposium on VLSI Technology
y, Digest of Technical Pap
ers, page 9, (1991)) is considered to be due to the following causes. Fluorine in tungsten hexafluoride (WF ₆ ) which is a material gas used for forming the WSi film is changed to DP.
When bonded to the dangling bond of silicon atoms at the interface between the S film and the WSi film and the interface between the DPS film and the underlying oxide film,
The subsequent heat treatment replaces this fluorine with oxygen.
As a result, the oxide film grows thicker than immediately after the film formation.

It is clear that the demand for precise control and stabilization of transistor characteristics will become stronger as the device dimensions are further miniaturized in the future. And the stabilization of the quality of the gate oxide film is the most important issue. Therefore, it is necessary to suppress the phenomenon of increasing the thickness of the oxide film and stabilize the electrical characteristics.

In view of the above problems, the object of the present invention is to provide WSi.
Provided are a semiconductor device in which a phenomenon of increasing the thickness of a gate oxide film of a transistor is suppressed even when a stacked film of a film and a DPS film is used as a gate electrode, and a method for manufacturing a semiconductor device having excellent electrical characteristics without deterioration. That is.

[0009]

Method of manufacturing a semi-conductor device according to the present invention SUMMARY OF THE INVENTION may, (a) forming a silicon film on the oxide film on the substrate, a refractory metal silicide on said silicon film Step (b) of forming a film , silicon and hydrogen
Consisting of a compound gas atmosphere that thermally decomposes to generate hydrogen
And step (c) in which the substrate temperature is changed within a predetermined range by continuously performing the step (a) and the step (b) in the same chamber. Is the way.

With this, since thermal stress is not applied, desorption of hydrogen bonded to the interface between the oxide film and the silicon film can be prevented. Therefore, it is possible to prevent deterioration of the flat band voltage and the electrical characteristics of Qbd. Furthermore, even if heat treatment is applied after growing the laminated film,
Since there is almost no fluorine in the silicon film,
The phenomenon of increasing the thickness of the gate oxide film due to the substitution of oxygen for oxygen is suppressed.
Controlled. Further, the refractory metal silicide film / the shield
Hydrogen is applied to the reconstituted film from above the refractory metal silicide film.
By supplying, it also has the effect of improving the electrical characteristics.
It

[0011]

[0012]

[0013]

[0014] In the method for manufacturing the semi-conductor device, by changing the substrate temperature until the step (c) is adjusted so as to fall within a predetermined range, the heat stress is not applied, the oxide film ─ the It is possible to further prevent desorption of hydrogen bonded to the interface between the silicon films. Therefore, the deterioration of the flat band voltage and the electrical characteristics of Qbd can be further prevented.

In the method of manufacturing the semi-conductor device, the change of the substrate temperature by the range of the substrate temperature ± 20 ° C. during the formation process of the silicon film,
It is possible to further prevent desorption of hydrogen bonded to the interface between the oxide film and the silicon film. Therefore, the deterioration of the flat band voltage and the electrical characteristics of Qbd can be further prevented.

[0016]

[0017] In the method for manufacturing the semi-conductor device, in the step (b), 6 tungsten hexafluoride (WF
6) A refractory metal silicide film made of a tungsten silicide (WSi) film can be formed by using gas.

[0018] In the method for manufacturing the semi-conductor device, the substrate temperature is preferably 450-700 ° C..

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS First, a semiconductor device formed by the manufacturing method according to this embodiment will be described.

FIG. 1 is a sectional view showing a semiconductor device formed by the manufacturing method according to this embodiment, particularly a MOS transistor having a polycide structure. A gate oxide film 11 and a gate electrode 15 are sequentially stacked from the bottom on a P-type silicon substrate 10 containing boron as an impurity. The gate electrode 15 has a structure in which a DPS film 12 that is a polysilicon film containing phosphorus, a WSi film 13, and a CAP film 14 that is a polysilicon film are sequentially stacked from the bottom. Further, a source region 16 and a drain region 17 are provided in regions located on both sides of the gate electrode 15 in the P-type silicon substrate as a base. The source region 16 and the drain region 17 are
Both of them are formed by introducing arsenic, phosphorus, or the like into a silicon substrate at a high concentration. In the semiconductor device of this embodiment, when a voltage is applied to the gate electrode 15, the gate oxide film 1 of the P-type silicon substrate 10 is
A current flows between the source region 16 and the drain region 17 due to the formation of the inversion layer in the region (channel region) located immediately below 1.

Next, the manufacturing process of the MOS transistor according to this embodiment will be described. 2 (a) to (e)
FIG. 7A is a sectional view showing a manufacturing process of the MOS transistor according to the present embodiment.

First, in the step shown in FIG. 2A, the gate oxide film 11 is formed on the P-type silicon substrate 10 by thermal oxidation.
Is grown to a film thickness of about 8 nm.

Next, in the step shown in FIG. 2B, SiH ₄ (monosilane) and PH ₃ (phosphine) are used as material gases in a chamber in the CVD processing apparatus at a pressure of 100.
Introduced at ~ 6000Pa, substrate temperature 450 ~ 700 ℃
By setting the above, the DPS film 12 having a film thickness of about 100 nm is grown on the gate oxide film 11.

Next, in the step shown in FIG. 2C, WF ₆ (tungsten hexafluoride) and Si are used as material gases.
By introducing H ₄ and SiH ₂ Cl ₂ (dichlorosilane) into the chamber of the CVD processing apparatus at a pressure of 100 to 6000 Pa and maintaining the substrate temperature at 450 to 700 ° C., a film thickness of about 100 nm is formed on the DPS film 12. The WSi film 13 is grown. At this time, particularly during the period from the growth of the DPS film 12 to the growth of the WSi film 13, the substrate temperature is maintained at substantially the same value as the temperature during the growth of the DPS film 12. Therefore, in the present embodiment, the substrate is placed on the susceptor set to a predetermined temperature, the DPS film 12 is grown, and then the substrate is not transferred to another chamber but fixed to the same susceptor in the same chamber. The WSi film 13 is grown in the next step.

Next, in the step shown in FIG. 2D, SiH ₄ is introduced as a material gas into the chamber in the CVD processing apparatus at a pressure of 100 to 6000 Pa while the substrate is placed on the same susceptor in the same chamber. Then, by maintaining the substrate temperature in the range of 450 to 700 ° C., WS
A CAP film 14 having a thickness of 5 nm or more is grown on the i film 13 (hereinafter, this processing is referred to as "growth of the CAP film 14"). However, after the WSi film 13 is formed, SiH ₄ may be flown into the chamber and the substrate may be exposed to the SiH ₄ atmosphere for 10 seconds or more (hereinafter, this processing is referred to as “SiH ₄ atmosphere exposure processing”). At this time, if the flow rate or pressure of SiH ₄ is sufficiently large, the CAP film 14 grows. However, depending on the condition of flowing SiH ₄ , the CAP film 14 may hardly grow. The exposure treatment in the SiH ₄ atmosphere is also performed by continuously maintaining the same substrate temperature from the time of growing the DPS film 12.

Further, in the step shown in FIG.
After obtaining the pattern of the gate electrode by dry etching, arsenic ion (As ⁺ ) or phosphorus ion (P ⁺ ) is ion-implanted. Further, a heat treatment is performed thereafter to recover the damage of the crystal structure generated by the ion implantation.
In this way, the MOS transistor is completed.

However, the substrate temperature at the time of growing the WSi film 13 may not be exactly the same as the substrate temperature at the time of growing the DPS film 12, but may be a different value. In this case, the allowable range is the substrate temperature during the growth of the DPS film 12 plus or minus about 20 ° C. That is, when the substrate temperature during the growth of the DPS film 12 is 450 ° C., the WSi film 1
3. The substrate temperature during the growth is allowed up to 470 ° C. This means that the substrate temperature during the growth of the CAP film 14,
The same applies to the substrate temperature during the exposure treatment in the SiH ₄ atmosphere.

According to the manufacturing method of this embodiment, it is possible to prevent the film thickness of the gate oxide film from increasing due to fluorine and to improve the electrical characteristics of the transistor such as the deterioration of the flat band voltage and the electrical characteristics of Qbd. . These will be described below.

First, the effect of preventing an increase in the thickness of the gate oxide film will be described.

The processing chamber after the first WSi film growth is filled with residual fluorine decomposed by WF ₆ , and
Part of it is considered to be attached to the inner wall of the chamber and the jig. Therefore, according to the conventional method, the WSi film and the DP are
Even if the S film is formed in different processing chambers, the substrate after the next DPS film formation is transferred to the processing chamber filled with residual fluorine, so that especially the interface between the WSi film and the DPS film is Fluorine is taken into. It is considered that, by the high temperature heat treatment thereafter, fluorine moves to the interface between the gate oxide film and the DPS film and is taken into the gate oxide film, so that the phenomenon of increasing the film thickness occurs.

[0031] However, in the present embodiment, the growth of the CAP film 14 is WSi film 13 after growth step, or in exposure treatment of SiH ₄ atmosphere, residual fluorine in the process chamber is gettered by SiH _4, processing Removed from inside the chamber. Therefore, in the present embodiment, even if the silicon substrate to be processed next is transferred to the CVD processing chamber and the DPS film is grown thereafter, fluorine does not remain in the CVD processing chamber, so that DPS
Almost no fluorine is present in the film. As a result, even if heat treatment is applied after growth of the laminated film, fluorine hardly exists in the DPS film, so that the phenomenon of increasing the film thickness of the gate oxide film due to the replacement of fluorine with oxygen is suppressed.

Next, the effect of preventing the deterioration of the electrical characteristics of the transistor will be described.

As a result of various experiments, the inventors have obtained the following findings regarding the deterioration of the electrical characteristics of the WSi film / DPS film double-layered gate. That is, according to the above-mentioned conventional method, since the WSi film and the DPS film are formed in different chambers, when the WSi film is formed after the DPS film is formed, the substrate is cooled by the substrate transfer between the processing chambers. To be done. However, the substrate is heated again to form the WSi film. Therefore, since the substrate temperature changes abruptly in a short time, a large thermal stress is applied to the substrate. Therefore, hydrogen (which was liberated from SiH ₄ when the DPS film was grown), which was originally bonded to the dangling bond existing at the interface between the gate oxide film and the DPS film, could be desorbed by this thermal stress. I found sex. Assuming that the hydrogen that has been bonded up to now is released from the interface, the change in the interface state causes the flat band voltage and Qbd
It can be understood that such electrical characteristics are deteriorated. On the other hand, in the case of the manufacturing process of the DPS single layer film (corresponding to the conventional polysilicon gate), the hydrogen is caused by the thermal stress after the deposition of the WSi film that occurs in the manufacturing process of the WSi film / DPS film double layer structure because of the single layer film. Withdrawal rarely occurs. Therefore, it is considered that the electrical characteristics of the DPS single layer film do not deteriorate.

Therefore, in the manufacturing method according to the present embodiment, the substrate temperature is set to the above-described DPS film growth during the period from after the growth of the DPS film 12 to immediately before the growth of the WSi film 13 and in the growth step of the WSi film 13. Thermal stress can be avoided by keeping the temperature at about the same time. Therefore, according to this step, hydrogen bonded to the interface between the gate oxide film 11 and the DPS film 12 will not be desorbed. Therefore, the flat band voltage and Qbd
It is possible to prevent deterioration of the electrical characteristics of the. CAP film 1
Also in the growth of No. ₄ or the exposure treatment in the SiH ₄ atmosphere, the same effect can be obtained because the substrate temperature during the growth step of the WSi film 13 is maintained.

The growth of the CAP film 14 or SiH
_{The 4} atmosphere exposure process not only reduces the residual fluorine as described above, but is not as direct as when growing the DPS film 12 of FIG. By supplying hydrogen from above, an effect of improving electric characteristics is also exhibited. During this process, SiH
_{This is because 4} is thermally decomposed to generate hydrogen, which is taken into the gate electrode and reaches the interface between the DPS film 12 and the gate oxide film 11.

Although the CAP film 14 is made of a polysilicon film in the present embodiment, it may be made of a DPS film to which PH ₃ is added or an amorphous silicon film. Also, C
When forming the WSi film 13 by the VD method, PH ₃ may be added as a material gas in order to reduce the resistance of the wiring. In the present embodiment, the MOS transistor is an n-channel MOS having an N-type source region and a drain region.
Although described as a transistor, a p-channel MOS transistor having a P-type source region and a drain region may be used.

Next, the result of measurement of the film thickness of the gate oxide film, the flat band voltage, and the electrical characteristics of Qbd will be described.

The sample used here was prepared by first performing etching to obtain a gate electrode pattern, forming a protective oxide film on the gate electrode, and then performing heat treatment at 800 ° C. or higher. is there. The silicon substrate in this sample is N-type and its concentration is 5 × 10 ¹⁵ / cm ³ . Furthermore, the film thickness of the gate electrode is 100 nm. Structure 1 is the gate structure and structure 2 shown in FIG. 1 formed by the manufacturing method according to the present embodiment.
Is a conventional gate structure in which a WSi film and a DPS film are respectively formed in different processing chambers, and Structure 3 is a gate structure having only the DPS film, that is, a so-called general polysilicon gate. The DPS film of structure 3 uses Si as a material gas.
Since it was formed by LP-CVD method using H ₄ , there is no influence of fluorine on the gate oxide film.

FIG. 3 shows the measurement result of the film thickness of the gate oxide film. The film thickness of the gate oxide film is obtained by the high frequency CV characteristic. As can be seen from FIG. 3, in Structure 2, an increase in the film thickness of the gate oxide film due to fluorine is observed. However, the film thickness of the oxide film of structure 1 is the same as the film thickness of the oxide film of structure 3, that is, the film thickness of the original predetermined gate oxide film. That is, it can be seen that in Structure 1, there is no increase in the film thickness of the oxide film due to fluorine, and the increase in the film thickness of the gate oxide film is suppressed by the manufacturing method according to the present embodiment.

Next, FIG. 4 is a diagram showing the flat band voltage obtained from the CV characteristic. As you can see from Figure 4,
The flat band voltage of the structure 1 has the same value as the flat band voltage of the structure 3, and the structure 2 has the same value.
Greater than the flat band voltage of. Therefore, also in this respect, it is apparent that the electrical properties of the polycide gate structure formed by the manufacturing method according to the present embodiment are improved and superior to those of the conventional polycide gate structure. .

FIG. 5 is a diagram showing Qbd evaluated by the so-called TDDB method. As shown in FIG. 5, Qbd of structure 1 is Qbd of structure 3 and Qbd of structure 2.
Greater than Therefore, in this respect, it can be said that the electrical characteristics of the gate structure formed by the manufacturing method according to the present embodiment are further improved and excellent.

Of the samples shown in FIGS. 3 to 5,
In the sample (Structure 1) formed by the manufacturing method according to the present embodiment, after forming the protective film on the gate electrode, the sample was transferred into an ordinary electric furnace to form the DPS film at the formation temperature and the WSi film. The heat treatment is performed at a temperature higher than the formation temperature. However, it has also been found that once the WSi film / DPS film is continuously formed by the manufacturing method according to the present embodiment, the electrical characteristics are not deteriorated even after the heat treatment at a high temperature.

Therefore, as described above, according to this embodiment, it is possible to prevent an increase in the film thickness of the gate oxide film due to fluorine and to improve the electrical characteristics of the transistor such as the deterioration of the flat band voltage and Qbd. .

[0044]

As described above, according to the manufacturing method of the present invention, in a transistor having a gate electrode having a WSi film / DPS film as a basic structure, the film thickness of the gate oxide film is increased by fluorine during WSi growth. It can be prevented. further,
It is possible to prevent the flat band voltage and the electrical characteristics of Qbd from being deteriorated, and it is possible to provide a semiconductor device having excellent characteristics.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a semiconductor device formed by a manufacturing method according to an embodiment, particularly a MOS transistor having a polycide structure.

FIG. 2 is a cross-sectional view showing a manufacturing process of the MOS transistor according to the embodiment.

FIG. 3 is a diagram showing measurement results of film thickness of a gate oxide film by various manufacturing methods.

FIG. 4 is a diagram showing measurement results of a flat band voltage in a gate structure by various manufacturing methods.

FIG. 5: Qbd in gate structure by various manufacturing methods
It is a figure which shows the measurement result of.

[Explanation of symbols]

10 Silicon substrate 11 Gate oxide film 12 DPS membrane 13 WSi film 14 CAP membrane 15 Gate electrode 16 Source area 17 Drain region

─────────────────────────────────────────────────── ─── Continuation of front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 21/28 H01L 29/78

Claims (5)

(57) [Claims] 1. A process of forming a silicon film on an oxide film on a substrate (a), a process of forming a refractory metal silicide film on the silicon film (b) , and a compound of silicon and hydrogen. And pyrolyzes hydrogen
Look including the step (c) subjecting the compound gas atmosphere occurs, the step (a) and the same chamber and the step (b)
, And the change in substrate temperature during that time is predetermined.
A method for manufacturing a semiconductor device, which comprises adjusting so as to be within a range . 2. The method for manufacturing a semiconductor device according to claim 1 , wherein the change in the substrate temperature up to the step (c) is adjusted to fall within a predetermined range. Method. 3. The method of manufacturing a semiconductor device according to claim 1 , wherein the change in the substrate temperature is within a range of a substrate temperature of plus or minus 20 ° C. during the step of forming the silicon film. Of manufacturing a semiconductor device. 4. according to any one of claims 1 to 3
In the method of manufacturing a semiconductor device according to the above, in the step (b), tungsten hexafluoride (WF
6) A method of manufacturing a semiconductor device in which a refractory metal silicide film made of a tungsten silicide (WSi) film is formed using gas. 5. A according to any one of claims 1 to 4
In the method for manufacturing a semiconductor device, the substrate temperature is 450 to 700 ° C.