JPH10160606A - Semiconductor pressure sensor and fabrication thereof - Google Patents

Semiconductor pressure sensor and fabrication thereof

Info

Publication number
JPH10160606A
JPH10160606A JP31790496A JP31790496A JPH10160606A JP H10160606 A JPH10160606 A JP H10160606A JP 31790496 A JP31790496 A JP 31790496A JP 31790496 A JP31790496 A JP 31790496A JP H10160606 A JPH10160606 A JP H10160606A
Authority
JP
Japan
Prior art keywords
pressure
semiconductor substrate
hole
surface side
glass pedestal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP31790496A
Other languages
Japanese (ja)
Inventor
Takuji Keno
拓治 毛野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP31790496A priority Critical patent/JPH10160606A/en
Publication of JPH10160606A publication Critical patent/JPH10160606A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To enhance withstand pressure by setting the diameter of a through hole in a glass base, on the side being bonded to a substrate, such that the pressure is spread to a piezoelectric resistor and setting a small diameter on the opposite side. SOLUTION: Thermal oxides 2, 3 are deposited on the surface and rear of a silicon substrate 1 and a mask pattern 15 is formed of a photosensitive resin on the surface side before an implantation layer 16 is formed by implanting dopant ions from an opening 15a. The implantation layer 16 is then heat treated to form a diffusion layer 6 serving as a piezoelectric resistor. A glass base 19 provided, on the upper surface side thereof, with a hole 18 of such size as the pressure is spread to the piezoelectric resistor and, on the lower surface side thereof, with a small hole 17 is then bonded to the substrate 1 by anodic bonding. Since pressure introduction ports are provided by the holes 17, 18 in the glass base 19, strain of the piezoelectric resistor is stabilized. Furthermore, bonding strength is stabilized because the bonding faces of the substrate 1 and the glass base 19 are flat and thereby withstand pressure is enhanced.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体基板とガラ
ス台座によりダイアフラム構造を形成してなる半導体圧
力センサ及びその製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor pressure sensor having a diaphragm structure formed by a semiconductor substrate and a glass pedestal, and a method of manufacturing the same.

【0002】[0002]

【従来の技術】従来、この種の半導体圧力センサの製造
方法は、図2(a)に示すように、シリコン基板1の表
面側にピエゾ抵抗となる拡散層6を形成し、シリコン基
板1の表面及び裏面の各々に熱酸化膜2、3と窒化膜
4、5を形成する。次に、圧力を受けるダイアフラムを
形成するために、図2(b)に示すように、シリコン基
板1の裏面側に形成した熱酸化膜3と窒化膜4の内、ダ
イアフラムの形成個所を除去しエッチング窓7を形成す
る。このエッチング窓7を介してシリコン基板1を裏面
側からエッチングすることにより、図2(c)に示すよ
うに、シリコン基板1を部分的に薄肉化(数μm〜数十
μm程度)し、ダイアフラム構造8を形成する。この
後、エッチングにより図2(d)に示すようにシリコン
基板1の裏面側の熱酸化膜3と窒化膜4を除去し、この
後、図2(e)のように表面電極10を形成して生成し
たチップをパッケージにダイボンドするか、図2(f)
のように、陽極接合方法によりガラス台座13をシリコ
ン基板1の裏面に接合させる。
2. Description of the Related Art Conventionally, in a method of manufacturing a semiconductor pressure sensor of this type, as shown in FIG. 2A, a diffusion layer 6 serving as a piezoresistor is formed on the surface side of a silicon substrate 1, and Thermal oxide films 2 and 3 and nitride films 4 and 5 are formed on the front and back surfaces, respectively. Next, in order to form a diaphragm which receives pressure, as shown in FIG. 2B, a portion where the diaphragm is formed is removed from the thermal oxide film 3 and the nitride film 4 formed on the back surface of the silicon substrate 1. An etching window 7 is formed. By etching the silicon substrate 1 from the back side through the etching window 7, the silicon substrate 1 is partially thinned (several μm to several tens μm) as shown in FIG. Form structure 8. Thereafter, the thermal oxide film 3 and the nitride film 4 on the back surface of the silicon substrate 1 are removed by etching as shown in FIG. 2D, and thereafter, a surface electrode 10 is formed as shown in FIG. Die-bonding the chip generated in the package to the package, or FIG.
As described above, the glass pedestal 13 is bonded to the back surface of the silicon substrate 1 by the anodic bonding method.

【0003】このようにして作製した半導体圧力センサ
は、検知したい物理量(圧力、加速度、熱等)をダイア
フラムに伝え、その上に形成されたピエゾ抵抗の抵抗値
の変化として検出するのである。
A semiconductor pressure sensor manufactured in this way transmits a physical quantity (pressure, acceleration, heat, etc.) to be detected to a diaphragm and detects it as a change in the resistance value of a piezo resistor formed thereon.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、上述の
ような半導体圧力センサの製造方法にあっては、ダイア
フラム構造8を形成する際に、図2(c)に示すよう
に、エッチング窓7を形成するために使用した熱酸化膜
3と窒化膜4に日差し部9が生成されてしまい、シリコ
ン基板1の裏面側の熱酸化膜3と窒化膜4のエッチング
の際に、日差し部9が割れて、エッチング完了後に、図
2(d)に示すように、窒化膜11が再付着したり、表
面電極10の形成の際に、図2(e)のように、シリコ
ン基板1の裏面に傷12が発生したりする。
However, in the method of manufacturing a semiconductor pressure sensor as described above, when the diaphragm structure 8 is formed, the etching window 7 is formed as shown in FIG. Sunlight portions 9 are generated in the thermal oxide film 3 and the nitride film 4 used for the etching, and when the thermal oxide film 3 and the nitride film 4 on the back surface side of the silicon substrate 1 are etched, the sunray portions 9 are broken. After the etching is completed, as shown in FIG. 2D, the nitride film 11 is reattached, and when the front electrode 10 is formed, as shown in FIG. Or occur.

【0005】上述のような再付着した窒化膜11や傷1
2のために、ガラス台座13の陽極接合の際に、不完全
な接合面14となってしまい、圧力が印加された時の接
合強度を低減し、不良に至らしめることがあった。
[0005] The nitride film 11 and the scratches 1
In the case of No. 2, the anodic bonding of the glass pedestal 13 may result in an incomplete bonding surface 14, which may reduce the bonding strength when a pressure is applied, leading to a failure.

【0006】本発明は、上記の点に鑑みてなしたもので
あり、その目的とするところは、圧力耐性の強い半導体
圧力センサ及びその製造方法を提供することにある。
[0006] The present invention has been made in view of the above points, and an object of the present invention is to provide a semiconductor pressure sensor having high pressure resistance and a method of manufacturing the same.

【0007】[0007]

【課題を解決するための手段】請求項1記載の半導体圧
力センサは、ピエゾ抵抗が形成され所望のダイアフラム
厚を有する半導体基板と、圧力導入用の貫通孔を有し前
記半導体基板に接合されたガラス台座を有してなり、該
ガラス台座の貫通孔は、半導体基板との接合面側は前記
ピエゾ抵抗に圧力が行き渡る程度の大きさの径を有し、
反対面側は径を小さくするように形成したことを特徴と
するものである。
According to a first aspect of the present invention, there is provided a semiconductor pressure sensor, comprising: a semiconductor substrate having a desired diaphragm thickness formed with a piezoresistor; and a through hole for introducing pressure, and joined to the semiconductor substrate. It has a glass pedestal, the through-hole of the glass pedestal, the bonding surface side with the semiconductor substrate has a diameter of such a size that the pressure reaches the piezo resistance,
The opposite surface is characterized in that the diameter is reduced.

【0008】請求項2記載の半導体圧力センサの製造方
法は、半導体基板に所望のダイアフラム厚み以上の深さ
でピエゾ抵抗となる拡散層を形成し、半導体基板との接
合面側は前記ピエゾ抵抗に圧力が行き渡る程度の大きさ
の径を有し、反対面側は径を小さくするように圧力導入
用の貫通孔を形成したガラス台座を形成し、前記半導体
基板のピエゾ抵抗を形成した面と前記ガラス台座の上面
側とを陽極接合方により接合し、前記半導体基板の前記
ガラス台座と接合していない面側を研磨し、さらに該研
磨面を化学的エッチングすることにより、前記所望のダ
イアフラム厚みになるようにするとともに鏡面にし、該
鏡面にした半導体基板の面上に、熱酸化膜及び表面電極
を形成するようにしたことを特徴とするものである。
According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor pressure sensor, comprising: forming a diffusion layer having a piezo resistance at a depth equal to or greater than a desired diaphragm thickness on a semiconductor substrate; The opposite side has a glass pedestal formed with a through hole for pressure introduction so as to reduce the diameter, and a surface on which a piezoresistance of the semiconductor substrate is formed. The upper surface of the glass pedestal is bonded by anodic bonding, the surface of the semiconductor substrate that is not bonded to the glass pedestal is polished, and the polished surface is chemically etched to obtain the desired diaphragm thickness. And a mirror surface, and a thermal oxide film and a surface electrode are formed on the mirrored surface of the semiconductor substrate.

【0009】[0009]

【発明の実施の形態】以下、本発明の実施の形態の一例
を図面に基づき説明する。図1は、本発明の実施の形態
の一例に係る半導体圧力センサの製造方法を示す製造工
程図であり、図1(g)には完成した半導体圧力センサ
が示される。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a manufacturing process diagram showing a method for manufacturing a semiconductor pressure sensor according to an example of the embodiment of the present invention. FIG. 1 (g) shows a completed semiconductor pressure sensor.

【0010】本実施形態の半導体圧力センサの製造方法
は、まず、図1(a)に示すように、半導体基板として
のシリコン基板1の表面及び裏面に、例えば、1000
Å程度の薄い熱酸化膜2、3を形成し、表面側のピエゾ
抵抗の形成位置が開口15aとなるように、感光性レジ
ストでマスクパターン15を作り、開口15aからドー
パントとなるイオンを注入し、注入層16を作る。この
注入層16を熱処理して図1(b)に示すように、ピエ
ゾ抵抗となる拡散層6を形成する。ここで、拡散層6
は、所望の圧力定格に合わせたダイアフラム厚みより数
μm程度深く形成する。この後、図1(c)に示すよう
に、表面側の熱酸化膜2をエッチングにより除去する。
なお、この時、裏面側の熱酸化膜3も除去しても良い。
In the method for manufacturing a semiconductor pressure sensor according to the present embodiment, first, as shown in FIG.
The thermal oxide films 2 and 3 having a thickness of about Å are formed, and a mask pattern 15 is formed with a photosensitive resist so that the formation position of the piezoresistor on the surface side is the opening 15a. Then, an injection layer 16 is formed. This implantation layer 16 is heat-treated to form a diffusion layer 6 that becomes a piezoresistive, as shown in FIG. Here, the diffusion layer 6
Is formed about several μm deeper than the diaphragm thickness adjusted to the desired pressure rating. Thereafter, as shown in FIG. 1C, the thermal oxide film 2 on the front side is removed by etching.
At this time, the thermal oxide film 3 on the back side may also be removed.

【0011】次に、図1(d)に示すように、シリコン
基板1のピエゾ抵抗となる拡散層6を形成している表面
側と対向する上面側に、ピエゾ抵抗に圧力が行き渡る程
度の大きさの径の孔部18を有し、下面側には孔部18
より径の小さな孔部17を有し、凹部17、18とはつ
ながり貫通孔を形成しているガラス台座19を作り、ガ
ラス台座19の孔部18を形成した上面側とシリコン基
板1のピエゾ抵抗となる拡散層6を形成している表面側
とを陽極接合法により接着する。凹部17、18からな
る貫通孔は、圧力導入口としての機能を有する。ここ
で、孔部18の径は、孔部18の周縁部が外側の拡散層
6にまたがるような大きさにしてある。
Next, as shown in FIG. 1 (d), on the upper surface side opposite to the surface side of the silicon substrate 1 on which the diffusion layer 6 serving as the piezoresistor is formed, the size is such that the pressure reaches the piezoresistor. Hole 18 with a diameter of
A glass pedestal 19 having a hole 17 having a smaller diameter and being connected to the recesses 17 and 18 to form a through-hole is formed, and the upper surface of the glass pedestal 19 where the hole 18 is formed and the piezo resistance of the silicon substrate 1 are formed. Is bonded to the surface side on which the diffusion layer 6 to be formed is to be formed by anodic bonding. The through hole formed by the concave portions 17 and 18 has a function as a pressure introduction port. Here, the diameter of the hole 18 is set such that the periphery of the hole 18 extends over the outer diffusion layer 6.

【0012】次に、シリコン基板1の裏面側を研磨して
いき、図1(e)に示すように、ピエゾ抵抗となる拡散
層6の底部20と推定される位置で研磨を停止し、その
状態からさらに、化学的エッチングにより数μm程度シ
リコンを削除し、その表面21を鏡面に仕上げる。
Next, the back side of the silicon substrate 1 is polished, and polishing is stopped at a position which is assumed to be the bottom 20 of the diffusion layer 6 which becomes a piezoresistance, as shown in FIG. From the state, silicon of about several μm is further removed by chemical etching, and the surface 21 is mirror-finished.

【0013】さらに、図1(f)に示すように、シリコ
ン基板1の裏面側の鏡面となった面に、CVD法により
低温で酸化膜23と窒化膜22とを形成し、最後に、図
1(g)に示すように、表面電極24を形成する。
Further, as shown in FIG. 1F, an oxide film 23 and a nitride film 22 are formed on the mirror surface on the back surface side of the silicon substrate 1 at a low temperature by a CVD method. A surface electrode 24 is formed as shown in FIG.

【0014】本実施形態の半導体圧力センサによれば、
図1(g)に示すように、ガラス台座19の貫通孔1
7、18により圧力導入口を形成しているので、ガラス
より柔らかいシリコン基板1が圧力導入口の一部になっ
ている従来の半導体圧力センサよりも、ピエゾ抵抗の歪
み方が安定する。また、再付着した窒化膜11や傷12
の発生がなく、半導体基板1のガラス台座19との接合
面は平坦且つ滑らかであるので、両者の接着強度が安定
化し、最終的に品質を安定させることができる。
According to the semiconductor pressure sensor of this embodiment,
As shown in FIG. 1 (g), the through hole 1 of the glass pedestal 19
Since the pressure introduction ports are formed by the pressure injection ports 7 and 18, the piezoresistive distortion is more stable than in the conventional semiconductor pressure sensor in which the silicon substrate 1 softer than glass is a part of the pressure introduction ports. In addition, the nitride film 11 and the scratch 12
No bonding occurs, and the bonding surface of the semiconductor substrate 1 with the glass pedestal 19 is flat and smooth, so that the bonding strength between the two can be stabilized, and finally the quality can be stabilized.

【0015】[0015]

【発明の効果】以上のように、請求項1及び請求項2記
載の発明によれば、ピエゾ抵抗が形成され所望のダイア
フラム厚を有する半導体基板と、圧力導入用の貫通孔を
有し前記半導体基板に接合されたガラス台座を有してな
り、該ガラス台座の貫通孔は、半導体基板との接合面側
は前記ピエゾ抵抗に圧力が行き渡る程度の大きさの径を
有し、反対面側は径を小さくするように形成した半導体
圧力センサとしたので、圧力導入用の貫通孔をガラス台
座で形成するとともに、半導体基板とガラス台座との接
合面の接着強度が安定化し、圧力耐性の強い半導体圧力
センサ及びその製造方法が提供できた。
As described above, according to the first and second aspects of the present invention, the semiconductor substrate having a piezoresistor and having a desired diaphragm thickness and a through-hole for introducing pressure are provided. It has a glass pedestal joined to the substrate, the through-hole of the glass pedestal has a diameter such that the bonding surface side with the semiconductor substrate has a diameter large enough to spread the pressure to the piezoresistance, and the opposite surface side Since the semiconductor pressure sensor is formed to have a small diameter, a through hole for introducing pressure is formed in the glass pedestal, and the bonding strength of the bonding surface between the semiconductor substrate and the glass pedestal is stabilized, and a semiconductor having a high pressure resistance is provided. A pressure sensor and a method for manufacturing the same have been provided.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施形態に係る半導体圧力センサの
製造方法を示す製造工程図である。
FIG. 1 is a manufacturing process diagram showing a method for manufacturing a semiconductor pressure sensor according to one embodiment of the present invention.

【図2】従来例に係る半導体圧力センサの製造方法を示
す製造工程図である。
FIG. 2 is a manufacturing process diagram showing a method for manufacturing a semiconductor pressure sensor according to a conventional example.

【符号の説明】[Explanation of symbols]

1 シリコン基板 2、3 熱絶縁膜 4、5 窒化膜 6 拡散層(ピエゾ抵抗) 7 エッチング窓 8 ダイアフラム構造 9 日差し部 10 表面電極 11 窒化膜 12 傷 13 ガラス台座 14 接合面 15 マスクパターン 15a 開口 16 注入層 17 孔部 18 孔部 19 ガラス台座 20 拡散層の底部 21 表面 DESCRIPTION OF SYMBOLS 1 Silicon substrate 2, 3 Thermal insulation film 4, 5 Nitride film 6 Diffusion layer (piezo resistance) 7 Etching window 8 Diaphragm structure 9 Sunlight part 10 Surface electrode 11 Nitride film 12 Scratches 13 Glass pedestal 14 Joining surface 15 Mask pattern 15a Opening 16 Injection layer 17 hole 18 hole 19 glass pedestal 20 bottom of diffusion layer 21 surface

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 ピエゾ抵抗が形成され所望のダイアフラ
ム厚を有する半導体基板と、圧力導入用の貫通孔を有し
前記半導体基板に接合されたガラス台座を有してなり、
該ガラス台座の貫通孔は、半導体基板との接合面側は前
記ピエゾ抵抗に圧力が行き渡る程度の大きさの径を有
し、反対面側は径を小さくするように形成したことを特
徴とする半導体圧力センサ。
1. A semiconductor substrate having a piezoresistor and a desired diaphragm thickness, and a glass pedestal having a through hole for pressure introduction and joined to the semiconductor substrate,
The through-hole of the glass pedestal is characterized in that the bonding surface side with the semiconductor substrate has a diameter that is large enough to spread the pressure to the piezoresistance, and the opposite surface side is formed to have a small diameter. Semiconductor pressure sensor.
【請求項2】 半導体基板に所望のダイアフラム厚み以
上の深さでピエゾ抵抗となる拡散層を形成し、半導体基
板との接合面側は前記ピエゾ抵抗に圧力が行き渡る程度
の大きさの径を有し、反対面側は径を小さくするように
圧力導入用の貫通孔を形成したガラス台座を形成し、前
記半導体基板のピエゾ抵抗を形成した面と前記ガラス台
座の上面側とを陽極接合方により接合し、前記半導体基
板の前記ガラス台座と接合していない面側を研磨し、さ
らに該研磨面を化学的エッチングすることにより、前記
所望のダイアフラム厚みになるようにするとともに鏡面
にし、該鏡面にした半導体基板の面上に、熱酸化膜及び
表面電極を形成するようにしたことを特徴とする半導体
圧力センサの製造方法。
2. A piezo-resistance diffusion layer having a depth equal to or greater than a desired diaphragm thickness is formed in a semiconductor substrate, and a bonding surface side with the semiconductor substrate has a diameter large enough to allow pressure to reach the piezo resistance. Then, the opposite surface side forms a glass pedestal having a through hole for pressure introduction so as to reduce the diameter, and the surface on which the piezoresistance of the semiconductor substrate is formed and the upper surface side of the glass pedestal are anodically bonded. Bonding, polishing the side of the semiconductor substrate that is not bonded to the glass pedestal, and further chemically etching the polished surface so as to have the desired diaphragm thickness and mirror surface, A method for manufacturing a semiconductor pressure sensor, wherein a thermal oxide film and a surface electrode are formed on a surface of a semiconductor substrate formed as described above.
JP31790496A 1996-11-28 1996-11-28 Semiconductor pressure sensor and fabrication thereof Pending JPH10160606A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP31790496A JPH10160606A (en) 1996-11-28 1996-11-28 Semiconductor pressure sensor and fabrication thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31790496A JPH10160606A (en) 1996-11-28 1996-11-28 Semiconductor pressure sensor and fabrication thereof

Publications (1)

Publication Number Publication Date
JPH10160606A true JPH10160606A (en) 1998-06-19

Family

ID=18093357

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31790496A Pending JPH10160606A (en) 1996-11-28 1996-11-28 Semiconductor pressure sensor and fabrication thereof

Country Status (1)

Country Link
JP (1) JPH10160606A (en)

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CN111446193A (en) * 2020-03-05 2020-07-24 绍兴同芯成集成电路有限公司 Glass carrier plate with central part removed
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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011013178A (en) * 2009-07-06 2011-01-20 Yamatake Corp Pressure sensor and method of manufacture
CN104614117A (en) * 2015-01-15 2015-05-13 北京大学 Piezoresistive pressure meter chip structure and preparation method thereof
CN105547533A (en) * 2015-12-09 2016-05-04 北京大学 Pressure gauge chip structure and preparation method thereof
CN113044801A (en) * 2019-12-27 2021-06-29 新唐科技股份有限公司 Sensor film structure and manufacturing method thereof
CN111446193A (en) * 2020-03-05 2020-07-24 绍兴同芯成集成电路有限公司 Glass carrier plate with central part removed
CN111446193B (en) * 2020-03-05 2023-06-02 绍兴同芯成集成电路有限公司 Glass carrier plate with center part removed

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