JPH05190873A - Semiconductor pressure sensor and manufacture thereof - Google Patents

Abstract

PURPOSE:To achieve alignment of a mask pattern easily and make thin a diaphragm without reducing a joint force in a structure where two semiconductor substrates are laminated in general in a semiconductor pressure sensor for providing a piezo resistance element at a semiconductor substrate. CONSTITUTION:A first semiconductor substrate 1 and a second semiconductor substrate 2 are laminated by an oxide film 20, insulation films 31 and 32 are formed on both surfaces, a diaphragm 40 is formed so that the oxide film 20 is exposed to the side of the second semiconductor substrate 2, and at the same time a mating mark 30 is formed, thus forming a piezo element at the side of the first semiconductor substrate 1 on the bottom surface of the diaphragm 40.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor pressure sensor provided with a piezoresistive element on a semiconductor substrate and a method for manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, there is a semiconductor pressure sensor of this type disclosed in Japanese Patent Laid-Open No. 2-40971.

A conventional manufacturing method and its structure will be described below in order with reference to FIG.

FIG. 4 (a): After forming an N ⁺ buried layer 3 and a P ⁺ buried layer 5 on a first n-type silicon substrate 1 having a 100 plane orientation, a P-type epitaxial layer 7 is grown, An oxide film 9 is formed on the surface.

FIG. 4 (b): Next, a second n-type silicon substrate 11 having an oxide film 19 formed on the surface thereof is directly formed on the surface of the substrate 1 (inverted in this figure) by a known wafer. By the bonding method, the oxide films 9 and 19 are brought into contact with each other.
Bonding is performed at a temperature of 00 ° C to 1100 ° C.

FIG. 4 (c): Subsequently, the first n-type substrate 1 is polished to a predetermined thickness, and then the surface is finished to obtain a crystal plane equivalent to that of the original substrate. After this, the isolation layer 20,
Subsequently, an active element 23 such as a piezoresistive element 21 or a bipolar transistor forming an amplifier circuit is formed. Furthermore, an insulating film 12 such as a nitride film is formed on the back surface of the second n-type substrate 11.
Are selectively formed and silicon etching is performed by the alkali etching method using the oxide films 9 and 19 as stoppers to form the diaphragm 50.

In the semiconductor pressure sensor, the diaphragm 50 is distorted by the applied pressure, and the strain stress is detected by the piezoresistive element 21 as a resistance change.
In addition to the piezoresistive element 21, the pressure sensitivity characteristics are important parameters such as the thickness of the diaphragm 50 and the arrangement of the piezoresistive element with respect to the diaphragm 50. In particular, the thinner the diaphragm, the better the sensitivity, and the accuracy of the thickness governs variations in sensor characteristics.

[0008]

SUMMARY OF THE INVENTION In the method described above,
Since the oxide film is used as an etching stopper at the time of forming the diaphragm, it is characterized by excellent etching controllability, but has the following problems.

(1) Since the epitaxial layer (hereinafter abbreviated as an epi layer) is formed by forming the pattern before the wafer is bonded, a pattern step such as a buried layer is formed on the surface of the substrate, and the direct bonding force of the wafer is increased. Lower.

(2) Since the wafer is ground and then polished, the position of the buried layer pattern formed previously cannot be found at all from the substrate surface, making it difficult to align the mask pattern for the subsequent transistor formation.

(3) Since the diaphragm is formed from the back surface of the bonded substrate, the back surface aligner is used to align the pattern on the front surface. Therefore, the alignment accuracy is low, which hinders miniaturization of the diaphragm.

According to the present invention, in order to eliminate the above-mentioned problems, all patterns are formed after wafer bonding, and alignment is performed only from the surface including diaphragm formation.
An object of the present invention is to provide a pressure sensor having a novel structure and a method of manufacturing the same, in which the mask pattern can be easily aligned and the diaphragm can be formed thin, resulting in miniaturization.

[0013]

To solve the above problems, the present invention provides a semiconductor pressure sensor, wherein a piezoresistive element is provided in a diaphragm surface formed from the surface of a semiconductor substrate, and the piezoresistive element has a low resistance polysilicon resistor. And the electrodes are drawn out to the surface of the semiconductor substrate.

Further, in the manufacturing method, the second semiconductor substrate is attached to the surface of the first semiconductor substrate, the first semiconductor substrate is polished to a predetermined thickness, and then the second semiconductor substrate is attached from the surface. A diaphragm is formed so as to reach the mating interface, and the piezoresistive element is selectively formed on the bottom surface of the diaphragm by the alignment mark provided when the diaphragm is formed, and then polysilicon is selectively formed. It was done.

[0015]

As described above, according to the present invention, the semiconductor substrate bonded via the oxide film is accurately aligned with the bottom surface of the diaphragm formed from the surface of one semiconductor substrate and with respect to the diaphragm. Since the piezoresistive element is provided on the other semiconductor substrate and the low resistance polysilicon resistor is connected to the piezoresistive element to draw out the electrode on the surface of the semiconductor substrate, the following effects can be expected.

After wafer bonding, elements such as bipolar transistors, diaphragms and piezoresistive elements can be accurately aligned and patterned only from one side.

Further, the thickness of the diaphragm can be formed thin without being controlled by etching, and the piezoresistive element can be accurately arranged.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention is shown in FIGS.
It shows in (e), and demonstrates it in order below.

FIG. 1A: 2 on the surface of the first semiconductor substrate 1
After forming an oxide film 21 of about 000 Å and then forming an oxide film 22 of about 2000 Å on the surface of the second semiconductor substrate 2, both the substrates 1 and 2 are combined with the oxide films 21 and 22 inside, and the temperature is 1000 ° C. They are bonded and integrated by a direct bonding method or the like in which they are heated at about a temperature. By this bonding, the oxide film 21,
Since 22 is completely integrated, both oxide films will be treated as one and will be referred to as oxide film 20 hereinafter. As the first semiconductor substrate 1, for example, a double-sided mirror wafer of (100) n-type with a specific resistance of 5 Ω-cm and a thickness of about 150 μm is used, and as the second semiconductor substrate, a (100) P-type with a specific resistance of 10 Ω-. A double-sided mirror wafer having a thickness of m and a thickness of about 250 μm is used.

After this, the first semiconductor substrate 1 is shown in FIG.
The line A ′ is removed by polishing, and a single crystal plane having crystallinity similar to that of a normal silicon substrate is finished by the same method as in the production of a single crystal substrate. The thickness of the first semiconductor substrate 1 left after polishing is reduced to about 10 μm because it is used as the diaphragm surface of the pressure sensor.

FIG. 1 (b): Nitride films 31 and 32 having a thickness of 3000 Å are formed on both surfaces of the bonded substrates, for example, a known L film.
It is formed by the PCVD (Low Pressure Chemical Vapor Deposition) method. Next, the nitride film 32 on the second semiconductor substrate 2 is selectively etched by known dry etching or the like to form a pattern of the alignment mark 3 and the diaphragm 4. Subsequently, the silicon surface of the second semiconductor substrate 2 exposed by using the patterned nitride film 32 as a mask is anisotropically etched with an alkaline etching solution containing KOH as a main component to form the alignment mark 30 and the diaphragm. 40 is formed. At this time, 100 planes disappear within the alignment mark 30 due to anisotropic etching, the etching stops, and the shape on the V groove is finished. Further, the etching in the diaphragm 40 is stopped by the oxide film 20.

FIG. 1C: Next, the nitride films 31 and 32 are removed, and a thermal oxide film 33 of about 3000 Å is formed on the entire surface of the semiconductor substrate.
34 is formed.

After that, a resist pattern is formed on the bottom surface of the diaphragm 40 by known photolithography (not shown), and the oxide film 20 is formed using the resist pattern as a mask.
After selective etching, boron (B) of about 1 × 10 ¹⁶ cm ^{-2 is} implanted by a known implantation (hereinafter abbreviated as “implantation”) method, and oxidation annealing is performed.
The piezoresistive element 5 is formed on the semiconductor substrate 1. To form the resist pattern of the piezoresistive element 5 on the bottom surface of the diaphragm 40, for example, a stepper (reduction projection exposure machine) is used. That is, by positioning with the alignment mark 30 on the second semiconductor substrate 2 and using the out-focus mechanism to shift the focus by the thickness (250 μm) of the second semiconductor substrate 2, alignment with the bottom surface of the diaphragm 40 can be achieved. You can easily. It is also possible to form extremely fine patterns by using a stepper.

FIG. 1 (d): A contact window 6 is opened in the oxide film 20 on the piezoresistive element 5, and then about 3000 Å of polysilicon 7 is formed by the LPCVD method to form 1 ×.
After implanting boron of about 10 ¹⁶ cm ^-2 on the entire surface, the polysilicon 7 is selectively etched to draw an electrode on the second semiconductor substrate 2 as shown in the figure. The LPCVD method is excellent in coverage, and the polysilicon 7 passes through the tapered side surface of the diaphragm 40 and the piezoresistive element contact window 6 is formed.
To the second semiconductor substrate 2. Further, the patterning of the polysilicon 7 is performed by known photolithography etching using an aligner having a deep depth of focus. Since the polysilicon 7 is intended to be drawn out as an electrode, pattern accuracy is not required.

Next, an Al electrode 8 is formed on the polysilicon 7 drawn on the second semiconductor substrate 2.

FIG. 1 (e): Next, a passivation film 9 is formed for the purpose of protecting the surface, the oxide film 33 of the first semiconductor substrate 1 is removed, and then an electrode pad 10 is formed to complete the semiconductor pressure sensor. To do. In this embodiment, since the back surface is a flat surface, a stroke for bending the diaphragm surface when pressure is applied is provided. Therefore, a known electrostatic seal or the like is attached to a glass pedestal having a shape as shown by a dotted line in FIG. It is necessary to paste with the technology of. At this time, by making the counterbore of the glass pedestal sufficiently large, alignment accuracy is not required.

As a second embodiment, a method of manufacturing a one-chip integrated pressure sensor capable of mounting a bipolar type analog integrated circuit is shown in FIGS. 2 (a) and 2 (b) and will be described below.

FIG. 2 (a): As in the first embodiment, the first
The semiconductor substrate 1 and the second semiconductor substrate 2 are bonded and integrated via the oxide film 20. The same numbers are given to the same components as in the first embodiment.

[0029] Then on the second semiconductor substrate 2, after forming a N ⁺ buried layer 51 by an impurity such as A _s a known selective diffusion method to form an epitaxial layer 50 of n-type. In this case, the epitaxial layer has a resistivity of 5 Ω-cm and a thickness of 6 by a low pressure epitaxial method using a SiH ₂ Cl ₂ source.
It is about μm.

Then, similarly to the conventional example, the isolation layer 52, the base layer 53, the emitter layer 54, and the collector extraction layer 55 are sequentially formed on the epitaxial layer 50 to form an active element such as a bipolar transistor forming an amplifier circuit. Complete. At this time, the oxide film 56 is formed on the epitaxial layer 50. After this, polishing and removal up to the line indicated by AA 'in the figure is the same as in the first embodiment.

FIG. 2 (b): Thickness 300 on both sides of the substrate.
The 0Å nitride films 31 and 32 are formed by, for example, the known LPCVD method. Next, the nitride film 32 on the epitaxial layer 50 is selectively etched by known dry etching to form the pattern of the alignment mark 3 and the diaphragm 4.
Subsequently, using the nitride films 31 and 32 as masks, the exposed oxide film 56 is subjected to HF wet etching, and then the exposed epitaxial layer 50 and the second semiconductor substrate 2 thereunder are mainly composed of KOH. Anisotropic etching is performed with an alkaline etching solution. Thus, the alignment mark 30 and the diaphragm 40 are formed as in the first embodiment. Since the subsequent steps are the same as those in the first embodiment, description thereof will be omitted. As can be seen from this example, since the thickness of the diaphragm is very thin after the diaphragm is formed and the strength is insufficient, if necessary, as shown in FIG. Of polysilicon 100 may be grown and lined. This polysilicon 100 may be removed in the final step.

[0032]

As described in detail above, according to the present invention, a semiconductor substrate bonded with an oxide film interposed
A piezoresistive element is provided on the other semiconductor substrate at the bottom surface of the diaphragm formed so that the internal oxide film is exposed from the surface of the one semiconductor substrate and accurately aligned with the diaphragm. Since a low resistance polysilicon resistor is connected to and the electrode is drawn out to the surface of the semiconductor substrate, the following effects can be expected.

(1) After wafer bonding, elements such as bipolar transistors, diaphragms and piezoresistive elements can be accurately aligned and patterned only from one side.

(2) The etching controllability of the diaphragm is excellent, and the bonding force of the wafer is not reduced at all.

(3) The thickness of the diaphragm can be made thin without being controlled by etching, and the piezoresistive element can be accurately arranged, so that high sensitivity, high accuracy, and miniaturization are possible.

[Brief description of drawings]

FIG. 1 is a first embodiment of the present invention.

FIG. 2 is a second embodiment of the present invention.

FIG. 3 is a supplementary explanatory diagram of FIG.

FIG. 4 Conventional example

[Explanation of symbols]

 1 First Semiconductor Substrate 2 Second Semiconductor Substrate 5 Piezoresistive Element 7 Polysilicon 8 Electrode 20 Oxide Film 30 Alignment Mark 31, 32 Nitride Film 40 Diaphragm

Claims (3)

[Claims] 1. A substrate having a structure in which a first semiconductor substrate and a second semiconductor substrate are bonded together via an insulating film, and the second semiconductor substrate is formed on the substrate.
The semiconductor pressure sensor, wherein a diaphragm is provided on the semiconductor substrate so that the insulating film is exposed, and a piezoresistive element is provided on the bottom surface of the diaphragm on the side of the first semiconductor substrate. 2. The semiconductor pressure sensor according to claim 1, wherein a circuit element such as a transistor is provided in a region other than the diaphragm region of the second semiconductor substrate. 3. (a) A step of laminating a first semiconductor substrate and a second semiconductor substrate via a first insulating film, and polishing the first semiconductor substrate to a predetermined thickness, (b) Second insulating films are formed on both surfaces of the bonded substrates, the second insulating film on the second semiconductor substrate side is patterned, and the pattern is used as a mask on the second semiconductor substrate side. Forming a diaphragm so that the first insulating film is exposed and forming an alignment mark; (c) introducing an impurity into the bottom surface of the diaphragm to form a piezoresistor on the first semiconductor substrate side of the bottom surface. A method of manufacturing a semiconductor pressure sensor, including the steps of forming an element and the steps described above.