JPH098440A - Electronic component connecting device and manufacture thereof - Google Patents

Electronic component connecting device and manufacture thereof

Info

Publication number
JPH098440A
JPH098440A JP7155865A JP15586595A JPH098440A JP H098440 A JPH098440 A JP H098440A JP 7155865 A JP7155865 A JP 7155865A JP 15586595 A JP15586595 A JP 15586595A JP H098440 A JPH098440 A JP H098440A
Authority
JP
Japan
Prior art keywords
electronic component
wiring board
electrode
base material
connecting device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP7155865A
Other languages
Japanese (ja)
Inventor
Masao Segawa
雅雄 瀬川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP7155865A priority Critical patent/JPH098440A/en
Publication of JPH098440A publication Critical patent/JPH098440A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303Surface mounted components, e.g. affixing before soldering, aligning means, spacing means

Landscapes

  • Solid State Image Pick-Up Elements (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

PURPOSE: To reduce the coating thickness of an anisotropic conductive film and also to contrive to improve a sealing of the package of an electronic component. CONSTITUTION: Electrode patterns 13a and 13b of a wiring board 11 are arranged on the rear of the board 11. A first aperture 14, which is larger than a pixel area of a CCD element 15 and is smaller than the external shape of the element 15, is formed in an insulating base material 12. Second apertures 17a and 17b are formed in parts, which oppose to electrodes 16a and 16b of the element 15, on the base meterial 12. An optical glass 18 is positioned under the aperture 14 and is attached to the surface on one side of the surfaces of the base material 12. The light-receiving surface of the element 15 is positioned on the aperture 14 and the element 15 is arranged on the other surface of the base material 12. Connection bumps (projections) 19 are respectively formed on the electrodes of the element 15 and these bumps 19 are inserted in the apertures 17a and 17b and come into contact with the patterns 13a and 13b of the board 11, whereby the element 15 can be electrically connected with the board 11.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、小型パッケージ内に
収納された電子部品の接続装置およびその製造方法に関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a connecting device for electronic parts housed in a small package and a method for manufacturing the same.

【0002】[0002]

【従来の技術】電気素子を小型パッケージ内に収納され
た電子部品は、産業用に幅広く使用されている。中で
も、CCD素子(固体撮像素子)を用いた光電変換素子
は、カメラ等の応用範囲が広い。このようなCCD素子
は、産業用として小型化の要求が特に強く、軽薄短小化
の開発に各社が凌ぎを削っている。この光電変換素子の
実装については、本件出願人が先に出願した特願平6−
111534号に記載されており、以下、これを図8〜
図12に示して説明する。
2. Description of the Related Art Electronic components in which electric elements are housed in a small package are widely used for industrial purposes. Above all, a photoelectric conversion element using a CCD element (solid-state image pickup element) has a wide range of applications such as a camera. Such a CCD device is particularly required to be miniaturized for industrial use, and each company is trying to surpass the development of a light, thin, short and miniaturized device. Regarding the mounting of this photoelectric conversion element, Japanese Patent Application No. 6-
No. 111534, which will be described below with reference to FIGS.
This will be described with reference to FIG.

【0003】図8は、パッケージを構成する分解斜視図
であり、CCD素子1と可撓性基板2および光学ガラス
3から構成される。これらを、後述するプロセスにより
接続すると、図9のパッケージが完成する。
FIG. 8 is an exploded perspective view of a package, which comprises a CCD element 1, a flexible substrate 2 and an optical glass 3. When these are connected by the process described later, the package of FIG. 9 is completed.

【0004】次に図10を用い、図9にパッケージの製
造プロセスについて説明する。まず、図10(a),
(b)において光学ガラス3と配線基板2を接着する。
配線基板2は、可撓性の絶縁性基材2aとこれに固着さ
れた複数の電極パターン2bからなり、絶縁性基材2a
の中央に開口部2cを形成する。光学ガラス3と可撓性
基板2とを接着する接着剤は、例えば紫外線硬化性の接
着剤を用いて絶縁性基材2aの裏面に塗布する。
Next, the manufacturing process of the package will be described with reference to FIGS. First, FIG. 10 (a),
In (b), the optical glass 3 and the wiring board 2 are bonded.
The wiring board 2 includes a flexible insulating base material 2a and a plurality of electrode patterns 2b fixed to the flexible insulating base material 2a.
An opening 2c is formed in the center of the. An adhesive agent for adhering the optical glass 3 and the flexible substrate 2 is applied to the back surface of the insulating base material 2a using, for example, an ultraviolet curable adhesive agent.

【0005】次に、図10(c)において、電極パター
ン2bの周囲に、異方性導電膜4を形成する。図10の
(d)において、CCD素子1を異方性導電膜4上から
熱圧着により電極パターン2bに電気的に接続する。
Next, in FIG. 10C, an anisotropic conductive film 4 is formed around the electrode pattern 2b. In FIG. 10D, the CCD element 1 is electrically connected to the electrode pattern 2b from above the anisotropic conductive film 4 by thermocompression bonding.

【0006】図11は、図10の製造プロセスを断面構
造で示したものである。このとき、CCD素子1の画素
に相当するパッケージ内は、開口部2cであり、CCD
素子1に形成されたマイクロレンズ5による集光効果を
生かす構造にしてある。
FIG. 11 is a sectional view showing the manufacturing process of FIG. At this time, the inside of the package corresponding to the pixel of the CCD element 1 is the opening 2c, and the CCD
The structure is such that the condensing effect of the microlens 5 formed on the element 1 is utilized.

【0007】図12(a)は完成したパッケージの平面
図、図12(b)は図12(a)のラインA−A´の断
面図、図12(c)は図12(a)のラインB−B´の
断面図をそれぞれ示したものである。
FIG. 12 (a) is a plan view of the completed package, FIG. 12 (b) is a sectional view taken along line AA 'of FIG. 12 (a), and FIG. 12 (c) is a line of FIG. 12 (a). 3 is a cross-sectional view taken along the line BB ′.

【0008】図12(b)は、中空部6がある断面で、
(c)は電極パターンb2が並ぶ断面方向を示した。図
12の(c)では、異方性導電膜4がCCD素子1と絶
縁性基材2aの間に完全に充填されており、CCD素子
1の外周は全て外気から遮断、すなわち封止構造が図ら
れている。
FIG. 12 (b) is a cross section having a hollow portion 6,
(C) shows the cross-sectional direction in which the electrode patterns b2 are arranged. In (c) of FIG. 12, the anisotropic conductive film 4 is completely filled between the CCD element 1 and the insulating base material 2a, and the entire outer periphery of the CCD element 1 is shielded from the outside air, that is, the sealing structure is formed. Has been planned.

【0009】以上説明した構造により、超小型のCCD
パッケージが簡便な製造プロセスで得られる。しかしな
がら、従来方法には解決すべき問題点があった。それ
は、異方性導電膜4の塗布方法と封止方法である。すな
わち図11(c)のように、異方性導電膜4をディスペ
ンス塗布し、熱圧着する際に、同異方性導電膜4が、C
CD素子1の画素エリヤに進入したり、電極パターンb
2を伝って流れ出す不具合が発生する。図11(c)の
ように、もしCCD素子1の画素エリヤに進入すると画
素不良となり、もし電極パターンb2を伝ってパッケー
ジ外に流れ出すとパッケージ封止構造が得られなくな
る。
With the structure described above, a microminiature CCD
The package can be obtained by a simple manufacturing process. However, the conventional method has a problem to be solved. It is a method of applying the anisotropic conductive film 4 and a method of sealing. That is, as shown in FIG. 11C, when the anisotropic conductive film 4 is dispensed and thermocompression bonded, the anisotropic conductive film 4 is C
It enters the pixel area of the CD element 1 or the electrode pattern b
There is a problem that it flows out through 2. As shown in FIG. 11C, if it enters the pixel area of the CCD element 1, pixel failure occurs, and if it flows out of the package along the electrode pattern b2, the package sealing structure cannot be obtained.

【0010】異方性導電膜4の塗布厚みは、図12
(c)のように封止構造が前提のため、絶縁基材2aと
CCD素子1の最大ギャップG1(約55μm)を吸収
すべく、60μm〜90μm程度の塗布厚みが必要であ
った。さらに、ギャップを狭めるため、電極パターンで
ダミーリード7を形成したりした。それでも、異方性導
電膜4の塗布膜厚の制御は困難であり、滲み不良や封止
不良が発生し、歩留り低下をもたらす。従って、CCD
素子1と電極パターン2b間のギャップを狭めるととも
に、異方性導電膜4の塗布厚みを減少する手段が必要で
あった。
The coating thickness of the anisotropic conductive film 4 is shown in FIG.
Since the sealing structure is assumed as shown in (c), a coating thickness of about 60 μm to 90 μm was required to absorb the maximum gap G1 (about 55 μm) between the insulating base material 2a and the CCD element 1. Further, in order to narrow the gap, dummy leads 7 are formed with an electrode pattern. Even so, it is difficult to control the coating thickness of the anisotropic conductive film 4, and defective bleeding or defective sealing occurs, resulting in a decrease in yield. Therefore, CCD
A means for narrowing the gap between the element 1 and the electrode pattern 2b and reducing the coating thickness of the anisotropic conductive film 4 is required.

【0011】また、異方性導電膜4の流れ止めのため
の、ダムをCCD素子1上や配線基板2上に形成する手
段も、本件出願人が先に出願した特願平6−11153
4号のようなものも考えられるが、微細ダム構造のため
実現性が困難であり、また別工程での形成になるため製
造プロセスが複雑になる短所があった。
Further, a means for forming a dam on the CCD element 1 or the wiring board 2 for stopping the flow of the anisotropic conductive film 4 is also applied by the applicant of the present invention to Japanese Patent Application No. 6-11153.
Although a No. 4 type is also conceivable, it has a drawback that it is difficult to realize due to the fine dam structure, and the manufacturing process is complicated because it is formed in a separate step.

【0012】[0012]

【発明が解決しようとする課題】上記した従来の電子部
品の接続装置およびその製造方法では、異方性導電膜の
塗布厚みを減少させる手段が提案されてはいるが、実際
には微細ダム構造のため実現性が困難であり、また別工
程での形成になるため製造プロセスが複雑になる等の問
題があった。この発明は、異方性導電膜の塗布厚みを減
少させるとともに、パッケージの封止の向上を図る。
In the above-mentioned conventional connecting device for electronic parts and the manufacturing method thereof, a means for reducing the coating thickness of the anisotropic conductive film has been proposed, but in reality, it is a fine dam structure. Therefore, there is a problem that the feasibility is difficult, and the manufacturing process is complicated because it is formed in another step. The present invention reduces the coating thickness of the anisotropic conductive film and improves the sealing of the package.

【0013】[0013]

【課題を解決するための手段】この発明は、上記問題を
解決するために、素子形成部と該素子形成部のパッケー
ジの周辺に形成され前記素子形成部に電気的に接続した
電極からなる電子部品と、絶縁性部材と、前記絶縁性部
材に接着した、前記電子部品の素子形成部に対向する位
置に1の開口部を前記電子部品の電極に対向する位置に
第2の開口部とを形成した絶縁基材上に、電極パターン
を固着してなる配線基板と、前記電子部品の電極と前記
配線基板の電極パターンとを電気的に接続する接続手段
とからなることを特徴とする。
In order to solve the above problems, the present invention provides an electronic device including an element forming portion and an electrode formed around a package of the element forming portion and electrically connected to the element forming portion. A component, an insulating member, and one opening bonded to the insulating member at a position facing the element forming portion of the electronic component, and a second opening at a position facing the electrode of the electronic component. It is characterized by comprising a wiring board formed by fixing an electrode pattern on the formed insulating base material, and a connecting means for electrically connecting the electrode of the electronic component and the electrode pattern of the wiring board.

【0014】予め、電子部品の素子形成部に対向する位
置に第1の開口部を前記電子部品の電極に対向する位置
に第2の開口部をそれぞれ絶縁基材に設けるとともに、
該絶縁基材に電極パターンを固着して配線基板を形成し
てなる第1の工程と、絶縁性部材に前記配線基板を接着
する第2の工程と、前記電子部品と前記配線基板を接続
する第3の工程とからなることを特徴とする。
In advance, a first opening is provided at a position facing the element forming portion of the electronic component, and a second opening is provided at a position facing the electrode of the electronic component on the insulating base material.
A first step of forming a wiring board by fixing an electrode pattern to the insulating base material, a second step of adhering the wiring board to an insulating member, and connecting the electronic component and the wiring board And a third step.

【0015】[0015]

【作用】上記した手段により、第2の開口部を介して電
極パターンと電子部品をバンプあるいは異方性導電膜を
用いて接続するようにした。このためバンプや異方性導
電膜は、第2の開口部を形成した配線基板の厚み分とな
り、製品による寸法のばらつきを抑えることができるば
かりか、第1および第2の開口部との間に絶縁基材が位
置されることとなり、バンプや異方性導電膜が電子部品
の素子形成部に流れ出すことも防止できる。
By the above means, the electrode pattern and the electronic component are connected to each other through the second opening portion by using the bump or the anisotropic conductive film. Therefore, the bump and the anisotropic conductive film have a thickness corresponding to the thickness of the wiring substrate having the second opening formed therein, so that the dimensional variation due to the product can be suppressed and the gap between the first and second openings is not provided. Since the insulating base material is located at the position, it is possible to prevent the bumps and the anisotropic conductive film from flowing out to the element forming portion of the electronic component.

【0016】[0016]

【実施例】以下、この発明の実施例について図面を参照
しながら詳細に説明する。図1は、この発明の一実施例
を説明するための実装構造を示す斜視図である。図1に
おいて、まず、配線基板11として、厚さが75μm程
度のポリイミドを絶縁基材12に、この両側より幅が2
00μm、厚さが25μm程度の電極パターン13a,
13b形成したTABテープ(Tape Automated Bonding)
を使用した。この場合、配線基板11は可撓性基板であ
るが、可撓性のないガラスエポキシ基板のような、剛性
の基板でもよい。配線基板11の電極パターン13a,
13bは、配線基板11の裏面に配置してある。また、
絶縁基材12には、CCD素子の画素エリヤより大きい
とともに、CCD素子の外形より小さな第1の開口部1
4を形成してある。第1の開口部14は、CCD素子1
5のマイクロレンズやカラーフィルタ等の有機樹脂で形
成された部分より外側に設けると、滲み出し防止の点で
最適である。
Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 is a perspective view showing a mounting structure for explaining an embodiment of the present invention. In FIG. 1, first, as the wiring board 11, polyimide having a thickness of about 75 μm is used as the insulating base material 12, and the width is 2
Electrode pattern 13a having a thickness of about 00 μm and a thickness of about 25 μm,
13b formed TAB tape (Tape Automated Bonding)
It was used. In this case, the wiring board 11 is a flexible board, but may be a rigid board such as an inflexible glass epoxy board. The electrode pattern 13a of the wiring board 11,
13b is arranged on the back surface of the wiring board 11. Also,
The insulating substrate 12 has a first opening 1 that is larger than the pixel area of the CCD element and smaller than the outer shape of the CCD element.
4 is formed. The first opening 14 is the CCD element 1.
It is optimal in terms of preventing bleeding if it is provided on the outer side of the portion formed of an organic resin such as the microlens and the color filter of 5.

【0017】また、絶縁基材12上では、第1の開口部
14以外に、直線状に複数の電極を対向してデュアル配
置されたCCD素子15の各電極16a,16bに対向
する部分には、穴径が150μm程度の第2の開口部1
7a,17bを形成してある。絶縁基材12の一方面に
は、厚さが2mm、外形サイズが6mm角程度の光学ガ
ラス18を、第1の開口部14に位置して取着してあ
る。絶縁基材12の他方面には、CCD素子15の受光
面を第1の開口部14に位置して配置する。CCD素子
15の電極上には、径が100μm、高さが70μm程
度の接続用のバンプ(突起)19を形成してあり、この
バンプ19を第2の開口部17a,17bに挿入し、配
線基板11の電極パターン13a,13bと接触するこ
とで電気的接続を図る。バンプ19は、金ワイヤを用い
て、ワイヤボンディング法の変形で形成できる。バンプ
19の高さは、第2の開口部17a,17bの高さ、す
なわち絶縁基材12の厚みより高くする必要がある。バ
ンプ19の先端形状は、平坦型でも、バンプ19の高さ
を高くするためワイヤの引きちぎり型である突起型でも
よい。第2の開口部17a,17bの径はバンプ19の
最外形より大きいことが必要である。
Further, on the insulating base material 12, other than the first opening portion 14, a portion opposed to each of the electrodes 16a and 16b of the CCD element 15 in which a plurality of electrodes are linearly arranged so as to be dually arranged is provided. , The second opening 1 having a hole diameter of about 150 μm
7a and 17b are formed. An optical glass 18 having a thickness of 2 mm and an outer size of about 6 mm square is attached to one surface of the insulating base material 12 at the first opening portion 14. On the other surface of the insulating base material 12, the light receiving surface of the CCD element 15 is arranged so as to be located in the first opening portion 14. Bumps (projections) 19 for connection having a diameter of 100 μm and a height of about 70 μm are formed on the electrodes of the CCD element 15, and the bumps 19 are inserted into the second openings 17a and 17b to form wiring. By making contact with the electrode patterns 13a and 13b of the substrate 11, electrical connection is achieved. The bumps 19 can be formed using a gold wire by a modification of the wire bonding method. The height of the bump 19 needs to be higher than the height of the second openings 17a and 17b, that is, the thickness of the insulating base material 12. The tip shape of the bump 19 may be a flat shape or a protruding shape which is a wire tear-off type in order to increase the height of the bump 19. The diameter of the second openings 17a and 17b needs to be larger than the outermost shape of the bump 19.

【0018】また、CCD素子15の熱圧着時にバンプ
19を加圧変形して、バンプ19の高さ全体を揃えなが
ら、CCD素子15の表面を絶縁基材12の表面に押し
あてると、CCD素子15と配線基板11の隙間が最少
となり封止効果が高くなる。さらに、熱圧着時にバンプ
19そのものの形状を、第2の開口部17a,17bの
内で変形させ、第2の開口部17a,17b内に充填さ
せることで接続性を上げることもできる。バンプ19の
材料としては、汎用である、金ワイヤを用いたり、硬度
が低く変形の容易な半田バンプ等が使用に適している。
Also, when the bumps 19 are deformed under pressure during thermocompression bonding of the CCD element 15 and the surface of the CCD element 15 is pressed against the surface of the insulating base material 12 while making the entire height of the bumps 19 uniform, the CCD element 15 The gap between 15 and the wiring board 11 is minimized, and the sealing effect is enhanced. Further, the connectivity of the bumps 19 themselves can be improved by deforming the shape of the bumps 19 themselves in the second openings 17a, 17b and filling the second openings 17a, 17b during thermocompression bonding. As the material of the bumps 19, it is suitable to use a general-purpose gold wire, a solder bump having low hardness and easy deformation, or the like.

【0019】次に図2を用いて、図1の実施例の製造プ
ロセスについて説明する。まず、図2の(a)から
(b)の工程で光学ガラス18を配線基板11とを接着
する。配線基板11は絶縁基材12と幅200μmの電
極パターン13a,13b、また4×4mmの第1の開
口部14および穴径が150μmの第2の開口部17
a,17bからなる。接着剤は例えば紫外線硬化型の接
着剤を用いて絶縁基材12の裏面に塗布する。
Next, the manufacturing process of the embodiment shown in FIG. 1 will be described with reference to FIG. First, the optical glass 18 is bonded to the wiring board 11 in the steps of (a) and (b) of FIG. The wiring board 11 includes an insulating base material 12, electrode patterns 13a and 13b having a width of 200 μm, a first opening 14 of 4 × 4 mm and a second opening 17 having a hole diameter of 150 μm.
It consists of a and 17b. The adhesive is applied to the back surface of the insulating substrate 12 by using, for example, an ultraviolet curable adhesive.

【0020】このとき、接着力を上げるため、配線基板
11や電極パターン13a,13bをエッチングして粗
面化する方法が有効である。また、接着剤や絶縁基材1
2や電極パターン13a,13bは、反射防止のため黒
色化してもよい。
At this time, in order to increase the adhesive force, a method of etching the wiring board 11 and the electrode patterns 13a and 13b to roughen the surface is effective. In addition, adhesive or insulating base material 1
2 and the electrode patterns 13a and 13b may be blackened to prevent reflection.

【0021】次に、図2の(c)おいて、電極パターン
13a,13bの周囲に、異方性導電膜20を形成す
る。次の図2の(d)で、CCD素子15の電極上に形
成したバンプ19を異方性導電膜20上から第2の開口
部17a,17bに挿入し、配線基板11の裏面側に形
成してある電極パターン13a,13bに、例えば15
0℃で60〜200秒程度の熱圧着により、電気的に接
続する。
Next, in FIG. 2C, an anisotropic conductive film 20 is formed around the electrode patterns 13a and 13b. 2D, the bumps 19 formed on the electrodes of the CCD element 15 are inserted into the second openings 17a and 17b from above the anisotropic conductive film 20 and are formed on the back surface side of the wiring board 11. The electrode patterns 13a and 13b which are formed have, for example, 15
It is electrically connected by thermocompression bonding at 0 ° C. for about 60 to 200 seconds.

【0022】このとき、第1の開口部14の下部には、
電極パターン13a,13b部に受けが設けてあり、下
部の穴は塞がれている構造となっている。異方性導電膜
20は、例えば、粒径5μm程度の金粒子をエポキシ樹
脂に分散させたものを用いればよい。なお、CCD素子
15の電極は、2方向であるが、1方向の片側に配置し
てもよい。
At this time, in the lower part of the first opening 14,
The electrode patterns 13a and 13b are provided with receivers, and the lower holes are closed. As the anisotropic conductive film 20, for example, gold particles having a particle size of about 5 μm dispersed in an epoxy resin may be used. Although the electrodes of the CCD element 15 are in two directions, they may be arranged on one side in one direction.

【0023】図3および図4は、図2の製造プロセスを
断面構造で示したものである。図2を正面より見た図3
の(a)のA−A´断面を示した(b)に示すように、
CCD素子15の画素と光学ガラス18との間に構成さ
れる中空部31に面するCCD素子15には、マイクロ
レンズ32が形成され、集光効果を生かす構造にしてあ
る。図3の(c)は電極パターン13a,13bが並ぶ
B−B´断面方向を示した。図3の(c)では、異方性
導電膜20がCCD素子15と配線基板11の間に完全
に充填されており、CCD素子15の外周は全て外気か
ら遮断、すなわち封止構造が図られている。このとき、
異方性導電膜20の塗布は、封止構造が前提であるが、
絶縁基材12とCCD素子15のギャップG2は5〜1
0μm程度と従来の1/5程度に減少できる。
3 and 4 are sectional views showing the manufacturing process of FIG. FIG. 3 is a front view of FIG.
As shown in (b) showing the AA ′ cross section of (a) of
A microlens 32 is formed in the CCD element 15 facing the hollow portion 31 formed between the pixel of the CCD element 15 and the optical glass 18, and has a structure in which a condensing effect is utilized. FIG. 3C shows the BB ′ cross section direction in which the electrode patterns 13a and 13b are arranged. In FIG. 3C, the anisotropic conductive film 20 is completely filled between the CCD element 15 and the wiring board 11, and the outer periphery of the CCD element 15 is completely shielded from the outside air, that is, a sealing structure is achieved. ing. At this time,
The anisotropic conductive film 20 is applied on the premise of a sealing structure.
The gap G2 between the insulating substrate 12 and the CCD 15 is 5 to 1
It can be reduced to about 0 μm, which is about 1/5 of the conventional value.

【0024】従って、塗布量も30〜50μm程度の塗
布厚みで十分である。図4において、異方性導電膜20
を第2の開口部17a,17b上に塗布した後(図4
(b))は、配線基板11の加熱時の粘度低下にともな
い、第2の開口部17a,17bに容易に流動して充填
できる。また、熱伝導性の高い電極パターン13a,1
3bは、第2の開口部17a,17bの穴下部で異方性
導電膜20を受けることができ、パッケージ外に流れ出
ることを抑えることができる。さらに、塗布の絶対量が
少ないため、CCD素子15の画素エリア内に異方性導
電膜20が滲み出す可能性も少なくなる。従って、滲み
出しがなく、封止性の良好な超小型CCDパッケージを
容易に実現できる。
Therefore, a coating amount of about 30 to 50 μm is sufficient. In FIG. 4, the anisotropic conductive film 20
After being applied to the second openings 17a and 17b (see FIG.
(B)) can be easily flowed and filled in the second openings 17a, 17b as the viscosity of the wiring board 11 is reduced during heating. In addition, the electrode patterns 13a, 1 having high thermal conductivity
3b can receive the anisotropic conductive film 20 below the holes of the second openings 17a and 17b, and can prevent the anisotropic conductive film 20 from flowing out of the package. Further, since the absolute amount of coating is small, the possibility that the anisotropic conductive film 20 will exude into the pixel area of the CCD element 15 is reduced. Therefore, it is possible to easily realize the microminiature CCD package which does not exude and has a good sealing property.

【0025】以上説明した構造により、異方性導電膜2
0の滲みや流れ出しによる、CCD素子15の画素不良
や封止不良のない、超小型のCCDパッケージが簡便な
製造プロセスで得ることができる。
With the structure described above, the anisotropic conductive film 2 is formed.
It is possible to obtain a microminiature CCD package that does not have pixel defects or sealing defects of the CCD element 15 due to bleeding or flowing of 0 by a simple manufacturing process.

【0026】この実施例において、CCD素子15と配
線基板11との接続手段として異方性導電膜20を用い
たが、これに限らず絶縁性接着剤を用いてもよい。この
ときバンプ19と電極パターン13a,13bは、例え
ば機械的接触で電気的な接続がなされ、接着剤は補強手
段となる。また、短時間であれば、バンプと電極パター
ン13a,13bが固相拡散接合してもよい。このと
き、封止材は接続後にCCD素子15の外周部に塗布す
ることで、気密封止化を図る。また、所望の接続を得る
開口には、銀ペーストのような、導電性粒子と接着剤か
らなる導電性接着剤を選択的に塗布し、加熱硬化した後
に封止剤で同様に封止補強してもよい。
In this embodiment, the anisotropic conductive film 20 is used as the means for connecting the CCD element 15 and the wiring substrate 11, but the invention is not limited to this, and an insulating adhesive may be used. At this time, the bumps 19 and the electrode patterns 13a and 13b are electrically connected by, for example, mechanical contact, and the adhesive serves as a reinforcing means. Further, the bumps and the electrode patterns 13a and 13b may be solid-phase diffusion-bonded to each other for a short time. At this time, the sealing material is applied to the outer peripheral portion of the CCD element 15 after connection, thereby achieving airtight sealing. In addition, a conductive adhesive such as a silver paste, which is composed of conductive particles and an adhesive, is selectively applied to the opening to obtain a desired connection, and after heating and curing, sealing and reinforcement are similarly performed with a sealing agent. May be.

【0027】さらに、配線基板11と光学ガラス18と
の接着面は、電極パターン13a,13bと絶縁基材1
2と光学ガラス18間となる。画像取りこみの際に、同
接着面が反射等の不具合がでないように、接着剤や電極
パターン13a,13bもしくは絶縁基材12は、黒色
化されていることが望ましい。
Furthermore, the bonding surface between the wiring board 11 and the optical glass 18 has the electrode patterns 13a and 13b and the insulating base material 1
2 and the optical glass 18. It is desirable that the adhesive, the electrode patterns 13a and 13b, or the insulating base material 12 be blackened so that the adhesive surface does not have a problem such as reflection when the image is taken in.

【0028】CCD素子15の受光部と対向する光学ガ
ラス18を凸構造とし、光学ガラス18のトータル厚み
を減らしたり、回折格子パターンなどの特性を付加する
ことができる。
The optical glass 18 facing the light receiving portion of the CCD element 15 has a convex structure so that the total thickness of the optical glass 18 can be reduced and characteristics such as a diffraction grating pattern can be added.

【0029】図5は、この発明の他の実施例を説明する
ための分解斜視図である。図1の実施例では、接続用の
第2の開口部を、CCD素子15の電極に対し1個ごと
に形成したが、この実施例では、額縁上に連通した第2
の開口部51としたものである。これにより、第2の開
口部51内に異方性導電ペーストを塗布することで、塗
布面が平坦化し塗布しやすくなるとともに、塗布量の保
持が開口部内で容易になる等の付随的な効果が期待でき
る。
FIG. 5 is an exploded perspective view for explaining another embodiment of the present invention. In the embodiment of FIG. 1, the second opening for connection is formed for each electrode of the CCD element 15, but in this embodiment, the second opening communicating with the frame is formed.
The opening 51 is defined as. Accordingly, by applying the anisotropic conductive paste in the second opening 51, the application surface is flattened and the application is facilitated, and an additional effect such that the application amount is easily held in the opening is obtained. Can be expected.

【0030】図6および図7は、それぞれこの発明の第
2および第3の他の実施例を説明するための正面図で、
配線基板11や異方性導電膜20の一部に連通部を設け
ることで結露対策を行ったものである。
FIGS. 6 and 7 are front views for explaining second and third other embodiments of the present invention, respectively.
A countermeasure against dew condensation is taken by providing a communicating portion in a part of the wiring board 11 or the anisotropic conductive film 20.

【0031】すなわち、図6の実施例のように、配線基
板11の絶縁基材12の一部に連通部61や、図7の実
施例にように、接続に必須な電極パターン13a,13
b部のみに異方性導電膜20a,20bを形成する。
That is, as in the embodiment shown in FIG. 6, a part of the insulating base material 12 of the wiring board 11 is connected to a communicating portion 61, and as in the embodiment shown in FIG. 7, electrode patterns 13a, 13 essential for connection are formed.
The anisotropic conductive films 20a and 20b are formed only on the b portion.

【0032】この各実施例では、配線基板11とCCD
素子15の間は外気と同環境となり、高湿中での結露が
発生しない。また、塵の進入等の防止のため開放部をシ
リコン等の湿度の出入りの早い樹脂で封止することもで
きる。
In each of these embodiments, the wiring board 11 and the CCD
The environment between the elements 15 is the same as the outside air, and dew condensation does not occur in high humidity. Further, in order to prevent the entry of dust and the like, the open portion can be sealed with a resin such as silicon which allows moisture to flow in and out quickly.

【0033】この発明は、上記した実施例に限定される
ものではなく、例えば、光学ガラス18としたが、パッ
ケージ内に形成された素子部上が透光性が必須な、紫外
線消去型メモリーにもこの発明は有効である。また電気
素子が、中空構造を必要とする他の素子、例えば表面弾
性波素子であるSAWデバイスや水晶発振子、さらには
LEDや光ピックアップといった、特殊パッケージへの
応用の可能となる。
The present invention is not limited to the above-mentioned embodiment, and for example, the optical glass 18 is used, but the invention is not limited to the ultraviolet erasable memory in which the light transmitting property is essential on the element portion formed in the package. This invention is also effective. Further, the electric element can be applied to other elements requiring a hollow structure, for example, a SAW device which is a surface acoustic wave element or a crystal oscillator, and further, a special package such as an LED or an optical pickup.

【0034】[0034]

【発明の効果】以上説明したように、この発明の電子部
品の接続装置およびその製造方法によれば、中空構造を
有する超小型の電子部品パッケージを、特性の向上・気
密封止性の向上および簡便な製造プロセスで得ることが
できる。
As described above, according to the connecting device for electronic parts and the method for manufacturing the same of the present invention, it is possible to improve the characteristics and the hermetic sealing of a microminiature electronic parts package having a hollow structure. It can be obtained by a simple manufacturing process.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明の一実施例を説明するための斜視図で
ある。
FIG. 1 is a perspective view for explaining an embodiment of the present invention.

【図2】この発明の製造プロセスを説明するため分解し
て示した説明図である。
FIG. 2 is an exploded view showing the manufacturing process of the present invention.

【図3】図1の構成を説明するための、(a)は図1の
正面図、(b),(c)はそれぞれ(a)のA−A´,
B−B´の断面図である。
3 (a) is a front view of FIG. 1, and FIGS. 3 (b) and 3 (c) are views for explaining the structure of FIG.
It is a sectional view of BB '.

【図4】図1の第2の開口部に異方性導電膜を注入して
これを接続手段とした場合の製造プロセスを説明するた
めの説明図である。
FIG. 4 is an explanatory diagram for explaining a manufacturing process when an anisotropic conductive film is injected into the second opening of FIG. 1 and used as a connecting means.

【図5】この発明の他の実施例を説明するための斜視図
である。
FIG. 5 is a perspective view for explaining another embodiment of the present invention.

【図6】この発明の第2の他の実施例を説明するための
正面図である。
FIG. 6 is a front view for explaining a second another embodiment of the present invention.

【図7】この発明の第3の他の実施例を説明するための
正面図である。
FIG. 7 is a front view for explaining a third embodiment of the present invention.

【図8】従来の電子部品の接続について説明するための
分解斜視図である。
FIG. 8 is an exploded perspective view for explaining connection of conventional electronic components.

【図9】図8を組み立てた状態を示す斜視図である。9 is a perspective view showing a state where FIG. 8 is assembled.

【図10】図8の製造プロセスを説明するための分解し
て示した説明図である。
FIG. 10 is an exploded view for explaining the manufacturing process in FIG.

【図11】図10の製造プロセスを断面構造で示した断
面図である。
11 is a sectional view showing the manufacturing process of FIG. 10 in a sectional structure.

【図12】図9の構成を説明するための、(a)は完成
したパッケージの平面図、(b)は(a)のラインA−
A´の断面図、(c)は(a)のラインB−B´の断面
図である。
12A is a plan view of a completed package for explaining the configuration of FIG. 9, and FIG. 12B is a line A- of FIG.
A'is a sectional view, and (c) is a sectional view taken along the line BB 'in (a).

【符号の説明】[Explanation of symbols]

11…配線基板、12…絶縁基材、13a,13b…電
極パターン、14…第1の開口部、15…CCD素子、
16a,16b…電極、17a,17b,51…第2の
開口部、18…光学ガラス、19…バンプ、20,20
a,20b…異方性導電膜、31…中空部、32…マイ
クロレンズ,61…連通部。
11 ... Wiring board, 12 ... Insulating base material, 13a, 13b ... Electrode pattern, 14 ... First opening, 15 ... CCD element,
16a, 16b ... Electrodes, 17a, 17b, 51 ... Second openings, 18 ... Optical glass, 19 ... Bumps, 20, 20
a, 20b ... Anisotropic conductive film, 31 ... Hollow part, 32 ... Microlens, 61 ... Communication part.

Claims (19)

【特許請求の範囲】[Claims] 【請求項1】 素子形成部と該素子形成部のパッケージ
の周辺に形成され前記素子形成部に電気的に接続した電
極からなる電子部品と、 絶縁性部材と、 前記電子部品の素子形成部に対向する位置に第1の開口
部を、前記電子部品の電極に対向する位置に第2の開口
部とを形成した絶縁基材上に電極パターンを固着し、前
記絶縁性部材に接着した配線基板と、 前記電子部品の電極と前記配線基板の電極パターンとを
電気的に接続する接続手段とからなることを特徴とする
電子部品の接続装置。
1. An electronic component including an element forming portion and an electrode formed around a package of the element forming portion and electrically connected to the element forming portion, an insulating member, and an element forming portion of the electronic component. A wiring board in which an electrode pattern is fixed on an insulating base material in which a first opening portion is formed at a facing position and a second opening portion is formed at a position facing an electrode of the electronic component, and which is bonded to the insulating member. And a connecting means for electrically connecting the electrode of the electronic component and the electrode pattern of the wiring board.
【請求項2】 前記配線基板の第1の開口部は、前記電
子部品の素子形成部より大きく電子部品の外形より小さ
くしてなることを特徴とする請求項1記載の電子部品の
接続装置。
2. The connection device for an electronic component according to claim 1, wherein the first opening of the wiring board is larger than an element forming portion of the electronic component and smaller than an outer shape of the electronic component.
【請求項3】 前記配線基板と前記電子部品は、該配線
基板の電極パターンもしくは該電子部品の電極に形成さ
れた導電性突起を介して電気的に接続してなることを特
徴とする請求項1記載の電子部品の接続装置。
3. The wiring board and the electronic component are electrically connected to each other through an electrode pattern of the wiring board or a conductive protrusion formed on an electrode of the electronic component. 1. An electronic component connecting device according to 1.
【請求項4】 前記配線基板と電子部品は、異方性導電
膜で接続してなることを特徴とする請求項1記載の電子
部品の接続装置。
4. The electronic component connecting device according to claim 1, wherein the wiring board and the electronic component are connected by an anisotropic conductive film.
【請求項5】 前記異方性導電膜は、電子部品の素子形
成面を環状に取囲むように形成してなることを特徴とす
る請求項4記載の電子部品の接続装置。
5. The electronic component connecting device according to claim 4, wherein the anisotropic conductive film is formed so as to surround the element formation surface of the electronic component in a ring shape.
【請求項6】 前記配線基板と前記異方性導電膜のいず
れか一方は、一部に開放部を設けてなることを特徴とす
る請求項5記載の電子部品の接続装置。
6. The electronic component connecting device according to claim 5, wherein one of the wiring board and the anisotropic conductive film is provided with an opening portion.
【請求項7】 前記配線基板は、可撓性を有する基板で
あることを特徴とする請求項1記載の電子部品の接続装
置。
7. The electronic component connecting device according to claim 1, wherein the wiring substrate is a flexible substrate.
【請求項8】 前記配線基板は、複数の電子部品を実装
してなることを特徴とする請求項1記載の電子部品の接
続装置。
8. The electronic component connecting device according to claim 1, wherein the wiring board is formed by mounting a plurality of electronic components.
【請求項9】 前記配線基板は、折り曲げ部を有し、折
り曲げ部の絶縁性基材を除去してなることを特徴とする
請求項1記載の電子部品の接続装置。
9. The electronic component connecting device according to claim 1, wherein the wiring board has a bent portion, and the insulating base material of the bent portion is removed.
【請求項10】 前記配線基板と電子部品は、導電性接
着剤で接続することを特徴とする請求項1記載の電子部
品の接続装置。
10. The connection device for an electronic component according to claim 1, wherein the wiring board and the electronic component are connected by a conductive adhesive.
【請求項11】 前記配線基板と電子部品は、電子部品
の電極上に形成された導電性突起を用いて機械的接触に
より接続することを特徴とする請求項1記載の電子部品
の接続装置。
11. The electronic component connecting device according to claim 1, wherein the wiring board and the electronic component are connected by mechanical contact using a conductive protrusion formed on an electrode of the electronic component.
【請求項12】 前記電子部品は、光電変換素子である
ことを特徴とする請求項1記載の電子部品の接続装置。
12. The electronic component connecting device according to claim 1, wherein the electronic component is a photoelectric conversion element.
【請求項13】 前記電子部品の電極の外側には、補強
樹脂が形成されていることを特徴とする請求項4,1
0,11のいずれかに記載の電子部品の接続装置。
13. The reinforcing resin is formed on the outer side of the electrode of the electronic component.
The electronic device connection device according to any one of 0 and 11.
【請求項14】 予め、電子部品の素子形成部に対向す
る位置に第1の開口部を前記電子部品の電極に対向する
位置に第2の開口部をそれぞれ絶縁基材に設けるととも
に、該絶縁基材に電極パターンを固着して配線基板を形
成してなる第1の工程と、 絶縁性部材に前記配線基板を接着する第2の工程と、 前記電子部品と前記配線基板を接続する第3の工程とか
らなることを特徴とする電子部品の製造方法。
14. An insulating base material is provided with a first opening at a position facing an element forming portion of an electronic component and a second opening at a position facing an electrode of the electronic component. A first step of forming a wiring board by fixing an electrode pattern to a base material, a second step of adhering the wiring board to an insulating member, and a third step of connecting the electronic component and the wiring board A method of manufacturing an electronic component, comprising:
【請求項15】 前記第3の工程の前に、電子部品の電
極パッドあるいは前記配線基板の電極パターンのいずれ
か一方に、導電性突起を形成する工程を付加してなるこ
とを特徴とする請求項14記載の電子部品の製造方法。
15. The method according to claim 15, further comprising a step of forming a conductive protrusion on either the electrode pad of the electronic component or the electrode pattern of the wiring board before the third step. Item 15. A method of manufacturing an electronic component according to Item 14.
【請求項16】 前記導電性突起は、すくなくとも前記
第3の前工程として、前記配線基板の第2の開口部より
小さく、前記配線基板の基材厚みより高く形成してなる
ことを特徴とする請求項15記載の電子部品の製造方
法。
16. The conductive projection is formed at least as a third pre-step, being smaller than a second opening of the wiring board and higher than a base material thickness of the wiring board. The method for manufacturing an electronic component according to claim 15.
【請求項17】 前記第2の工程の後に、電子部品の電
極パッドあるいは前記配線基板の電極パターンのいずれ
か一方に、異方性導電膜を形成する工程を付加してなる
ことを特徴とする請求項14記載の電子部品の製造方
法。
17. A step of forming an anisotropic conductive film on one of an electrode pad of an electronic component or an electrode pattern of the wiring board is added after the second step. The method for manufacturing an electronic component according to claim 14.
【請求項18】 前記異方性導電膜はペースト状であ
り、すくなくとも配線基板の電極パターン上に塗布する
工程を付加してなることを特徴とする請求項17記載の
電子部品の製造方法。
18. The method of manufacturing an electronic component according to claim 17, wherein the anisotropic conductive film is in the form of a paste, and a step of applying it on the electrode pattern of the wiring board is added at least.
【請求項19】 前記第3の工程の後に、前記電子部品
の電極の外側に補強樹脂を形成する第4の工程を具備す
ることを特徴とする請求項14記載の電子部品の製造方
法。
19. The method of manufacturing an electronic component according to claim 14, further comprising a fourth step of forming a reinforcing resin on the outer side of the electrode of the electronic component after the third step.
JP7155865A 1995-06-22 1995-06-22 Electronic component connecting device and manufacture thereof Withdrawn JPH098440A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7155865A JPH098440A (en) 1995-06-22 1995-06-22 Electronic component connecting device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7155865A JPH098440A (en) 1995-06-22 1995-06-22 Electronic component connecting device and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH098440A true JPH098440A (en) 1997-01-10

Family

ID=15615201

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7155865A Withdrawn JPH098440A (en) 1995-06-22 1995-06-22 Electronic component connecting device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH098440A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6367694B1 (en) 1996-09-05 2002-04-09 Symbol Technologies, Inc. Device and method for secure data updates in a self-checkout system
JP2002124654A (en) * 2000-10-13 2002-04-26 Mitsubishi Electric Corp Solid-state image-pickup device
KR20030091105A (en) * 2002-05-22 2003-12-03 삼성전기주식회사 Image sensor module
KR100770684B1 (en) * 2006-05-18 2007-10-29 삼성전기주식회사 Camera module package
JP2009105459A (en) * 2009-02-12 2009-05-14 Seiko Epson Corp Optical device, optical module, and electronic apparatus

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6367694B1 (en) 1996-09-05 2002-04-09 Symbol Technologies, Inc. Device and method for secure data updates in a self-checkout system
JP2002124654A (en) * 2000-10-13 2002-04-26 Mitsubishi Electric Corp Solid-state image-pickup device
KR20030091105A (en) * 2002-05-22 2003-12-03 삼성전기주식회사 Image sensor module
KR100770684B1 (en) * 2006-05-18 2007-10-29 삼성전기주식회사 Camera module package
US7679669B2 (en) 2006-05-18 2010-03-16 Samsung Electro-Mechanics Co., Ltd. Camera module package
JP2009105459A (en) * 2009-02-12 2009-05-14 Seiko Epson Corp Optical device, optical module, and electronic apparatus

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