JPH0969592A - Printed wiring board and its packaging method - Google Patents
Printed wiring board and its packaging methodInfo
- Publication number
- JPH0969592A JPH0969592A JP22238895A JP22238895A JPH0969592A JP H0969592 A JPH0969592 A JP H0969592A JP 22238895 A JP22238895 A JP 22238895A JP 22238895 A JP22238895 A JP 22238895A JP H0969592 A JPH0969592 A JP H0969592A
- Authority
- JP
- Japan
- Prior art keywords
- heat dissipation
- printed wiring
- wiring board
- heat
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明はプリント配線基板及
びその実装方法に関し、特に放熱構造とその組立方法に
関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board and its mounting method, and more particularly to a heat dissipation structure and its assembling method.
【０００２】[0002]
【従来の技術】従来の半導体装置のプリント配線基板の
断面図を示す図５を参照すると、このプリント配線基板
２０は、絶縁性樹脂基体の主表面に、所定の配線導体が
形成され、その一部は露出させてランド１０となし、半
導体装置２１の外部リード３に対向した位置に、このラ
ンド１０を配置している。2. Description of the Related Art Referring to FIG. 5 showing a cross-sectional view of a conventional printed wiring board of a semiconductor device, this printed wiring board 20 has a predetermined wiring conductor formed on the main surface of an insulating resin substrate. The part is exposed to form a land 10, and the land 10 is arranged at a position facing the external lead 3 of the semiconductor device 21.
【０００３】この半導体装置２１は、この装置２１の取
り付け側の基板２０の一主表面に半田付けされるいわゆ
る表面実装型のパッケージ構造をなし、この種のパッケ
ージとして、ＱＦＰ（Ｑｕａｄ Ｆｌａｔ Ｐｃｋａｇ
ｅ）やＳＯＰ（ＳｍａｌｌＩｎｌｉｎｅ Ｐａｃｋａｇ
ｅ）等がある。The semiconductor device 21 has a so-called surface mount type package structure which is soldered to one main surface of the substrate 20 on the mounting side of the device 21, and a QFP (Quad Flat Pckag) is used as a package of this type.
e) and SOP (SmallInlinePackag)
e) etc.
【０００４】外部リード３は、モールド樹脂１９の両側
方に各々導出されており、一対のリード３のみ図示され
ているが、実際には紙面と垂直方向に数十本配列され、
中には百本を越えるものもある。The external leads 3 are respectively led out to both sides of the molding resin 19, and although only a pair of leads 3 are shown in the drawing, in practice, dozens of them are arranged in the direction perpendicular to the paper surface,
Some of them exceed 100.
【０００５】単数又は複数の半導体チップ１の裏面に
は、このチップ１で発生する熱を放散させるための放熱
板２が固着される。チップ１の主表面のパッドと外部リ
ード３の内端とは、ボンディング・ワイヤ７で接続され
る。A heat radiating plate 2 for dissipating heat generated in the chip 1 is fixed to the back surface of the single or plural semiconductor chips 1. The pads on the main surface of the chip 1 and the inner ends of the external leads 3 are connected by bonding wires 7.
【０００６】外部リード３の内端は、放熱板２の主表面
上に、絶縁層を介して、固定されている。The inner ends of the outer leads 3 are fixed on the main surface of the heat dissipation plate 2 via an insulating layer.
【０００７】モールド樹脂１９は、放熱板２の裏面及び
外部リード３を露出させた状態で、この装置２１の表面
を覆っている。The mold resin 19 covers the surface of the device 21 with the back surface of the heat sink 2 and the external leads 3 exposed.
【０００８】この半導体装置２１は、３Ｗ乃至５Ｗ程度
の比較的大きな消費電力を持っている。従って、放熱構
造には特に配慮する必要があり、熱伝導性の良好な金属
性の放熱板２を備えている。The semiconductor device 21 has a relatively large power consumption of about 3 W to 5 W. Therefore, it is necessary to pay particular attention to the heat dissipation structure, and the metal heat dissipation plate 2 having good heat conductivity is provided.
【０００９】しかしながら、放熱板２とプリント配線基
板２０との間が離間しており、この部分の空気層の自然
換気による放熱効果は極めて小さなもので、この放熱板
２からのさらなる放熱手段がない。半導体装置自体で、
放熱効果を高めるには限界がある。However, since the heat radiating plate 2 and the printed wiring board 20 are separated from each other, the heat radiating effect by natural ventilation of the air layer in this portion is extremely small, and there is no further heat radiating means from the heat radiating plate 2. . In the semiconductor device itself,
There is a limit to enhancing the heat dissipation effect.
【００１０】ちなみに、パッケージ構造は異なるが、半
導体装置自体で通電時の放熱効果を高めた特開平２−２
９１１５６号公報に記載された図６の断面図を参照する
と、この半導体装置３０は、ＩＣチップ２５の裏面に熱
伝導体２６が固着され、この熱伝導体２６には中央部に
ネジ孔２９が形成され、一方ヒートシンク２７にもネジ
孔２９が形成され、留めネジ２８を使用して、複数のヒ
ートシンク２７を熱伝導体６に固定している。By the way, although the package structure is different, the semiconductor device itself has improved the heat dissipation effect when energized.
Referring to the sectional view of FIG. 6 described in Japanese Patent Publication No. 91156, a semiconductor device 30 has a heat conductor 26 fixed to the back surface of an IC chip 25, and the heat conductor 26 has a screw hole 29 at the center. On the other hand, screw holes 29 are also formed in the heat sink 27, and the plurality of heat sinks 27 are fixed to the heat conductor 6 using the set screws 28.
【００１１】しかしながら、このような構造では、半導
体装置３０の厚み寸法が大となり、既製の筐体に収納で
きなくなる心配があるだけでなく、機械的な振動が加わ
ると、熱伝導体２６と絶縁基板３１との境界面に、亀裂
等が入る心配がある。従って、ヒートシンク２７を多数
取り付けて、熱抵抗を低めようとしても、自らその限界
がある。However, in such a structure, the thickness of the semiconductor device 30 becomes large, and there is a concern that the semiconductor device 30 may not be housed in a ready-made housing. In addition, when mechanical vibration is applied, it is insulated from the heat conductor 26. There is a concern that cracks or the like may occur at the boundary surface with the substrate 31. Therefore, even if a large number of heat sinks 27 are attached to reduce the thermal resistance, there is a limit in itself.
【００１２】このように、半導体装置自体により、放熱
効果を実質的に高めようとしても限界があり、半導体チ
ップ内のジャンクション部分の発熱を効果的に放散でき
ないという欠点がある。As described above, the semiconductor device itself has a limit even if it is attempted to substantially enhance the heat dissipation effect, and there is a drawback that the heat generation at the junction portion in the semiconductor chip cannot be effectively dissipated.
【００１３】[0013]
【発明が解決しようとする課題】以上のような諸問題点
に鑑み、本発明では、次の課題を掲げる。 （１）実装される半導体装置の放熱板の熱抵抗を低く抑
えるようにすること。 （２）プリント配線基板の実質寸法を大きくしないよう
にすること。 （３）実装される半導体装置の発熱を低く抑えて、半導
体装置の動作上の信頼を高めること。In view of the above problems, the present invention has the following problems. (1) Keeping the thermal resistance of the heat sink of the mounted semiconductor device low. (2) Do not increase the actual size of the printed wiring board. (3) To suppress the heat generation of the mounted semiconductor device to a low level and improve the operational reliability of the semiconductor device.
【００１４】[0014]
【課題を解決するための手段】本発明の解決手段は、放
熱板を備えた半導体装置が実施されるプリント配線基板
において、所定形状の放熱層を備えることと、前記放熱
板から前記放熱層まで熱を伝導する放熱ボスを備えるこ
とを特徴とする。According to the present invention, a printed wiring board in which a semiconductor device having a heat dissipation plate is implemented includes a heat dissipation layer having a predetermined shape, and the heat dissipation plate to the heat dissipation layer are provided. It is characterized by including a heat dissipation boss that conducts heat.
【００１５】特に、前記放熱層は、多数の溝を一主表面
に有し、プリント配線の一主表面から露出していること
を特徴とする。In particular, the heat dissipation layer has a large number of grooves on one main surface and is exposed from one main surface of the printed wiring.
【００１６】また特に、前記放熱層は、プリント配線基
板の一主表面を形成していることを特徴とする。Further, in particular, the heat dissipation layer forms one main surface of the printed wiring board.
【００１７】さらに、特に前記放熱ボスは、前記放熱層
と一体に形成されているか、または熱伝導性の良好な接
着剤を介して前記放熱層に接着されていることも特徴と
する。Further, in particular, the heat dissipation boss is formed integrally with the heat dissipation layer, or is adhered to the heat dissipation layer via an adhesive having good thermal conductivity.
【００１８】上述した本発明のプリント配線基板の実装
方法において、前記半導体装置を前記プリント配線基板
に実装後に、前記放熱ボスを前記放熱板と前記プリント
配線基板との隙間に介装することを特徴とする。In the method for mounting a printed wiring board of the present invention described above, after mounting the semiconductor device on the printed wiring board, the heat radiation boss is interposed in a gap between the heat radiation plate and the printed wiring board. And
【００１９】特に、介装する際に、熱伝導性良好な接着
剤を用いることも特徴とする。In particular, it is also characterized in that an adhesive having a good thermal conductivity is used when interposing.
【００２０】本発明によれば、放熱ボスを介して、半導
体装置で発生した熱が、熱伝導により効率よく、放熱層
に達するため、冷却能力が大きくなり、半導体チップ内
のジャンクション温度を低く抑えることができる。According to the present invention, the heat generated in the semiconductor device via the heat dissipation boss reaches the heat dissipation layer efficiently by heat conduction, so that the cooling capacity is increased and the junction temperature in the semiconductor chip is kept low. be able to.
【００２１】[0021]
【発明の実施の形態】本発明の第１の実施の形態を示す
図１の断面図を参照すると、半導体装置２１が実装され
たプリント配線基板４が示されているが、実装される半
導体装置２１は図５に示した従来技術と共通するので、
このように共通した部分は以下共通に算用数字で示すに
留める。DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to the sectional view of FIG. 1 showing a first embodiment of the present invention, a printed wiring board 4 on which a semiconductor device 21 is mounted is shown. 21 is common with the prior art shown in FIG.
Such common parts will be limited to those shown below by using arithmetic numerals.
【００２２】プリント配線基板４は、熱伝導性の良好な
所定厚の放熱層６の両主表面に、絶縁層８と、ランド１
０や配線導体層が形成された絶縁層９とが固着されてい
る。放熱板２と対向した位置には、絶縁層９を貫通する
放熱層６′が形成され、さらにこの放熱層６′と放熱板
２との隙間に嵌入させる放熱ボス５がある。放熱ボス５
は、熱伝導性の良好な接着剤で固定されることが好まし
い。放熱層６の厚さ寸法は、０．５ｍｍ乃至２．０ｍｍ
程度が好ましい。The printed wiring board 4 has an insulating layer 8 and a land 1 on both main surfaces of a heat-dissipating layer 6 of a predetermined thickness having good thermal conductivity.
0 and the insulating layer 9 on which the wiring conductor layer is formed are fixed. At a position facing the heat dissipation plate 2, a heat dissipation layer 6 ′ penetrating the insulating layer 9 is formed, and there is a heat dissipation boss 5 to be fitted in a gap between the heat dissipation layer 6 ′ and the heat dissipation plate 2. Heat dissipation boss 5
Is preferably fixed with an adhesive having good thermal conductivity. The thickness of the heat dissipation layer 6 is 0.5 mm to 2.0 mm
The degree is preferred.
【００２３】上記隙間には、寸法上のばらつきがあるた
め、０．１ｍｍ程度乃至０．０５ｍｍ程度の寸法差のあ
る多数の放熱ボス５を用意し、この中から適宜選択して
使用する。Since there are dimensional variations in the above-mentioned gap, a large number of heat dissipation bosses 5 having a dimensional difference of about 0.1 mm to 0.05 mm are prepared and appropriately selected and used.
【００２４】放熱ボス５下の放熱層６′は、放熱層６よ
りも厚くなっているが、放熱層６，６′が一体構造とな
っていなくともよく、放熱層６の一様な厚さのものと、
放熱ボス５とこの放熱層６との間に充填する熱伝導性良
好な接着剤とで、形成されていてもよい。The heat dissipation layer 6'under the heat dissipation boss 5 is thicker than the heat dissipation layer 6, but the heat dissipation layers 6 and 6'may not have an integral structure, and the heat dissipation layer 6 may have a uniform thickness. Of the
It may be formed of an adhesive having good thermal conductivity filled between the heat dissipation boss 5 and the heat dissipation layer 6.
【００２５】この実施の形態によれば、半導体チップ１
の発熱は、放熱板２から、放熱ボス５を経て、放熱板
６′，放熱板６まで達するため、冷却効果は極めて高い
ものとなるばかりでなく、デッドスペースとなってい
る。放熱板２下の隙間に放熱ボス５を設けているため、
実装構造上の寸法が大きくなることがなく、従来の筐体
がそのまま使用できるという利点がある。また、放熱ボ
ス５が、放熱板２をプリント配線基板４に固着している
から、実装後の機械的振動に対してより強い構造となっ
ている。According to this embodiment, the semiconductor chip 1
The heat generated from the heat radiation reaches the heat radiation plate 6'and the heat radiation plate 6 from the heat radiation plate 2 through the heat radiation boss 5, so that not only the cooling effect becomes extremely high but also a dead space. Since the heat dissipation boss 5 is provided in the gap below the heat dissipation plate 2,
There is an advantage that the conventional housing can be used as it is without increasing the size of the mounting structure. Further, since the heat dissipation boss 5 fixes the heat dissipation plate 2 to the printed wiring board 4, it has a stronger structure against mechanical vibration after mounting.
【００２６】本発明の第２の実施の形態を示す図２の断
面図を参照すると、この実施の形態のプリント配線基板
１３は、放熱ボス１２の平面寸法が放熱板２の平面寸法
とで共通している点が、図１と相違しており、その他の
構造は第１の実施の形態と共通するため、説明を省く。Referring to the sectional view of FIG. 2 showing the second embodiment of the present invention, in the printed wiring board 13 of this embodiment, the plane dimension of the heat radiating boss 12 is the same as the plane dimension of the heat radiating plate 2. The difference is that it is different from FIG. 1 and the other structure is common to the first embodiment, and therefore the description is omitted.
【００２７】この実施の形態によれば、放熱ボス１２の
熱抵抗が小さくなっており、その他の効果は図１の場合
と共通する。尚、放熱層６と放熱ボス１２とは、熱伝導
性の良好な接着剤からなる接続体１１で固着されてい
る。According to this embodiment, the heat resistance of the heat radiating boss 12 is small, and other effects are the same as those in the case of FIG. The heat dissipation layer 6 and the heat dissipation boss 12 are fixed to each other with a connector 11 made of an adhesive having good thermal conductivity.
【００２８】本発明の第３の実施の形態を示す図３の断
面図を参照すると、このプリント配線板１５は、下面に
所定間隔で溝が形成された放熱層１４と、第１の実施の
形態と共通する絶縁層９、放熱ボス５とを備える。Referring to the cross-sectional view of FIG. 3 showing the third embodiment of the present invention, this printed wiring board 15 has a heat dissipation layer 14 having grooves formed at predetermined intervals on its lower surface, and a first embodiment. The insulating layer 9 and the heat dissipation boss 5 having the same shape are provided.
【００２９】本発明の第４の実施の形態を示す図４の断
面図を参照すると、このプリント配線基板１７は、一様
な厚さの放熱層１６と、半導体装置２１の放熱板２に対
向した位置に設けた放熱ボス１８と、上面にランド１０
等が形成された絶縁層９とを備える。放熱ボス１８は、
放熱層１６と一体で形成されていてもよいが、互いに別
々に造られ、半田付け又は熱伝導性の良好な接着剤付け
で接続されていてもよい。絶縁層９は、放熱ボス１８の
位置をさけるように、寸法的余裕を持ってあらかじめ開
口しており、放熱層１６の上面に接着剤で固着される。
その他の構成等は図１の場合と共通する。Referring to the sectional view of FIG. 4 showing the fourth embodiment of the present invention, this printed wiring board 17 faces the heat dissipation layer 16 having a uniform thickness and the heat dissipation plate 2 of the semiconductor device 21. The heat dissipation boss 18 provided at the above position and the land 10 on the upper surface.
And the like. The heat dissipation boss 18 is
Although it may be formed integrally with the heat dissipation layer 16, they may be formed separately from each other and may be connected by soldering or bonding with an adhesive having good thermal conductivity. The insulating layer 9 is opened beforehand with a dimensional margin so as to avoid the position of the heat dissipation boss 18, and is fixed to the upper surface of the heat dissipation layer 16 with an adhesive.
Other configurations and the like are common to the case of FIG.
【００３０】第１乃至第４の実施の形態において、放熱
層６，１４，１６や放熱ボス５，１２，１８等は、銅の
金属材料に金メッキが施されているものが好ましい。ま
た、いずれの実施の形態も自然冷却によって放熱する
が、放熱効果をより高めたい場合には、ファン等による
強制冷却手段を備えてもよく、特に第３，第４の実施の
形態では放熱層１４，１６の主表面に、主に送風するこ
とが好ましい。In the first to fourth embodiments, the heat dissipation layers 6, 14, 16 and the heat dissipation bosses 5, 12, 18 and the like are preferably made of a copper metal material plated with gold. Although heat is radiated by natural cooling in any of the embodiments, a forced cooling means such as a fan may be provided if it is desired to enhance the heat dissipation effect. In particular, in the third and fourth embodiments, the heat dissipation layer is used. It is preferable to mainly blow air to the main surfaces of 14 and 16.
【００３１】放熱板２とプリント配線基板との間の絶縁
性を確保したい場合には、第１の実施の形態では、放熱
層６′に、電気的絶縁性の良好な高熱伝導率の接着剤を
使用する。図２では接続体１１に、図３では放熱層６′
に、図４では放熱ボス１８に、各々同接着剤を用いる。In order to secure the insulation between the heat sink 2 and the printed wiring board, in the first embodiment, the heat dissipation layer 6'has an adhesive of high thermal conductivity having good electrical insulation. To use. In FIG. 2, the connection body 11 is used, and in FIG. 3, the heat dissipation layer 6 ′ is used.
Further, in FIG. 4, the same adhesive is used for the heat dissipation bosses 18, respectively.
【００３２】[0032]
【発明の効果】以上説明した通り、本発明によれば、実
施される半導体装置から発生する熱を、プリント配線基
板自体に効率良く導入することができるため、発熱源と
なるジャンクション温度の上昇を低く抑えることがで
き、このため、回路動作上の信頼性が向上するだけでな
く、従来よりも消費電力の大きい半導体装置が実装でき
るという効果が得られ、上述した各課題がことごとく達
成された。As described above, according to the present invention, the heat generated from the semiconductor device to be implemented can be efficiently introduced into the printed wiring board itself, so that the junction temperature which is a heat source is increased. Therefore, not only the reliability in circuit operation is improved, but also the semiconductor device having higher power consumption than the conventional one can be mounted. Therefore, each of the above-mentioned problems is achieved.
【図１】本発明の第１の実施の形態を示す断面図であ
る。FIG. 1 is a cross-sectional view showing a first embodiment of the present invention.
【図２】本発明の第２の実施の形態を示す断面図であ
る。FIG. 2 is a sectional view showing a second embodiment of the present invention.
【図３】本発明の第３の実施の形態を示す断面図であ
る。FIG. 3 is a sectional view showing a third embodiment of the present invention.
【図４】本発明の第４の実施の形態を示す断面図であ
る。FIG. 4 is a sectional view showing a fourth embodiment of the present invention.
【図５】従来の実装されたプリント配線基板の一例を示
す断面図である。FIG. 5 is a cross-sectional view showing an example of a conventional mounted printed wiring board.
【図６】従来の半導体装置を示す断面図である。FIG. 6 is a sectional view showing a conventional semiconductor device.
１ 半導体チップ ２ 放熱板 ３ リード ４，１３，１５，１７，２０ プリント配線基板 ５，１２，１８ 放熱ボス ６，６′，１４，１６ 放熱層 ７ ボンディングワイヤ ８，９ 絶縁層 １０ ランド １１ 接続体 １９ モールド樹脂 ２１，３０ 半導体装置 ２６ 熱伝導体 ２７ ヒートシンク ２８ 止めネジ ２９ ネジ孔 ３１ 絶縁基板 1 Semiconductor Chip 2 Heat Sink 3 Lead 4, 13, 15, 17, 20 Printed Wiring Board 5, 12, 18 Heat Sink Boss 6, 6 ', 14, 16 Heat Sink 7 Bonding Wire 8, 9 Insulation Layer 10 Land 11 Connection 19 Mold Resin 21, 30 Semiconductor Device 26 Thermal Conductor 27 Heat Sink 28 Set Screw 29 Screw Hole 31 Insulating Substrate
Claims (6)
プリント配線基板において、所定形状の放熱層を備える
ことと、前記放熱板から前記放熱層まで熱を伝導する放
熱ボスを備えることを特徴とするプリント配線基板。1. A printed wiring board on which a semiconductor device having a heat dissipation plate is mounted, comprising: a heat dissipation layer having a predetermined shape; and a heat dissipation boss that conducts heat from the heat dissipation plate to the heat dissipation layer. And a printed wiring board.
プリント配線基板の一主表面から露出している請求項１
記載のプリント配線基板。2. The heat dissipation layer has a large number of grooves on one surface,
The printed wiring board is exposed from one main surface of the printed wiring board.
The printed wiring board as described.
表面を形成している請求項１記載のプリント配線基板。3. The printed wiring board according to claim 1, wherein the heat dissipation layer forms one main surface of the printed wiring board.
成されているか、または熱伝導性の良好な接着剤を介し
て前記放熱層に接着されている請求項１記載のプリント
配線基板。4. The printed wiring board according to claim 1, wherein the heat dissipation boss is formed integrally with the heat dissipation layer, or is adhered to the heat dissipation layer via an adhesive having good thermal conductivity.
方法において、前記半導体装置を前記プリント配線基板
に実装後に、前記放熱ボスを前記放熱板と前記プリント
配線基板との隙間に介装することを特徴とするプリント
配線基板の実装方法。5. The printed wiring board mounting method according to claim 1, wherein after mounting the semiconductor device on the printed wiring board, the heat radiation boss is interposed in a gap between the heat radiation plate and the printed wiring board. And a method for mounting a printed wiring board.
用いる請求項５記載のプリント配線基板の実装方法。6. The method for mounting a printed wiring board according to claim 5, wherein an adhesive having a good thermal conductivity is used when interposing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22238895A JP2919313B2 (en) | 1995-08-30 | 1995-08-30 | Printed wiring board and its mounting method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22238895A JP2919313B2 (en) | 1995-08-30 | 1995-08-30 | Printed wiring board and its mounting method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0969592A true JPH0969592A (en) | 1997-03-11 |
| JP2919313B2 JP2919313B2 (en) | 1999-07-12 |
Family
ID=16781587
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22238895A Expired - Fee Related JP2919313B2 (en) | 1995-08-30 | 1995-08-30 | Printed wiring board and its mounting method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2919313B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006339588A (en) * | 2005-06-06 | 2006-12-14 | Nitto Denko Corp | Wiring circuit substrate |
| JP2007073654A (en) * | 2005-09-06 | 2007-03-22 | U-Ai Electronics Corp | Printed wiring board |
-
1995
- 1995-08-30 JP JP22238895A patent/JP2919313B2/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006339588A (en) * | 2005-06-06 | 2006-12-14 | Nitto Denko Corp | Wiring circuit substrate |
| JP2007073654A (en) * | 2005-09-06 | 2007-03-22 | U-Ai Electronics Corp | Printed wiring board |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2919313B2 (en) | 1999-07-12 |
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