JP2919313B2 - Printed wiring board and its mounting method - Google Patents
Printed wiring board and its mounting methodInfo
- Publication number
- JP2919313B2 JP2919313B2 JP22238895A JP22238895A JP2919313B2 JP 2919313 B2 JP2919313 B2 JP 2919313B2 JP 22238895 A JP22238895 A JP 22238895A JP 22238895 A JP22238895 A JP 22238895A JP 2919313 B2 JP2919313 B2 JP 2919313B2
- Authority
- JP
- Japan
- Prior art keywords
- heat
- wiring board
- printed wiring
- circuit board
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
Description
【０００１】[0001]
【発明の属する技術分野】本発明はプリント配線基板及
びその実装方法に関し、特に放熱構造とその組立方法に
関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board and a method for mounting the same, and more particularly, to a heat dissipation structure and a method for assembling the same.
【０００２】[0002]
【従来の技術】従来の半導体装置を実装したプリント配
線基板の断面図を示す図５を参照すると、このプリント
配線基板２０は、絶縁性樹脂基体の主表面に、所定の配
線導体が形成され、その一部は露出させてランド１０と
なし、半導体装置２１の外部リード３に対向した位置
に、このランド１０を配置している。2. Description of the Related Art Referring to FIG. 5, which shows a cross-sectional view of a printed wiring board on which a conventional semiconductor device is mounted, a printed wiring board 20 has a predetermined wiring conductor formed on a main surface of an insulating resin substrate. A part thereof is exposed to form a land 10, and the land 10 is arranged at a position facing the external lead 3 of the semiconductor device 21.
【０００３】この半導体装置２１は、この装置２１の取
り付け側の基板２０の一主表面に半田付けされるいわゆ
る表面実装型のパッケージ構造をなし、この種のパッケ
ージとして、ＱＦＰ（Ｑｕａｄ Ｆｌａｔ Ｐｃｋａｇ
ｅ）やＳＯＰ（ＳｍａｌｌＩｎｌｉｎｅ Ｐａｃｋａｇ
ｅ）等がある。The semiconductor device 21 has a so-called surface mount type package structure which is soldered to one main surface of the substrate 20 on the mounting side of the device 21. As this kind of package, a QFP (Quad Flat Pcag) is used.
e) and SOP (SmallInline Package)
e) and the like.
【０００４】外部リード３は、モールド樹脂１９の両側
方に各々導出されており、一対のリード３のみ図示され
ているが、実際には紙面と垂直方向に数十本配列され、
中には百本を越えるものもある。The external leads 3 are respectively led out to both sides of the mold resin 19, and only a pair of leads 3 are shown. However, in practice, several tens of leads are arranged in a direction perpendicular to the paper surface.
Some are more than a hundred.
【０００５】単数又は複数の半導体チップ１の裏面に
は、このチップ１で発生する熱を放散させるための放熱
板２が固着される。チップ１の主表面のパッドと外部リ
ード３の内端とは、ボンディング・ワイヤ７で接続され
る。A heat radiating plate 2 for dissipating heat generated by the chip 1 is fixed to the back surface of one or more semiconductor chips 1. The pads on the main surface of the chip 1 and the inner ends of the external leads 3 are connected by bonding wires 7.
【０００６】外部リード３の内端は、放熱板２の主表面
上に、絶縁層を介して、固定されている。The inner ends of the external leads 3 are fixed on the main surface of the heat sink 2 via an insulating layer.
【０００７】モールド樹脂１９は、放熱板２の裏面及び
外部リード３を露出させた状態で、この装置２１の表面
を覆っている。[0007] The mold resin 19 covers the surface of the device 21 with the back surface of the heat sink 2 and the external leads 3 exposed.
【０００８】この半導体装置２１は、３Ｗ乃至５Ｗ程度
の比較的大きな消費電力を持っている。従って、放熱構
造には特に配慮する必要があり、熱伝導性の良好な金属
性の放熱板２を備えている。The semiconductor device 21 has a relatively large power consumption of about 3 W to 5 W. Therefore, special consideration must be given to the heat dissipation structure, and the heat dissipation structure is provided with the metallic heat dissipation plate 2 having good thermal conductivity.
【０００９】しかしながら、放熱板２とプリント配線基
板２０との間が離間しており、この部分の空気層の自然
換気による放熱効果は極めて小さなもので、この放熱板
２からのさらなる放熱手段がない。半導体装置自体で、
放熱効果を高めるには限界がある。However, the heat radiating plate 2 and the printed wiring board 20 are spaced apart from each other, and the effect of natural ventilation of the air layer in this portion is extremely small, and there is no means for further radiating heat from the heat radiating plate 2. . In the semiconductor device itself,
There is a limit to improving the heat dissipation effect.
【００１０】ちなみに、パッケージ構造は異なるが、半
導体装置自体で通電時の放熱効果を高めた特開平２−２
９１１５６号公報に記載された図６の断面図を参照する
と、この半導体装置３０は、ＩＣチップ２５の裏面に熱
伝導体２６が固着され、この熱伝導体２６には中央部に
ネジ孔２９が形成され、一方ヒートシンク２７にもネジ
孔２９が形成され、留めネジ２８を使用して、複数のヒ
ートシンク２７を熱伝導体６に固定している。[0010] Incidentally, although the package structure is different, the semiconductor device itself has an improved heat radiation effect when energized.
Referring to the cross-sectional view of FIG. 6 described in Japanese Patent No. 91156, in this semiconductor device 30, a heat conductor 26 is fixed to the back surface of an IC chip 25, and a screw hole 29 is formed in the center of the heat conductor 26. On the other hand, a screw hole 29 is also formed in the heat sink 27, and a plurality of heat sinks 27 are fixed to the thermal conductor 6 using a fastening screw 28.
【００１１】しかしながら、このような構造では、半導
体装置３０の厚み寸法が大となり、既製の筐体に収納で
きなくなる心配があるだけでなく、機械的な振動が加わ
ると、熱伝導体２６と絶縁基板３１との境界面に、亀裂
等が入る心配がある。従って、ヒートシンク２７を多数
取り付けて、熱抵抗を低めようとしても、自らその限界
がある。However, in such a structure, the thickness of the semiconductor device 30 becomes large, so that the semiconductor device 30 cannot be housed in a ready-made housing. There is a concern that a crack or the like may enter the boundary surface with the substrate 31. Therefore, even if a large number of heat sinks 27 are mounted to lower the thermal resistance, there is a limit.
【００１２】このように、半導体装置自体により、放熱
効果を実質的に高めようとしても限界があり、半導体チ
ップ内のジャンクション部分の発熱を効果的に放散でき
ないという欠点がある。As described above, the semiconductor device itself has a limit in substantially increasing the heat radiation effect, and has a disadvantage that heat generated at the junction in the semiconductor chip cannot be effectively dissipated.
【００１３】[0013]
【発明が解決しようとする課題】以上のような諸問題点
に鑑み、本発明では、次の課題を掲げる。 （１）実装される半導体装置の放熱板の熱抵抗を低く抑
えるようにすること。 （２）プリント配線基板の実質寸法を大きくしないよう
にすること。 （３）実装される半導体装置の発熱によるジャンクショ
ン部分の温度上昇を低く抑えて、半導体装置の動作上の
信頼を高めること。In view of the above problems, the present invention has the following problems. (1) The thermal resistance of the heat sink of the semiconductor device to be mounted should be kept low. (2) Do not increase the substantial dimensions of the printed wiring board. (3) Junction due to heat generation of the mounted semiconductor device
To increase the operational reliability of the semiconductor device by keeping the temperature rise of the semiconductor device low.
【００１４】[0014]
【課題を解決するための手段】本発明の解決手段は、半
導体装置が実装されたプリント配線基板において、少な
くとも、両主表面に絶縁層が固着された放熱層を備え、
前記半導体装置は少なくともパッケージ封止された半導
体チップと実装時にプリント配線基板と対向する下面に
露出した放熱板を備えると共に該下面は実装面から離間
して実装されており、且つ前記放熱板と前記放熱層との
間に両端が前記放熱板と前記放熱層とにそれぞれ当接し
ている放熱ボスを備えることを特徴とする。Means for Solving the Problems] solution of the present invention, in the printed wiring board semi <br/> conductor device is mounted, small
Kutomo, Bei give a heat dissipation layer in which an insulating layer is secured to both major surfaces,
The semiconductor device is at least a packaged semiconductor
On the lower surface facing the printed circuit board when mounting
Equipped with an exposed heat sink and the lower surface is separated from the mounting surface
And it is implemented by, and between the heat radiating plate and the heat dissipation layer
Both ends in contact with the radiator plate and the radiator layer respectively
It is characterized by having a heat radiating boss.
【００１５】あるいは、半導体装置が実装されたプリン
ト配線基板において、少なくとも、多数の溝を一面に有
しこの溝を有する面が露出している放熱層を備え、前記
半導体装置は少なくともパッケージ封止された半導体チ
ップと実装時にプリント配線基板と対向する下面に露出
した放熱板を備えると共に該下面は実装面から離間して
実装されており、且つ前記放熱板と前記放熱層との間に
両端が前記放熱板と前記放熱層とにそれぞれ当接してい
る放熱ボスを備えることを特徴とする。Alternatively, a printer on which a semiconductor device is mounted
In preparative wiring board, at least, e Bei the heat dissipation layer is the surface having the grooves has a plurality of grooves on one side are exposed, the
The semiconductor device is at least a packaged semiconductor chip.
Exposed on the lower surface facing the printed circuit board during mounting and mounting
And the lower surface is separated from the mounting surface
Are mounted, and between the heat radiating plate and the heat dissipation layer
Both ends are in contact with the heat sink and the heat dissipation layer, respectively.
A heat radiating boss.
【００１６】また特に、前記放熱層は、プリント配線基
板の一主表面を形成していることを特徴とする。In particular, the heat radiation layer forms one main surface of the printed wiring board.
【００１７】また、特に前記放熱ボスは、熱伝導性の良
好な接着剤を介して前記放熱層に接着されていることも
特徴とする。Further , the heat radiating boss is preferably bonded to the heat radiating layer via an adhesive having good thermal conductivity.
【００１８】上述した本発明のプリント配線基板の実装
方法において、前記半導体装置を前記プリント配線基板
に実装後に、前記放熱ボスを前記放熱板と前記プリント
配線基板の放熱層との隙間に介装することを特徴とす
る。In the above-described method of mounting a printed wiring board according to the present invention, after the semiconductor device is mounted on the printed wiring board, the heat radiating boss is interposed in a gap between the heat radiating plate and a heat radiating layer of the printed wiring board. It is characterized by the following.
【００１９】特に、介装する際に、熱伝導性良好な接着
剤を用いることも特徴とする。In particular, it is also characterized in that an adhesive having good thermal conductivity is used when interposing.
【００２０】本発明によれば、放熱ボスを介して、半導
体装置で発生した熱が、熱伝導により効率よく、放熱層
に達するため、冷却能力が大きくなり、半導体チップ内
のジャンクション温度を低く抑えることができる。According to the present invention, the heat generated in the semiconductor device via the heat radiating boss efficiently reaches the heat radiating layer by heat conduction, so that the cooling capacity is increased and the junction temperature in the semiconductor chip is kept low. be able to.
【００２１】[0021]
【発明の実施の形態】本発明の第１の実施の形態を示す
図１の断面図を参照すると、半導体装置２１が実装され
たプリント配線基板４が示されているが、実装される半
導体装置２１は図５に示した従来技術と共通するので、
このように共通した部分は以下共通に算用数字で示すに
留める。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to the cross-sectional view of FIG. 1 showing a first embodiment of the present invention, a printed wiring board 4 on which a semiconductor device 21 is mounted is shown. 21 is common to the prior art shown in FIG.
In this manner, the common parts will be indicated by common numbers hereinafter.
【００２２】プリント配線基板４は、熱伝導性の良好な
所定厚の放熱層６の両主表面に、絶縁層８と、ランド１
０や配線導体層が形成された絶縁層９とが固着されてい
る。放熱板２と対向した位置には、絶縁層９を貫通する
放熱層６′が形成され、さらにこの放熱層６′と放熱板
２との隙間に嵌入させる放熱ボス５がある。放熱ボス５
は、熱伝導性の良好な接着剤で固定されることが好まし
い。放熱層６の厚さ寸法は、０．５ｍｍ乃至２．０ｍｍ
程度が好ましい。The printed wiring board 4 includes an insulating layer 8 and a land 1 on both main surfaces of a heat radiation layer 6 having a good thermal conductivity and a predetermined thickness.
0 and the insulating layer 9 on which the wiring conductor layer is formed are fixed. At a position facing the heat radiating plate 2, a heat radiating layer 6 ′ penetrating the insulating layer 9 is formed, and further, there is a heat radiating boss 5 fitted into a gap between the heat radiating layer 6 ′ and the heat radiating plate 2. Radiation boss 5
Is preferably fixed with an adhesive having good thermal conductivity. The thickness of the heat radiation layer 6 is 0.5 mm to 2.0 mm
The degree is preferred.
【００２３】上記隙間には、寸法上のばらつきがあるた
め、０．１ｍｍ程度乃至０．０５ｍｍ程度の寸法差のあ
る多数の放熱ボス５を用意し、この中から適宜選択して
使用する。Since the gap has a dimensional variation, a number of heat radiating bosses 5 having a dimensional difference of about 0.1 mm to about 0.05 mm are prepared, and are appropriately selected and used from these bosses.
【００２４】放熱ボス５下の放熱層６′は、放熱層６よ
りも厚くなっているが、放熱層６，６′が一体構造とな
っていなくともよく、放熱層６の一様な厚さのものと、
放熱ボス５とこの放熱層６との間に充填する熱伝導性良
好な接着剤とで、形成されていてもよい。Although the heat radiation layer 6 'under the heat radiation boss 5 is thicker than the heat radiation layer 6, the heat radiation layers 6 and 6' do not have to have an integral structure. And
The heat radiation boss 5 and an adhesive having good heat conductivity to be filled between the heat radiation boss 5 and the heat radiation layer 6 may be formed.
【００２５】この実施の形態によれば、半導体チップ１
の発熱は、放熱板２から、放熱ボス５を経て、放熱板
６′，放熱板６まで達するため、冷却効果は極めて高い
ものとなるばかりでなく、デッドスペースとなってい
る。放熱板２下の隙間に放熱ボス５を設けているため、
実装構造上の寸法が大きくなることがなく、従来の筐体
がそのまま使用できるという利点がある。また、放熱ボ
ス５が、放熱板２をプリント配線基板４に固着している
から、実装後の機械的振動に対してより強い構造となっ
ている。According to this embodiment, the semiconductor chip 1
Is generated from the heat radiating plate 2 through the heat radiating boss 5 to the heat radiating plates 6 'and 6 so that not only the cooling effect is extremely high, but also dead space. Since the heat radiating boss 5 is provided in the gap below the heat radiating plate 2,
There is an advantage that the size of the mounting structure does not increase and the conventional housing can be used as it is. Further, since the heat radiating boss 5 fixes the heat radiating plate 2 to the printed wiring board 4, the structure is more resistant to mechanical vibration after mounting.
【００２６】本発明の第２の実施の形態を示す図２の断
面図を参照すると、この実施の形態のプリント配線基板
１３は、放熱ボス１２の平面寸法が放熱板２の平面寸法
とで共通している点が、図１と相違しており、その他の
構造は第１の実施の形態と共通するため、説明を省く。Referring to the sectional view of FIG. 2 showing the second embodiment of the present invention, in the printed wiring board 13 of this embodiment, the plane size of the heat radiating boss 12 is common to the plane size of the heat radiating plate 2. This point is different from FIG. 1 and the other structure is common to that of the first embodiment, and therefore the description is omitted.
【００２７】この実施の形態によれば、放熱ボス１２の
熱抵抗が小さくなっており、その他の効果は図１の場合
と共通する。尚、放熱層６と放熱ボス１２とは、熱伝導
性の良好な接着剤からなる接続体１１で固着されてい
る。According to this embodiment, the heat resistance of the heat radiating boss 12 is reduced, and the other effects are the same as those of FIG. In addition, the heat radiation layer 6 and the heat radiation boss 12 are fixed by a connection body 11 made of an adhesive having good heat conductivity.
【００２８】本発明の第３の実施の形態を示す図３の断
面図を参照すると、このプリント配線板１５は、下面に
所定間隔で溝が形成された放熱層１４と、第１の実施の
形態と共通する絶縁層９、放熱ボス５とを備える。Referring to the sectional view of FIG. 3 showing the third embodiment of the present invention, this printed wiring board 15 includes a heat radiation layer 14 having grooves formed at predetermined intervals on the lower surface, and a first embodiment. An insulating layer 9 and a heat radiating boss 5 which are common to the embodiments are provided.
【００２９】図４は、本発明の関連技術のものの断面図
である。図４の断面図を参照すると、このプリント配線
基板１７は、一様な厚さの放熱層１６と、半導体装置２
１の放熱板２に対向した位置に設けた放熱ボス１８と、
上面にランド１０等が形成された絶縁層９とを備える。
放熱ボス１８は、放熱層１６と一体で形成されている場
合もあるが、互いに別々に造られ、半田付け又は熱伝導
性の良好な接着剤付けで接続されていることもある。絶
縁層９は、放熱ボス１８の位置をさけるように、寸法的
余裕を持ってあらかじめ開口されており、放熱層１６の
上面に接着剤で固着されている。その他の構成等は図１
の場合と共通する。FIG . 4 is a sectional view of a related art of the present invention.
It is. Referring to the cross-sectional view of FIG. 4, the printed wiring board 17 includes a heat dissipation layer 16 having a uniform thickness and a semiconductor device 2.
A heat radiating boss 18 provided at a position facing the heat radiating plate 2;
And an insulating layer 9 having a land 10 and the like formed on the upper surface.
Radiator boss 18 that is formed integrally with the heat dissipation layer 16 fly
If also, but built separately from each other, there is also and have been connected with good gluing soldering or thermal conductivity. Insulating layer 9, so as to avoid the position of the radiator bosses 18 are pre-opened with a dimensional allowance, Ru Tei is adhesively bonded to the upper surface of the heat dissipation layer 16. Figure 1 shows other configurations
Common to the case of
【００３０】第１乃至第３の実施の形態において、放熱
層６，１４，１６や放熱ボス５，１２，１８等は、銅の
金属材料に金メッキが施されているものが好ましい。ま
た、いずれの実施の形態も自然冷却によって放熱する
が、放熱効果をより高めたい場合には、ファン等による
強制冷却手段を備えてもよく、特に第３の実施の形態で
は放熱層１４，１６の主表面に、主に送風することが好
ましい。In the first to third embodiments, the heat radiation layers 6, 14, 16 and the heat radiation bosses 5, 12, 18, etc. are preferably made of copper metal material plated with gold. In each of the embodiments, the heat is radiated by natural cooling. However, if it is desired to further enhance the heat radiating effect, a forced cooling means such as a fan may be provided. In the third embodiment, the heat radiating layers 14 and 16 are particularly provided. It is preferable to mainly blow air to the main surface of the substrate.
【００３１】放熱板２とプリント配線基板との間の絶縁
性を確保したい場合には、第１の実施の形態では、放熱
層６′に、電気的絶縁性の良好な高熱伝導率の接着剤を
使用する。図２では接続体１１に、図３では放熱層６′
に、各々同接着剤を用いる。When it is desired to ensure insulation between the heat sink 2 and the printed wiring board, in the first embodiment, an adhesive with good electrical insulation and high thermal conductivity is attached to the heat dissipation layer 6 '. Use In FIG. 2, the connection body 11 is provided, and in FIG.
, The use of each said adhesive.
【００３２】[0032]
【発明の効果】以上説明した通り、本発明によれば、実
装された半導体装置から発生する熱を、プリント配線基
板自体に効率良く導入することができるため、発熱源と
なるジャンクション温度の上昇を低く抑えることがで
き、このため、回路動作上の信頼性が向上するだけでな
く、従来よりも消費電力の大きい半導体装置が実装でき
るという効果が得られ、上述した各課題がことごとく達
成された。As described in the foregoing, according to the present invention, the heat generated from the mounted semiconductor device, it is possible to efficiently introduced into the printed circuit board itself, the increase in the junction temperature as a heat source This has the effect of not only improving the reliability of the circuit operation, but also mounting a semiconductor device with higher power consumption than before, and all the above-mentioned problems have been achieved.
【図１】本発明の第１の実施の形態を示す断面図であ
る。FIG. 1 is a cross-sectional view showing a first embodiment of the present invention.
【図２】本発明の第２の実施の形態を示す断面図であ
る。FIG. 2 is a sectional view showing a second embodiment of the present invention.
【図３】本発明の第３の実施の形態を示す断面図であ
る。FIG. 3 is a sectional view showing a third embodiment of the present invention.
【図４】本発明の関連技術のものの断面図である。FIG. 4 is a sectional view of a related art of the present invention.
【図５】従来の実装されたプリント配線基板の一例を示
す断面図である。FIG. 5 is a cross-sectional view illustrating an example of a conventional mounted printed wiring board.
【図６】従来の半導体装置を示す断面図である。FIG. 6 is a sectional view showing a conventional semiconductor device.
１ 半導体チップ ２ 放熱板 ３ リード ４，１３，１５，１７，２０ プリント配線基板 ５，１２，１８ 放熱ボス ６，６′，１４，１６ 放熱層 ７ ボンディングワイヤ ８，９ 絶縁層 １０ ランド １１ 接続体 １９ モールド樹脂 ２１，３０ 半導体装置 ２６ 熱伝導体 ２７ ヒートシンク ２８ 止めネジ ２９ ネジ孔 ３１ 絶縁基板 DESCRIPTION OF SYMBOLS 1 Semiconductor chip 2 Heat sink 3 Lead 4,13,15,17,20 Printed wiring board 5,12,18 Heat dissipation boss 6,6 ', 14,16 Heat dissipation layer 7 Bonding wire 8,9 Insulation layer 10 Land 11 Connection body DESCRIPTION OF SYMBOLS 19 Mold resin 21, 30 Semiconductor device 26 Thermal conductor 27 Heat sink 28 Set screw 29 Screw hole 31 Insulating substrate
Claims (6)
板において、少なくとも、両主表面に絶縁層が固着され
た放熱層を備え、前記半導体装置は少なくともパッケー
ジ封止された半導体チップと実装時にプリント配線基板
と対向する下面に露出した放熱板を備えると共に該下面
は実装面から離間して実装されており、且つ前記放熱板
と前記放熱層との間に両端が前記放熱板と前記放熱層と
にそれぞれ当接している放熱ボスを備えることを特徴と
するプリント配線基板。1. A printed circuit board semiconductors device is mounted, at least, e Bei the heat dissipation layer insulating layer is secured to both main surfaces, said semiconductor device is at least package
Semiconductor chip sealed with a printed circuit board during mounting
A heat sink exposed on the lower surface facing the lower surface and the lower surface
Is mounted away from the mounting surface, and the heat sink
And both ends of the heat sink and the heat sink between the heat sink and the heat sink
Printed circuit board, characterized that you each comprising a radiator boss in contact with.
板において、少なくとも、多数の溝を一面に有しこの溝
を有する面が露出している放熱層を備え、前記半導体装
置は少なくともパッケージ封止された半導体チップと実
装時にプリント配線基板と対向する下面に露出した放熱
板を備えると共に該下面は実装面から離間して実装され
ており、且つ前記放熱板と前記放熱層との間に両端が前
記放熱板と前記放熱層とにそれぞれ当接している放熱ボ
スを備えることを特徴とするプリント配線基板。2. A printed circuit board semiconductors device is mounted, at least, e Bei the heat dissipation layer is the surface having the grooves has a plurality of grooves on one side are exposed, the semiconductor instrumentation
The device is at least as real as the packaged semiconductor chip.
Heat radiation exposed on the lower surface facing the printed circuit board during mounting
Board and the lower surface is mounted separately from the mounting surface.
And, and ends before between the radiator plate and the heat dissipation layer
Printed circuit board, wherein the this with each serial radiator plate and to said radiating layer heat dissipation boss abuts.
が露出している放熱層が、プリント配線基板の一主表面
を形成している請求項２記載のプリント配線基板。3. The printed wiring board according to claim 2, wherein the heat radiation layer having a large number of grooves on one surface and exposing the surface having the grooves forms one main surface of the printed wiring board.
介して前記放熱層に接着されている請求項１乃至３いず
れか１項に記載のプリント配線基板。4. The printed wiring board according to claim 1, wherein the heat radiating boss is bonded to the heat radiating layer via an adhesive having good heat conductivity.
リント配線基板の実装方法において、放熱板を有する半
導体装置を前記プリント配線基板に実装後に、前記放熱
ボスを前記放熱板と前記プリント配線基板の放熱層との
隙間に介装することを特徴とするプリント配線基板の実
装方法。5. The method for mounting a printed wiring board according to claim 1, wherein after the semiconductor device having a heat sink is mounted on the printed wiring board, the heat dissipation boss is mounted on the printed circuit board. A method for mounting a printed wiring board, comprising interposing a gap between a heat sink and a heat dissipation layer of the printed wiring board.
用いる請求項５記載のプリント配線基板の実装方法。6. The method for mounting a printed circuit board according to claim 5, wherein an adhesive having good thermal conductivity is used when the member is interposed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22238895A JP2919313B2 (en) | 1995-08-30 | 1995-08-30 | Printed wiring board and its mounting method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22238895A JP2919313B2 (en) | 1995-08-30 | 1995-08-30 | Printed wiring board and its mounting method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0969592A JPH0969592A (en) | 1997-03-11 |
| JP2919313B2 true JP2919313B2 (en) | 1999-07-12 |
Family
ID=16781587
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22238895A Expired - Fee Related JP2919313B2 (en) | 1995-08-30 | 1995-08-30 | Printed wiring board and its mounting method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2919313B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006339588A (en) * | 2005-06-06 | 2006-12-14 | Nitto Denko Corp | Wiring circuit substrate |
| JP4741324B2 (en) * | 2005-09-06 | 2011-08-03 | ユニチカ株式会社 | Printed board |
-
1995
- 1995-08-30 JP JP22238895A patent/JP2919313B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0969592A (en) | 1997-03-11 |
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