JPH09289292A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device by which the change in unevenness of the surface of an electrode in a manufacturing process can be suppressed and thereby the surface area of a capacitor can be increased. SOLUTION: First, an interlayer insulating film 2 is formed and then a cell contact 3 is formed. Nextly, a first polysilicon film 4 is formed and impurities are diffused in the polysilicon film 4 and then a rough surface polysilicon film 5 which has an uneven surface is formed. After that, the impurities is diffused from the first polysilicon film 4 into the polysilicon film 5 which has the uneven surface.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a method of manufacturing a capacitor having an electrode surface with irregularities.

[0002]

2. Description of the Related Art Conventionally, a method of manufacturing a capacitor having unevenness on a lower electrode is LPCVD (low pressure chemical vapor deposition).
The silane gas (SiH ₄ ) is used to form a film at a temperature in the transition region from an amorphous state to a crystalline state at about 570 ° C.

Subsequently, impurities were introduced by arsenic (As), phosphorus (P), or phosphorus diffusion (POCl ₃ ) by ion implantation to give conductivity.

[0004]

However, when impurities are introduced by the above-mentioned conventional ion implantation or phosphorus diffusion, the shape of the unevenness changes due to deformation due to collision of ions at the time of introduction and recrystallization during diffusion. was there.
As a result, there is a problem that the rate of increase in the surface area of the capacitor due to the unevenness decreases.

It is an object of the present invention to provide a method for manufacturing a semiconductor device which eliminates the above-mentioned problems and suppresses the change in the shape of the unevenness of the electrode surface in the manufacturing process, thereby increasing the surface area of the capacitor. .

[0006]

In order to achieve the above object, the present invention provides: [1] In a method of manufacturing a semiconductor device, a step of forming an interlayer insulating film, a step of forming a cell contact, and a first step.
Forming a polysilicon film, diffusing impurities into the first polysilicon film, forming a polysilicon film having unevenness on the surface, and forming a polysilicon film on the surface from the first polysilicon film. The steps of diffusing impurities into a polysilicon film having irregularities are sequentially performed.

Therefore, the surface area of the capacitor can be increased by suppressing the change in the shape of the irregularities on the electrode surface during the manufacturing process. In particular, since the impurities are diffused by thermal diffusion from the lower polysilicon film into which impurities are introduced at a high concentration to the upper polysilicon film having irregularities, the surface area of the capacitor electrode due to the irregularities can be increased. .

[2] In a method of manufacturing a semiconductor device, a step of forming an interlayer insulating film, a step of forming a cell contact, a step of forming a first polysilicon film, and a step of forming a first polysilicon film on the first polysilicon film. A step of diffusing impurities, a step of forming a polysilicon film having unevenness on the surface, a step of forming a silicon oxide film, and a step of doping impurities from the first polysilicon film to the polysilicon film having unevenness on the surface. The step of diffusing and the step of removing the silicon oxide film are sequentially performed.

As described above, when the impurity is thermally diffused, the silicon oxide film for preventing the outward diffusion of the impurity is provided on the polysilicon film having the unevenness of the upper layer. It is possible to prevent the outward diffusion of the impurities and efficiently diffuse the impurities into the polysilicon film having the unevenness in the upper layer. [3] In a method of manufacturing a semiconductor device, a step of forming an interlayer insulating film, a step of forming a cell contact, a step of forming a polysilicon film having unevenness on the surface, and PS.
A step of forming a G film, and a step of diffusing impurities from the PSG film into a polysilicon film having irregularities on the surface,
The steps of removing the PSG film are sequentially performed.

As described above, since the impurities are diffused from the PSG film formed on the upper layer of the uneven polysilicon film to the uneven polysilicon film and then removed, there is no lower polysilicon film. As a result, the height of the capacitor can be reduced, the step difference from the portion without the capacitor can be reduced, and the subsequent photolithography and etching can be easily performed.

[4] In a method of manufacturing a semiconductor device, a step of forming an interlayer insulating film, a step of forming a silicon nitride film, a step of forming a first PSG film, and a step of forming a cell contact, Forming a polysilicon film having irregularities on the surface, forming a second PSG film, and diffusing impurities from the first and second PSG films into the polysilicon film having irregularities on the surface. The step and the step of removing the second PSG film are sequentially performed.

In this way, since diffusion can be performed from the upper and lower sides of the polysilicon film having irregularities, it is possible to reduce the temperature and time during diffusion, and reduce the influence of heat treatment on other elements. It is also possible to easily diffuse into a contact that is remote from the diffusion source. [5] In the method of manufacturing a semiconductor device according to the above [4], a step of patterning a polysilicon film having irregularities on the surface and a step of removing the first PSG film are performed in order. .

In this way, by removing the insulating film serving as a diffusion source of impurities, a fin type capacitor can be obtained in which the surface (top surface / side surface) and back surface (bottom surface) of the polysilicon film having irregularities can also be used as a capacitor. You can

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 shows the first embodiment of the present invention.
2 is a sectional view of a semiconductor device showing a first embodiment of the present invention, and FIG. 2 is a sectional view of a semiconductor device showing a first embodiment of the present invention. (1) First, as shown in FIG.
An interlayer insulating film 2 is formed on the upper surface, a cell contact 3 is opened, and then a polysilicon film 4 having a thickness of 100 to 200 nm, LPCV
Formed by Method D. Next, phosphorus (P) or arsenic (As) is added with energy of 20 to 50 keV, 1 to 10 ×.
² to 10 × 10 ²⁰ by ion implantation or phosphorus diffusion (POCl ₃ , PH ₃ ) at a dose of 10 ¹⁵ pieces / cm ^2.
Impurities are introduced into the polysilicon film 4 at a concentration of pcs / cm ³ .

(2) Next, as shown in FIG.
When a polysilicon film is formed by a PCVD method using SiH ₄ at a transition temperature from an amorphous state to a crystalline state, for example, 570 ° C., a polysilicon (hereinafter, rough surface polysilicon) film 5 having irregularities on the surface is formed. To be done. Next, the impurities are diffused from the polysilicon film 4 to the rough surface polysilicon film 5 by annealing in an inert gas at a temperature of 800 to 950 ° C. for a time of 10 to 60 minutes.

(3) Next, as shown in FIG. 1C, a capacitor insulating film 6 is formed of a nitride film, a polysilicon film 8 to be an upper electrode is formed, impurities are diffused, and then patterning is performed. As a result, the capacitor is completed. By carrying out such steps, a semiconductor device having a capacitor as shown in FIG. 2 can be obtained. That is, the interlayer insulating film 2 is formed on the silicon substrate 1, the cell contact 3 is opened, the lower electrode made of the polysilicon film 4 and the rough surface polysilicon 5 and the capacitor insulating film 6 formed on the upper surface and the side surface thereof. And an upper electrode 8 made of polysilicon that covers the capacitor insulating film 6.

FIG. 3 shows a case where impurities are introduced into the rough-surface polysilicon film by conventional ion implantation and a case where impurities are introduced into the rough-surface polysilicon film by the method of the present invention.
The increase rate of the surface area of the electrode when the rough surface polysilicon film is used is shown as compared with the case where the flat polysilicon film is used. As is apparent from this figure, according to the present invention,
An area increase of 3 times from the conventional 2.4 times can be obtained.

As described above, according to the first embodiment, the impurities are diffused by thermal diffusion from the lower polysilicon film 4 into which the impurities are introduced at a high concentration to the upper rough polysilicon film 5 having irregularities. Therefore, it is possible to increase the surface area of the capacitor electrode due to the unevenness. Next, a second embodiment of the present invention will be described.

FIG. 4 is a sectional view of a semiconductor device manufacturing process showing the second embodiment of the present invention. (1) First, as in the first embodiment [see FIG. 1A above], as shown in FIG. 4A, the interlayer insulating film 12 is formed on the silicon substrate 11, and the cell contact 13 is formed. After the opening, the polysilicon film 14 is set to 100 to 200 nm, LPC.
It is formed by the VD method. Next, phosphorus (P) or arsenic (As) is added with energy of 20 to 50 keV, and 1 to 1
2 to 10 × by ion implantation or phosphorus diffusion (POCl ₃ , PH ₃ ) at a dose of 0 × 10 ¹⁵ pieces / cm ^2.
Impurities of polysilicon film 1 at a concentration of 10 ²⁰ pieces / cm ³
Introduce to 4.

(2) Next, the first embodiment [see FIG.
As shown in FIG. 4B, after the rough surface polysilicon film 15 is formed, the silicon oxide film 16 is formed to 10 to 30 nm by the CVD (Chemical Vapor Deposition) method. . Next, the impurities are diffused from the polysilicon film 14 to the rough surface polysilicon film 15 by annealing in an inert gas at a temperature of 800 to 950 ° C. for a time of 10 to 60 minutes.

Then, with an HF (hydrogen fluoride) solution,
The silicon oxide film 16 is removed. This silicon oxide film 1
No. 6 is preferably formed by a CVD method because the shape of the irregularities of the rough surface polysilicon film 15 is deformed when the surface of the rough surface polysilicon film 15 is formed by thermal oxidation. (3) Next, as shown in FIG. 4C, a capacitor insulating film 17 is formed of a nitride film, a polysilicon film 18 serving as an upper electrode is formed, impurities are diffused, and patterning is performed to form a capacitor. Complete.

As described above, according to the second embodiment, the silicon oxide film 16 for preventing the outward diffusion of the impurities is formed on the rough-surfaced polysilicon film 15 having the upper surface unevenness during the thermal diffusion of the impurities. Since it is provided, it is possible to prevent the escape of impurities, especially the outward diffusion from the concave portions, and to efficiently diffuse the impurities into the polysilicon film 15 having the unevenness in the upper layer.

Next, a third embodiment of the present invention will be described. FIG. 5 is a sectional view of a semiconductor device manufacturing process showing the third embodiment of the present invention. (1) First, as shown in FIG. 5A, the silicon substrate 2
An inter-layer insulating film 22 is formed on the first layer 1, a cell contact 23 is opened, and then a polysilicon film 24 having irregularities on the surface is formed.

(2) Next, as shown in FIG.
PSG (Phospho Silicat) by VD method
The e-Glass) film 25 is formed to have a phosphorus concentration of 10 to 30 weight percent (wt%) of 100 to 300 nm. Then, by annealing in an inert gas at a temperature of 800 to 950 ° C. for a time of 10 to 60 minutes, impurity phosphorus is diffused from the PSG film 25 to the polysilicon film 24 having irregularities on the surface. In addition, instead of the PSG film 25, AsSG
When the (Arsenic Silicate Glass) film is used, arsenic (As) can be diffused.

(3) Next, with the HF solution, the PSG film 2
5C, a capacitor insulating film 26 is formed of a nitride film, a polysilicon film 27 serving as an upper electrode is formed, impurities are diffused, and patterning is performed as shown in FIG. 5C. Is completed. As described above, according to the third embodiment, impurities are diffused from the PSG film 25 formed in the upper layer of the uneven polysilicon film 24 into the uneven polysilicon film 24, and then the PSG film 25 is removed. As a result, the height of the capacitor can be reduced, the step difference with the part without the capacitor can be reduced, and the subsequent photolithography and etching can be easily performed.

Next, a fourth embodiment of the present invention will be described. FIG. 6 is a sectional view of a semiconductor device manufacturing process showing the fourth embodiment of the present invention. (1) First, as shown in FIG. 6A, the silicon substrate 3
1, an interlayer insulating film 32 is formed on the first insulating film 32, and a silicon nitride film 34 is formed thereon to a thickness of 10 to 20 nm, and then a first PSG film 35 is formed.
To 200 nm to 400 nm, and the cell contact 33 is opened. Next, the polysilicon film 3 having irregularities on the surface
6 and a second PSG film 37 on it 100-300 nm
Form.

Subsequently, a temperature of 800 to 950 ° C., 1
By annealing in an inert gas for a time of 0 to 60 minutes, the impurity phosphorus is diffused from the PSG films 35 and 37 into the polysilicon film 36 having irregularities on the surface. This time,
The silicon nitride film 34 serves as a barrier for phosphorus diffusion from the first PSG film 35 to the silicon substrate 31. (2) Next, as shown in FIG. 6B, the second PSG film 37 is removed with an HF solution.

(3) Next, as shown in FIG. 6C, a capacitor insulating film 38 is formed of a nitride film, a polysilicon film 39 to be an upper electrode is formed, impurities are diffused, and then patterning is performed. As a result, the capacitor is completed. As described above, according to the fourth embodiment, since diffusion can be performed from the upper and lower sides of the polysilicon film 36 having irregularities, it is possible to reduce the temperature and the time during diffusion, and the influence of heat treatment on other elements. Can be reduced and diffusion into a contact away from the diffusion source can be easily performed.

FIG. 7 is a sectional view of a semiconductor device showing a fifth embodiment of the present invention, and FIG. 8 is a sectional view of the essential steps of manufacturing the semiconductor device. In the fourth embodiment, the example in which only the surface of the polysilicon film 36 having irregularities on the surface is used as a capacitor has been described. However, a fin type capacitor can be obtained as shown in FIG. 7 as follows. it can.

A method of manufacturing the semiconductor device will be described below with reference to FIG. (1) First, as shown in FIG. 8A, the silicon substrate 3
1, an interlayer insulating film 32 is formed on the first insulating film 32, and a silicon nitride film 34 is formed thereon to a thickness of 10 to 20 nm, and then a first PSG film 35 is formed.
To 200 nm to 400 nm, and the cell contact 33 is opened. Next, the polysilicon film 3 having irregularities on the surface
6 and a second PSG film 37 on it 100-300 nm
Form.

Subsequently, a temperature of 800 to 950 ° C., 1
By annealing in an inert gas for a time of 0 to 60 minutes, the impurity phosphorus is diffused from the PSG films 35 and 37 into the polysilicon film 36 having irregularities on the surface. This time,
The silicon nitride film 34 serves as a barrier for phosphorus diffusion from the first PSG film 35 to the silicon substrate 31. (2) Next, as shown in FIG. 8B, the second PSG film 37 is removed with an HF solution.

(3) Next, as shown in FIG. 8C, the polysilicon film 36 having irregularities on the surface is patterned, and then the PSG film 35 is removed with an HF solution using the silicon nitride film 34 as a stopper. To do. (4) Next, as shown in FIG. 8D, a capacitor insulating film 38 and a polysilicon film 39 to be an upper electrode are formed,
By patterning after diffusing the impurities, the capacitor insulating film 38 can be formed on the surface A (upper surface and side surfaces) and the back surface B (lower surface) of the polysilicon film 36 having unevenness on the surface. A fin-type capacitor (see FIG. 7) whose bottom surface can be used as a capacitor is completed.

It should be noted that the present invention is not limited to the above-described embodiment, and various modifications are possible based on the spirit of the present invention, and these are not excluded from the scope of the present invention.

[0034]

As described above, according to the present invention, the following effects can be obtained. (1) According to the invention described in claim 1, it is possible to suppress the change in the shape of the unevenness of the electrode surface in the manufacturing process and increase the surface area of the capacitor. In particular, since the impurities are diffused by thermal diffusion from the lower polysilicon film into which impurities are introduced at a high concentration to the upper polysilicon film having irregularities, the surface area of the capacitor electrode due to the irregularities can be increased. .

(2) According to the second aspect of the invention, a silicon oxide film for preventing outward diffusion of impurities is provided on the polysilicon film having the upper and lower irregularities when the impurities are thermally diffused. Therefore, it is possible to prevent the escape of impurities, especially the outward diffusion from the concave portions, and it is possible to efficiently diffuse the impurities into the polysilicon film having the unevenness in the upper layer.

(3) According to the third aspect of the invention, the impurities are diffused from the PSG film formed on the upper layer of the uneven polysilicon film to the uneven polysilicon film and then removed. Since there is no lower polysilicon film, it is possible to reduce the height of the capacitor, and it is possible to reduce the step difference from the portion without the capacitor.
Subsequent photolithography and etching can be easily performed.

(4) According to the invention described in claim 4, since diffusion can be performed from the upper and lower sides of the polysilicon film having irregularities, it is possible to reduce the temperature and the time during the diffusion, and other elements The effect of heat treatment on
Diffusion into the contact away from the diffusion source can also be done easily. (5) According to the invention of claim 5, by removing the insulating film serving as a diffusion source of impurities, the surface (top surface / side surface) and the back surface (bottom surface) of the polysilicon film having irregularities can also be used as a capacitor. A fin type capacitor can be obtained.

[Brief description of drawings]

FIG. 1 is a cross-sectional view illustrating a manufacturing process of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a sectional view of a semiconductor device showing a first embodiment of the present invention.

FIG. 3 is a graph showing the rate of increase in the surface area of electrodes of the related art and the present invention.

FIG. 4 is a cross-sectional view illustrating a manufacturing process of a semiconductor device according to a second embodiment of the present invention.

FIG. 5 is a cross-sectional view illustrating a manufacturing process of a semiconductor device according to a third embodiment of the present invention.

FIG. 6 is a sectional view of a semiconductor device manufacturing process showing the fourth embodiment of the present invention.

FIG. 7 is a sectional view of a semiconductor device showing a fifth embodiment of the present invention.

FIG. 8 is a sectional view of a semiconductor device in the manufacturing process showing the fifth embodiment of the present invention.

[Explanation of symbols]

 1, 11, 21, 31 Silicon substrate 2, 12, 22, 32 Interlayer insulating film 3, 13, 23, 33 Cell contact 4, 8, 14, 18, 27, 39 Polysilicon film 5, 15, 24, 36 Coarse Surface Polysilicon film 6,17,26,38 Capacitor insulating film 16 Silicon oxide film 25,35,37 PSG film 34 Silicon nitride film

Claims (5)

[Claims] 1. A method of manufacturing a semiconductor device comprising:
Forming an interlayer insulating film, (b) forming a cell contact, (c) forming a first polysilicon film, and (d) diffusing impurities into the first polysilicon film. A step, (e) a step of forming a polysilicon film having irregularities on the surface, and (f) a step of diffusing impurities from the first polysilicon film to the polysilicon film having irregularities on the surface are sequentially performed. A method for manufacturing a semiconductor device, comprising: 2. A method of manufacturing a semiconductor device, comprising:
Forming an interlayer insulating film, (b) forming a cell contact, (c) forming a first polysilicon film, and (d) diffusing impurities into the first polysilicon film. A step, (e) a step of forming a polysilicon film having irregularities on the surface, (f) a step of forming a silicon oxide film, and (g) a polysilicon step having irregularities on the surface of the first polysilicon film. A method of manufacturing a semiconductor device, which comprises sequentially performing a step of diffusing impurities into a silicon film and (h) a step of removing the silicon oxide film. 3. A method of manufacturing a semiconductor device, comprising:
A step of forming an interlayer insulating film, (b) a step of forming a cell contact, (c) a step of forming a polysilicon film having irregularities on the surface, (d) a step of forming a PSG film, and (e) ) Diffusion of impurities from the PSG film into the polysilicon film having irregularities on the surface, and (f) the P
A method of manufacturing a semiconductor device, which comprises sequentially performing the steps of removing the SG film. 4. A method of manufacturing a semiconductor device, comprising:
Forming an interlayer insulating film, (b) forming a silicon nitride film, (c) forming a first PSG film, (d) forming a cell contact, and (e) surface A step of forming a polysilicon film having unevenness on the
(F) a step of forming a second PSG film; (g) a step of diffusing impurities from the first and second PSG films into a polysilicon film having irregularities on the surface; 2. A method of manufacturing a semiconductor device, which comprises sequentially performing the step of removing the PSG film of No. 2. 5. The method of manufacturing a semiconductor device according to claim 4, wherein a step of patterning a polysilicon film having irregularities on the surface and a step of removing the first PSG film are performed in this order. Manufacturing method of semiconductor device.