JPH09148572A - Manufacture of semiconductor device and semiconductor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To impart conductivity to a polysilicon layer without exerting influence of thermal diffusion upon a substrate and a conducting pattern. SOLUTION: A side wall 109 formed by etching back a first insulating film 107 containing no impurities and a second insulating film 108 which is formed on the film 107 and contains impurities is formed on the side wall of a gate electrode 106 formed on a substrate 101. A polysilicon layer 111 is formed on the substrate 101 in the state that the layer 111 is connected with the gate electrode 106 and the substrate 101 between the side walls 109. By heat treatment, impurities are diffused in the polysilicon layer 111 from the second insulating film 108 constituting the side wall 109. Thereby the first insulating film 107 is used as a barrier, and thermal diffusion is performed while preventing impurities from diffusing from the second insulating film 108 to the substrate 101 and the gate electrode 106.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device in which a sidewall is arranged on a sidewall of a conductive pattern, and a semiconductor device.

[0002]

2. Description of the Related Art In recent years, with the high integration of semiconductor devices, the spacing between conductive patterns arranged on a substrate tends to be narrowed. Therefore, for example, in a MOS transistor having a gate electrode as the conductive pattern, an insulating sidewall is provided on the side wall of the gate electrode formed on the substrate so that the gate electrodes are connected to each other while being insulated from each other. The contact is formed by self-alignment. Hereinafter, an example of a method for manufacturing the semiconductor device will be described.

First, as shown in FIG.
A silicon oxide film 206 is formed on the substrate 201 in a state of covering the gate insulating film 202, the gate electrode (conductive pattern) 203, and the offset insulating film 205, which are sequentially formed on the substrate 1 from the lower layer. After that, as shown in FIG. 2B, the silicon oxide film 206 is etched back to form the gate insulating film 202, the gate electrode 203, and the offset insulating film 2.
A sidewall 206 made of a silicon oxide film 206 is formed on the sidewall of 05. Next, the offset insulating film 20
5 and the side wall 206 are used as a mask to perform ion implantation to introduce impurities for forming the impurity layer 207 into the surface layer of the substrate 201.

Next, as shown in FIG. 2C, a polysilicon layer 208 is formed on the substrate 201 so as to cover the sidewalls 206 and the offset insulating film 205, and then ion implantation or pre-deposition diffusion (hereinafter, referred to as Impurities are diffused into the polysilicon layer 208 by means of depot diffusion) to make the polysilicon layer 208 conductive. After that, the polysilicon layer 208 is etched into a shape connected to the impurity layer 207 of the substrate 201, thereby forming a semiconductor device.

In addition to the above, silicon oxide containing impurities such as PSG (phosphosilicate glass) is used as the silicon oxide film 206 formed on the substrate 201 in the step shown in FIG. There is also a method to use. In this case, in the step shown in FIG. 2C, heat treatment is performed to diffuse the impurities in the sidewalls 206 made of PSG into the polysilicon layer 208, thereby making the polysilicon layer 208 conductive. Have.

[0006]

However, the method of forming a semiconductor device described above has the following problems. That is, in the method of introducing impurities into the polysilicon layer by ion implantation or deposition diffusion, the impurities are introduced from the surface side of the polysilicon layer. Therefore, in order to sufficiently introduce impurities in the depth direction of the polysilicon layer, ion implantation with high energy and deposition diffusion with a high heating temperature are required. Therefore, the influence of ion implantation and deposition diffusion reaches the gate electrode, which becomes a factor of deteriorating the characteristics of the transistor.

On the other hand, in the method of diffusing impurities from the sidewall containing the impurities into the polysilicon layer,
Since the sidewall is also in contact with the gate electrode and the substrate, the impurities in the sidewall are diffused not only into the polysilicon layer but also into the gate electrode and the substrate. Therefore, similarly to the above method, the transistor characteristics are deteriorated.

Further, in recent years, in addition to the above methods, a technique of depositing and forming a polysilicon film containing impurities has been developed. However, this method not only limits the types of impurities to be introduced, but also has a problem that the impurity concentration in the polysilicon cannot be sufficiently controlled, and that a dedicated device is required and the cost is high. .

[0009]

Therefore, according to the method of manufacturing a semiconductor device of the present invention, the side wall of the conductive pattern formed on the substrate contains the first insulating film containing no impurities and the impurities formed on the upper surface thereof. A sidewall is formed by etching back the second insulating film, and then a polysilicon layer is formed in a state of being connected to the substrate, and then impurities are added from the second insulating film forming the sidewall to the polysilicon layer. Diffusion is used as a means for solving the above problems.

In the above method, since the sidewall is formed by the first insulating film and the second insulating film formed on the upper surface of the first insulating film, the portion of the sidewall that is in contact with the conductive pattern and the substrate does not contain impurities. It is made of the first insulating film. Therefore, when impurities are diffused from the second insulating film forming the sidewall to the polysilicon layer, the first insulating film serves as a barrier to diffuse the impurities in the second insulating film into the substrate and the conductive pattern. Is prevented.

Further, the semiconductor device of the present invention is a semiconductor device having a polysilicon layer connected to a substrate between conductive patterns having sidewalls, wherein the sidewall has an impurity concentration of an edge portion in contact with the conductive pattern and the substrate. The use of an insulating film having a lower impurity concentration than the other portions is a means for solving the above problems.

In the above semiconductor device, since the side wall disposed on the side wall of the conductive pattern is an insulating film having a low impurity concentration at the edge contacting the conductive pattern and the substrate, the side wall is formed in the polysilicon layer. Impurities are easily diffused, and it is difficult to diffuse impurities into the conductive pattern and the substrate.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment in which the method for manufacturing a semiconductor device according to the present invention is applied to a method for manufacturing a MOS transistor will be described below with reference to the manufacturing process diagrams of FIGS. First, as shown in FIG. 1A, a silicon oxide film 102 is formed on a substrate 101 made of a semiconductor such as silicon, and a polysilicon film 103 containing impurities and WSix are formed on the silicon oxide film 102. The (tungsten silicide) film 104 is sequentially formed. Then
If necessary, the silicon oxide film 10 may be formed on the WSix film 104.
5 is formed.

Thereafter, a resist pattern (not shown here) is formed on the silicon oxide film 10 by a lithography method.
5 is formed. Next, the silicon oxide film 105, the WSix film 104, the polysilicon film 103, and the silicon oxide film 102 are etched by an anisotropic etching method using this resist pattern as a mask. As a result, the polysilicon film 103 and the W film are formed on the substrate 101 via the gate insulating film 102 made of the silicon oxide film 102.
A gate electrode 106 made of the Six film 104 is formed, and a silicon oxide film 105 is formed on the gate electrode 106.
An offset insulating film 105 made of is formed.

Next, a first insulating film 107 made of an insulating film containing no impurities is formed on the substrate 101 while covering the gate insulating film 102, the gate electrode 106 and the offset insulating film 105. As the first insulating film 107, for example, LP-CVD (Low Pressure-Chemical Vapo) using TEOS (tetraethoxysilane) as a reaction gas is used.
r Deposition) method and N ₂ O (dinitrogen oxide) and SiH
₄ (silane) is used as a reaction gas, and silicon oxide or silicon nitride formed by the LP-CVD method is used to form a film having a thickness of, for example, 50 to 100 nm. The film thickness of the first insulating film 107 is set to a size such that the impurity diffusion does not reach in the width direction of the first insulating film 107 when the impurity diffusion is sufficiently performed by the heat treatment in a later process. To do.

After that, a second insulating film 108 made of an insulating film containing impurities is formed on the first insulating film 107.
As the first insulating film 107, PSG (phosphorus silicate glass), BSG (boron silicate glass), BPSG (phosphorus-boron silicate glass), or the like is used. Here, as an example, PSG containing about 9 wt% of phosphorus (P) is formed as the second insulating film 108.

Next, as shown in FIG. 1B, the second insulating film 108 and the first insulating film 10 are anisotropically etched.
7 is etched back to form a sidewall 1 including a first insulating film 107 and a second insulating film 108 on the sidewalls of the gate insulating film 102, the gate electrode 106, and the offset insulating film 105.
09 is formed. After that, ion implantation is performed using the offset insulating film 105 and the sidewalls 109 as a mask to form an impurity layer 110 on the surface layer of the substrate 101.
Is introduced to form the impurity.

Next, as shown in FIG. 1C, the polysilicon layer 1 is formed on the substrate 101 in a state of covering the sidewalls 109 and the offset insulating film 105 by the CVD method.
11 is formed into a film. Then, a resist pattern (not shown) is formed on the polysilicon layer 111 by a lithography method.
Is formed, and the polysilicon layer 111 is anisotropically etched using the resist pattern as a mask. As a result, the polysilicon layer 111 is etched into a shape that connects to the portion of the substrate 101 exposed from the gate electrode 106 and the sidewall 109.

After that, by performing a heat treatment at a temperature of about 900 ° C., for example, the second insulating film 108 in the impurity layer 110 of the substrate 101 and forming the sidewalls 109.
Phosphorus (P) is diffused as an impurity into the polysilicon layer 111 from the inside. Then, the impurity concentration in the polysilicon layer 111 is set to about 10 ²⁰ to 10 ²¹ pieces / cm ³ to make the polysilicon layer 111 conductive.

At the time of the heat treatment, impurities in the second insulating film 108 are included in the first insulating film 10 in contact with the second insulating film 108.
7 and the polysilicon layer 111. However, the first insulating film 10 made of silicon oxide or silicon nitride
The diffusion rate of impurities in the polysilicon layer 7 is
It is very slow as compared with the diffusion rate of impurities in 1.
For this reason, the impurities in the second insulating film 108 are converted into the gate electrode 106 and the substrate 10 by using the first insulating film 107 as a barrier.
The second insulating film 10 is prevented from diffusing into the first insulating film 10.
The impurities in No. 8 are sufficiently diffused in the polysilicon layer 111.

The side wall 109 of the semiconductor device formed as described above includes the gate electrode 106 and the substrate 10.
The insulating film having the impurity concentration on the side in contact with 1 is lower than the impurity concentration on the opposite side, that is, the side in contact only with the polysilicon layer 111. Along with this, the gate electrode 10
6 and the impurity concentration of the substrate 101 including the impurity layer 110 are kept in the initial state.

In the step shown in FIG. 1A of the above embodiment, the first insulating film 107 and the second insulating film 108 are separately formed in two steps. However, the first insulating film 107
The second insulating film 108 and the second insulating film 108 are formed by first forming the first insulating film 107 made of silicon oxide under a film forming gas condition that does not contain impurities, and continuously increasing the amount of the impurity gas added to form the first insulating film 107. The two insulating film 108 may be formed. Further, in the step shown in FIG.
Although the heat treatment is performed after etching 11 is performed, the etching and heat treatment of the polysilicon layer 111 may be performed in the reverse order.

Further, when the polysilicon layer 111 is thick or the width of the polysilicon layer 111 portion located above the gate electrode 106 is large, the above-mentioned impurities are introduced into the polysilicon layer 111. Ion implantation or deposition diffusion may be used together with impurity diffusion from the second insulating film 108 by thermal diffusion. In this case, the ion implantation or the deposition diffusion is performed before or after etching the polysilicon layer 111.

[0024]

As described above, according to the method of manufacturing a semiconductor device of the present invention, the first insulating film containing no impurities and the second insulating film on the upper surface of the first insulating film are etched back to form side walls on the sidewalls of the conductive pattern. After forming the wall, a second layer is formed in the polysilicon layer formed by connecting to the substrate between the conductive patterns.
By thermally diffusing the impurities from the insulating film, the first insulating film serves as a barrier when the impurities are diffused by the heat treatment.
Impurities were prevented from diffusing from the insulating film into the substrate and the conductive pattern. For this reason, it becomes possible to manufacture a semiconductor device in which the polysilicon layer has conductivity without affecting the substrate and the conductive pattern by thermal diffusion.

[Brief description of the drawings]

FIG. 1 is a manufacturing process diagram of a semiconductor device to which the present invention is applied.

FIG. 2 is a manufacturing process diagram of a conventional semiconductor device.

[Explanation of symbols]

 101 Substrate 106 Gate Electrode (Conductive Pattern) 107 First Insulating Film 108 Second Insulating Film 109 Sidewall 111 Polysilicon Layer

Claims (2)

[Claims] 1. A first insulating film containing no impurities is formed on the substrate while covering a conductive pattern formed on the substrate, and a second insulating film containing impurities is formed on the first insulating film. A step of forming a film, etching back the first insulating film and the second insulating film,
A step of forming a sidewall made of the first insulating film and a second insulating film on a sidewall of the conductive pattern; and a step of forming a sidewall on the substrate in a state of being connected to the substrate portion exposed between the conductive pattern and the sidewall. A method of manufacturing a semiconductor device, comprising: a step of forming a polysilicon layer; and a step of diffusing impurities from the second insulating film forming the sidewall to the polysilicon layer by heat treatment. 2. A conductive pattern formed on a substrate, and a sidewall arranged on a sidewall of the conductive pattern,
In a semiconductor device having a polysilicon electrode formed on the substrate in a state of being connected to the substrate portion exposed between the conductive patterns, the sidewall has an impurity concentration on a side in contact with the conductive pattern and the substrate. A semiconductor device comprising an insulating film having a lower impurity concentration than the opposite side.