JPH09282274A - Data transfer method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To transfer data to a slave device at a high speed while omitting one part of exchange of signals by automatically switching the data transfer to synchronous transfer or asynchronous transfer according as whether the ability of synchronous transfer between a master device and the slave device is provided or not. SOLUTION: In the case of data transfer to a slave device 3 from which a signal ack is outputted, a master device 2 starts the data transfer through a synchronous transfer system. Besides, in the case of data transfer to a slave device 4 from which the signal ack is not outputted, the data transfer is started through an asynchronous transfer system. Thus, the master device 2 performs synchronous transfer or asynchronous transfer through the mutual ability change showing the presence/absence of synchronous transfer ability corresponding to the presence/absence of the response signal ack from the slave device 3 or 4 corresponding to a signal ds in the case of outputting an address. Thus, data are synchronously transferred at a high speed while omitting one part of exchange of signals.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data transfer method for synchronously or asynchronously transferring data between devices using a data transfer bus.

[0002]

2. Description of the Related Art Generally, a computer system is provided with a data transfer bus to enable a large amount of data transfer.

For example, in a remote monitoring system, video data shot in the field is transmitted as it is or digitized to a central monitoring device, and the central monitoring device receives the digitized video data through an internal memory or the like via a data transfer bus. And process the various data such as displaying on a display device and saving in an external storage device.

Examples of the video data transfer bus include the IEC822 and VSB buses. As seen in this VSB bus, in order to transfer data using the data transfer bus, the master device performing the transfer acquires the bus and then transfers the address and data to the slave device.

At this time, the master device outputs a signal ds indicating that the data value is fixed, and the slave device receives the signal ds and then returns a signal ack indicating that the data has been received through the bus. .

In this way, the master device and the slave device perform reliable data transfer while exchanging signals ds and ack, assuming that the operations are asynchronous. Such a method is called an asynchronous transfer method. Also in the VSB bus, only the asynchronous transfer method is adopted.

[0007]

As can be seen in the VSB bus, the conventional data transfer using the data transfer bus has only an asynchronous transfer method, and the data transfer is performed regardless of the operating speed of the slave device. Although it can be transferred, it is not always excellent in terms of high speed of data transfer.

Here, when the master device and the slave device operate in synchronization, the master device outputs the signal ds, but the slave device receiving it can receive the data without returning the signal ack. At the same time, the master device can also transfer data without monitoring the signal ack, and the data transfer can be speeded up. Such a method is called a synchronous transfer method.

Therefore, it is conceivable to add a synchronous transfer function to the data transfer bus such as the VSB bus. However, if this function is simply added, it depends on whether or not the slave device has the synchronous transfer capability. Therefore, it is necessary to switch and set the transfer mode, and the versatility of the data transfer bus is impaired.

An object of the present invention is to provide a data transfer method capable of transferring data according to the data transfer method of a slave device without deteriorating the versatility of the data transfer bus.

[0011]

SUMMARY OF THE INVENTION According to the present invention, when a data transfer bus is used to transfer data synchronously or asynchronously between a master device that is a data transfer source and a slave device that receives the data, the master device is used. Is a signal pas indicating that the address is being output in parallel with outputting the address of the slave device.
And a signal ds for synchronous / asynchronous transfer capability exchange, and when the slave device having the synchronous transfer capability receives the signal pas, outputs a signal ac indicating that an address has been received. At the same time, when it receives the signal ds, it outputs a signal ack indicating that it has the synchronous transfer capability, and the slave device that does not have the synchronous transfer capability receives only the signal pas.
A signal ac indicating that the address has been received is output, and data reception processing by a normal asynchronous transfer method that the bus has is started, and the master device transmits data to the slave device that outputs the signal ack by a synchronous transfer method. It is characterized in that data is transferred by an asynchronous transfer method to a slave device that has transferred and has not output the signal ack.

Further, when it is confirmed that the master device and the slave device have the capability of synchronous transfer with each other, the slave device omits returning the signal ack at the time of data transfer and directly transfers the data. The master device is characterized in that the master device holds the signal ds for a certain hold time and transfers data without monitoring the signal ack.

Further, in the case of synchronously transferring data to successive addresses of the slave device, the slave device has a function of incrementing the address of the data by itself each time the data is received from the first received address. Further, the master device continues to output the signal ac indicating that it has the block transfer function, and the master device performs the block transfer to continuously output the data while monitoring the signal ac.

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION

(First Embodiment) FIG. 1 shows an embodiment of the present invention.
A method for automatically switching the data transfer method depending on whether or not the slave device has a synchronous transfer capability is shown.

In the system configuration in which the devices 2 to 5 are coupled by the data transfer bus 1, the device 2 is the master device on the data transfer side, the devices 3 and 4 are the slave devices on the data receiving side, and the device 5
Is a slave device that does not respond to data transfer. The master device 2 is a device having a synchronous transfer capability, the slave device 3 is a device having a synchronous transfer capability, and the slave device 4 is a device having no synchronous transfer capability.

Automatic switching of the data transfer method in such a system configuration is performed by the following protocol.

(1) The master device 2 outputs the address of the slave device which is the data transfer destination, in parallel with the signal pas indicating that the address is output,
A signal ds for capability exchange of synchronous / asynchronous transfer is output.

(2) When the slave device 3 having the synchronous transfer capability receives the signal pas through the bus 1, it outputs the signal ac indicating that the address has been received. In parallel with this, the presence / absence of the capability exchange signal ds is monitored, and when the signal ds is received, a signal ack for indicating that it has the synchronous transfer capability is output.

(3) The slave device 4 which does not have the synchronous transfer capability receives only the signal pas, outputs the signal ac indicating that the address has been received, and receives the data by the normal asynchronous transfer system of the bus. to go into.

(4) The slave device 5 which does not respond is
It receives only the signal pas, outputs the signal ac indicating that the address has been received, and does not respond to the subsequent data transfer.

(5) When transferring data to the slave device 3 which has output the signal ack, the master device 2 starts data transfer by the synchronous transfer method. When data is transferred to the slave device 4 that did not output the signal ack, the data transfer is started by the asynchronous transfer method.

As described above, in the automatic switching of the data transfer system, the response signal a from the slave device in response to the output of the signal ds when the master device outputs the address.
Synchronous transfer or asynchronous transfer is performed by mutually exchanging capabilities, which indicates whether or not the slave device has a synchronous transfer capability depending on the presence or absence of ck.

As a result, the slave device having the synchronous transfer capability can perform high-speed data transfer by the synchronous transfer, and the slave device not having the synchronous transfer capability can perform the asynchronous transfer. It is possible to automatically switch between two data transfer modes depending on the capability of one master device data transfer destination slave device. Further, the versatility of the data transfer bus is not impaired.

Since the capability exchange of the synchronous / asynchronous transfer is performed in parallel while the master device outputs the address, the data exchange time does not increase due to the capability exchange.

Further, a slave device having a synchronous transfer capability and a slave device having no synchronous transfer capability can be mixed in one system.

Further, when the master device does not have the synchronous transfer capability, the slave device performs asynchronous transfer so that the master device having the synchronous transfer capability and the master device not having the synchronous transfer capability are included in one system. Can be mixed in.

(Second Embodiment) This embodiment is a method for simplifying the exchange of signals between devices to perform synchronous transfer or asynchronous transfer.

In the system configuration of FIG. 1, when it is confirmed by the information exchange between the master device 2 and the slave device 3 that the mutual devices have the synchronous transfer capability, the slave device 3 at the time of data transfer. Is
The return of the response signal ack to the signal ds indicating that the data has been determined is omitted, and the data is directly fetched. The master device 2 does not monitor the signal ack,
The data transfer is performed while holding the signal ds indicating that the data is fixed for a certain hold time.

With this method, the slave device 3 does not need to perform the operation of returning the signal ack when transferring data. Also, the master device 2 receives the signal ack
Eliminates the need to monitor By omitting the generation and monitoring of these signals, it is possible to transfer data as fast as the device's data transfer capability allows.

Next, in the data transfer between the master device 2 and the slave device 4, if it is confirmed that the slave device 4 does not have the synchronous transfer capability, the slave device 4 uses the asynchronous method to transfer the data. Take in.

It should be noted that, as in the first embodiment, one master device has two slave devices depending on the transfer method.
Supports one transfer mode. Further, slave devices having the synchronous transfer capability and slave devices not having the synchronous transfer capability can be mixed in one system.

(Third Embodiment) In the first and second embodiments, the master device outputs the address and the data every time to transfer the data by the synchronous transfer method. Speeding up is limited by the exchange of signals.

In this embodiment, when data is synchronously transferred to consecutive addresses, the address output is set to the first 1
Only once, and after that, only the data is transferred to further increase the speed. This transfer mode is called synchronous block transfer.

This synchronous block transfer mode enables a block transfer of data by adding a function of incrementing the address of the data by itself each time the slave device receives the data from the address received first.

The slave device having the block transfer function outputs the signal ac indicating that it has the block transfer function during the block transfer period, and the master device continuously outputs the data while monitoring the signal ac. This enables block transfer in the synchronous transfer mode.

The protocol for this synchronous block transfer is as follows.

(1) The master device determines the data on the bus, and then the signal ds indicating that the data has been determined.
Is output.

(2) In the synchronous transfer mode, the signal ds
The slave device receiving the data captures the data.
Also, slave devices with block transfer capability are
Continue to output the signal ac.

(3) The master device stops outputting the signal ds after holding a certain hold time without monitoring the signal ack.

(4) The master device receiving the output of the signal ac determines the next data on the bus and then outputs the signal ds indicating that the data has been determined.

(5) The above-mentioned operations (1) to (4) are repeated, and the slave device which has reached the block transferable data transfer capacity stops outputting the signal ac.

(6) The master device which has received the output of the signal ac ends the data transfer cycle.

With such a synchronous block transfer, data can be transferred at a high speed by the synchronous transfer to the slave device having the synchronous transfer capability, and if the block transfer mode is provided, the transfer speed is further increased. Data can be transferred to.

By performing asynchronous transfer to a slave device that does not have the synchronous transfer capability, one master device can support three operation modes by the slave device.

Data transfer between a slave device having a synchronous transfer capability and a block transfer mode and a slave device not having the block transfer mode, and a slave device having no synchronous transfer capability are 1 It can be mixed in one system.

[0046]

As described above, according to the present invention, the data transfer is automatically switched to the synchronous transfer or the asynchronous transfer by the capability exchange between the master device and the slave device as to whether or not they have the synchronous transfer capability. Because
It is possible to perform high-speed data transfer to a slave device having a synchronous transfer capability by a synchronous transfer in which a part of signal exchange is omitted without deteriorating the versatility of the bus.

Further, according to the present invention, when it is confirmed that the device has the synchronous transfer capability, the exchange of signals for data transfer is partially omitted, so that the data transfer capability of the device permits. Data can be transferred at high speed.

Further, according to the present invention, the data transfer can be further speeded up by the block transfer function in synchronously transferring the data to successive addresses of the slave device.

[Brief description of drawings]

FIG. 1 is a diagram illustrating a data transfer method switching method according to an embodiment of the present invention.

[Explanation of symbols]

 1 ... Data transfer bus 2 ... Master device 3 ... Slave device having synchronous transfer capability 4 ... Slave device not having synchronous transfer capability 5 ... Slave device not responding

Claims (3)

[Claims] 1. In data transfer using a data transfer bus between a master device that is a data transfer source and a slave device that receives data in a synchronous or asynchronous manner, the master device assigns an address of the slave device. In parallel with the output, a signal pas indicating that the address is output and a signal ds for synchronous / asynchronous transfer capability exchange are output, and the slave device having the synchronous transfer capability outputs the signal When pas is received, a signal ac indicating that an address has been received is output, and when a signal ds is received, a signal ack indicating that it has a synchronous transfer capability is output, and synchronous transfer is performed. The slave device having no capability receives only the signal pas and outputs the signal ac indicating that the address has been received. Then, the process of receiving data by the normal asynchronous transfer method of the bus is started, and the master device performs the data transfer by the synchronous transfer method to the slave device that outputs the signal ack, and does not output the signal ack. The data transfer method is characterized in that data is transferred to the slave device by an asynchronous transfer method. 2. When it is confirmed that the master device and the slave device have the capability of synchronous transfer with each other, the slave device omits returning the signal ack at the time of data transfer and directly transfers the data. Capture,
2. The data transfer method according to claim 1, wherein the master device performs data transfer by holding the signal ds for a certain hold time without monitoring the signal ack. 3. When the data is synchronously transferred to successive addresses of the slave device, the slave device is provided with a function of incrementing the address of the data itself each time the data is received from the first received address. , And continuously outputting a signal ac indicating that the master device has a block transfer function, and the master device performs block transfer to continuously output data while monitoring the signal ac. Or the data transfer method described in 2.