JP2953362B2 - LAN switching device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a switching device for a LAN, and more particularly to a switching device for an Ethernet communication device (in particular, a hub).

[0002]

2. Description of the Related Art At present, a LAN (Local Area) is used.
Network (Ethernet, a registered trademark of Xerox Corporation) is one of the systems widely used in the Internet. In Ethernet, collision occurs when transmission from terminal A to E and transmission from terminal B to D occur simultaneously as shown in FIG. This is an essential part of the Ethernet method, and the impact of this collision is 10 Mb / s.
It is said that practically only about 30% of the bandwidth can be used. To solve this, as shown in FIG.
A method is conceivable in which a switching device Sw is provided to switch Ethernet packets like a telephone exchange. According to this, a plurality of transmissions can be simultaneously performed without collision.

[0003] As a method of realizing the Ethernet switching, "COMPUTER NETWORK" is used.
SWITCHING SYSTEM "(U.S. Pat. No. 5,274,631) is proposed. As shown in FIG. 4, each port of a switching device Sw is provided with packet processors 91 to 97, and the packet processors 91 to 97 are provided. A high-speed switching is realized by providing a receiving buffer and a selecting unit for selecting a port to be transmitted, respectively, in the figure, where 90 is a multiplex logic unit, 98 is a system processor, 98 is a system processor, 99 is a network interface.

[0004]

However, such a system requires a reception buffer for each port and means for selecting which port to transmit to, and is expensive. Therefore, it is considered that a less expensive LAN switching device can be provided by sharing a reception buffer for storing received data from all ports and an address filter unit for deciding which port to transmit to all the devices.
However, the Ethernet packet length is variable.
So, secure the receive buffer according to the longest packet and
In such a case, the use efficiency of the reception buffer is reduced. Therefore,
In the present invention, the use efficiency of the shared reception buffer is improved.
The purpose is to make

[0005]

According to the present invention, in order to solve the above-mentioned problems, as shown in FIG. 1, a port receiving unit 1 connected to an Ethernet segment and receiving and buffering a packet is provided. A receiving buffer storing means 2 for storing packets from a plurality of port receiving units 1 in a receiving buffer 3 and transmitting the storage addresses to an address filtering unit 4, a receiving buffer 3 for storing received packets by the receiving buffer storing means 2. The source address and destination address of the received packet are read from the reception buffer 3 based on the storage address information transmitted from the reception buffer storage means 2 to determine the destination port of the packet, and the storage address and destination of the packet are determined. Port to transmit buffer storage means 5
To the port transmission buffer 61 of the port transmission unit 6 of the transmission port to which the packet is to be transmitted from the reception buffer 3 based on the packet storage address and the destination port information from the address filter unit 4. from the reception buffer 3 transfers the packet transmission buffer storing means 5, LAN switching device which consists of an Ethernet segment to a connected port transmitter 6 for transmitting the data in the port transmit buffer 61 met
In the reception buffer storage means 2, the port receiving unit 1
Packet length information from the buffer inside the
Judge the required amount of receive buffer from the
Characterized in that a means for storing the packet in 3 is provided.
Things. In addition, as another means to solve the same problem,
And the receiving buffer 3 is composed of blocks of a certain length.
It has a list structure,
The receive buffer is divided into a fixed length
Means for storing data in the transmission buffer storage means 5.
Hand for extracting packets from the reception buffer 3 having a list structure
A step is provided . According to the above configuration, when a packet is received by the port receiving unit 1, the packet is stored in the reception buffer 3 by the reception buffer storage unit 2. The reception buffer storage unit 2 notifies the address storage unit 4 of the storage address of the packet. The address filter unit 4 extracts the source address and the destination address of the packet stored in the packet from the stored address information, searches the address table for the destination address, and sends this packet to any port. Know what to do. Furthermore, by registering the information of the source address and the receiving port in the address table, it is possible to know which terminal has which address is connected to which port. Next, the storage address of this packet and the information to which port the packet should be sent are informed to the transmission buffer storage means 5. The transmission buffer storage means 5 transfers the contents of the packet from the storage address to the transmission buffer 6 of the port to be transmitted. The port transmission unit 6 transmits the packet in the transmission buffer 61 to the Ethernet. By the above operation,
It becomes possible to switch Ethernet packets. Also, in the reception buffer storage means 2,
The packet length information is obtained from the buffer in the
The required reception buffer amount is determined from the information,
Providing means for storing packets in the communication buffer 3
Thus, the use efficiency of the reception buffer 3 is improved. There
Configures the reception buffer 3 from blocks of a fixed length.
It has a list structure,
The receive buffer is divided into a fixed length
Means for storing data in the transmission buffer storage means 5.
Hand for extracting packets from the reception buffer 3 having a list structure
Providing stages allows efficient use of receive buffer 3
can do.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below. FIG. 1 shows a basic configuration of the present invention. In the figure, a receiving unit 11 is an interface unit connected to an Ethernet segment. Receiver 1
Packets coming in from port 1
Is stored in The receiving unit 11 and the port receiving buffer 1
2 is connected to each port. Apart from this port reception buffer 1, 1
One receiving buffer 3 is provided. All packets are stored in the reception buffer 3.

Since packets to each port arrive asynchronously, it is necessary to store data in the reception buffer 3 while synchronizing each port reception unit 1 with the reception buffer storage means 2.
The role of. By making the band from the reception buffer storage unit 2 to the reception buffer 3 sufficiently larger than the band from the port reception unit 1 to the reception buffer storage unit 2, the port reception buffer 12 has a small buffer amount (asynchronous input). Can be stored in the reception buffer 3 without losing the packet by the amount of buffer necessary for synchronizing the operation of the reception buffer storage means 2). Rather than providing a large buffer for each port, it is better to provide one large buffer intensively and provide a small buffer for each port to absorb the asynchrony, since the use efficiency of the buffer is increased. As a result, the required buffer amount is small.

When the packet is stored in the reception buffer 3, the reception buffer storage unit 2 informs the address filter unit 4 of the storage address and the reception port number where the packet has entered. The address filter unit 4 extracts only the source address and the destination address from the reception buffer 3 based on the storage address. FIG. 5 shows the address filter unit 4.
There is a table composed of an address and a port number as shown in the table. By referring to this table, it is possible to know which device of which address is connected to which port. FIG. 6 shows a flowchart of a main process of the address filter unit 4.

First, a search is made for a source address in the table (# 41), and if not found, the address and the receiving port number are newly registered in the table (# 42). Even if the source address is found, if the port number is different from the receiving port number registered in the table, it is assumed that the device has moved and the connection port has been changed, so the receiving port number should be replaced with the port number. Re-register (# 43). Further, processing equivalent to the address learning of the bridge such as aging is performed. Next, a search is made to see if the destination address is in the table (# 44).
If the destination address is not found, it is not possible to specify which port to send the packet to, so all ports except the receiving port are set as the destination (# 45). When the transmission destination address is found, the port number is compared with the reception port number (# 46), and when different, the port number is set as the transmission destination (# 47). When the port number matches the reception port number, the packet is deleted from the reception buffer 3 and discarded (# 4) because the communication is on the same segment and it is not necessary to send the packet to another port.
8).

When the destination port is determined, except when the packet is discarded by the address filter unit 4, the address filter unit 4 informs the transmission buffer storage unit 5 of the storage address and the destination port number. Transmission buffer storage means 5
Transfers the contents of the packet from the reception buffer 3 to the port transmission buffer 61 in the port transmission unit 6 of the destination port. The port transmission unit 6 transmits the packet in the port transmission buffer 61 through a transmission unit 62 which is an interface with an Ethernet segment.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Various embodiments of the present invention will be described below. First, FIG. 7 is a configuration diagram of the first embodiment of the present invention.
In the basic configuration shown in FIG. 1, all the received data is stored in the receiving buffer 3 once. However, when there is a lot of communication within one segment connected to the port, the number of packets that are once stored in the reception buffer 3 but discarded by the address filter unit 4 increases, and the capacity of the reception buffer 3 and the reception buffer storage The band between 2 and the receiving buffer 3 is wasted.

Therefore, in the first embodiment of the present invention, a local address filter 13 is provided in the port receiver 1 as shown in FIG. This is an address filter having only an address of a terminal connected to the port as an address table, and a packet between the ports is discarded by the local address filter. Since the purpose of this local address filter is to reduce the load at the subsequent stage, it is not necessary to perform a complete filtering process. That is, even if the address table is made smaller, there is a certain effect. For example, even if the address table is limited to one address, if transmission between the same terminals is continued as in file transfer, the first one packet cannot be discarded, but the subsequent consecutive packets can be discarded. The purpose of reducing the load at the subsequent stage can be achieved. For this reason, the local address filter 13 can be realized at low cost, the capacity of the reception buffer 3 can be reduced, and the efficiency of the band between the reception buffer storage means 2 and the reception buffer 3 can be improved.

FIG. 8 is a configuration diagram of a comparative example for the present invention. As described above, in the present invention, there is one feature in that the reception buffer 3 is shared in the apparatus, and the configuration of the reception buffer 3 is important to take advantage of this feature. FIG.
In the comparative example shown in (1), in order to reduce the capacity of the port reception buffer 12, a packet is divided and stored in a fixed length cell as shown in FIG. A buffer for two cells is prepared in the port reception buffer 12. When one cell is stored, the reception buffer storage means 2 stores the reception buffer 3
Transfer the cell to In this method, cell transfer is started when all packets have not been received yet, so that the packet length is unknown. However, if the reception buffer 3 is divided into blocks for each maximum packet length and packets are stored in units of this block, transfer is possible without knowing the packet length in advance. This method has the advantage that the port reception buffer 12 for each port is small and the transfer can be started during the reception of the packet, so that the processing delay is reduced. However, the reception buffer 3 is blocked by the maximum packet length. Therefore, there is a disadvantage that the use efficiency of the reception buffer 3 is reduced. The present invention seeks to solve this problem
Is what you do.

FIG. 9 is a block diagram of a second embodiment of the present invention. In the present embodiment, in order to improve the use efficiency of the reception buffer 3, a maximum packet length of 2 packets is prepared as the port reception buffer 12. When one packet is completely received, the receiving buffer storage unit 2 secures the receiving buffer 3 for the packet length as shown in FIG. 9 and transfers the packet. This method has the advantage that the use efficiency of the reception buffer 3 is improved, but the port reception buffer 12 for each port becomes large, and transfer cannot be started until packet reception is completed, so that processing delay increases. There are disadvantages.

FIG. 10 shows that the use efficiency of the reception buffer 3 can be increased in spite of the cell transfer.
This is a third embodiment shown in FIG. In this embodiment, the reception buffer 3 is divided in units of cells, and each cell has a list structure. For example, packets received at the first port are stored at addresses 1 and 4, and packets received at the second port are stored at addresses 2 and 5, 7, and 9; Packets received at the third port are stored at addresses 3, 6, and 8. By realizing the reception buffer 3 with such a list structure, data can be stored in units of cells, and the use efficiency of the reception buffer 3 is improved.

FIG. 11 shows a detailed structure of the receiving buffer 3 in this embodiment. The cell buffer 31 is composed of a CELL unit for storing the contents of an actual packet formed into cells, and a PNEXT unit for storing a pointer to the next cell. The pointer to the empty cell buffer 31 is stored in the pointer table 32. The pointer table 32 has a ring buffer configuration and has a start position BEGIN.
From the end position END to the end position END are valid. PHEAD of the pointer table 32 points to the head of an empty cell.

FIG. 1 shows the processing by the reception buffer storage means 2.
It is shown in FIG. The reception buffer storage unit 2 stores the packets from the port reception buffer 12 into cells in the reception buffer 3. It is assumed that the initial state of the reception buffer 3 until the packet is stored is as shown in FIG. First, the start address i of the vacant cell buffer 31 is read from the pointer table 32, the start position BEGIN of the table is incremented by one, and one cell from the port reception buffer 12 is transferred to the CELL part of the address i read from the table. Minutes. The state of the receiving buffer 3 after the transfer of one cell is as shown in FIG. 14, and the cell 1 at the address i is transferred to the cell. The PNEXT part following the CELL part of the i-th address is the address j of the next cell.
Therefore, one cell is transferred from the port receiving buffer 12 to the cell at the address j again. As a result, CELL2 is transferred to the cell portion at address j as shown in FIG. In the PNEXT part following the cell part at address j, there is an address k of the next cell.
The transfer is performed for one cell from the port reception buffer 12 to the unit. As a result, as shown in FIG.
ELL3 is transferred. The PNEXT part following the CELL part at the k address has no address of the next cell. This state is described as NIL in the figure. Thus, PNE on the way
When the contents of the XT section become NIL, there is no more cell list, so a new PHEAD is read from the pointer table 32, and the PNEXT section is reconnected and the remaining part is transferred. In FIG. 15, P at the start position BEGIN of the pointer table 32 is shown.
Since the address m is written in the HEAD section, m
The list is added from the address. FIG. 16 shows a state in which this list is added. If the PNEXT part is NIL when the transfer of all the cells for one packet is completed, the cell list has just been used up. However, if the next list still remains, it is necessary to make the remaining part usable as an empty cell. Therefore, as shown in FIG. 17, the remaining part (here, PNEXT following the cell part at address m) is used.
Since the part points to address n, the part after address n)
Is added to the pointer table 32, and the end position END of the pointer table 32 is incremented by one. After the transfer to the port transmission buffer 61, in order to empty the reception buffer 3, it is only necessary to register the head address of this cell in the pointer table 32.

As described above, in this method, the handling of the list structure becomes complicated, and an extra memory for storing the address of the next cell is required. However, it is not necessary to know the packet length in advance.
The reception buffer 3 can be used efficiently by wasting only one cell buffer per packet at most.

In the above-described system, each time the port receiving unit 1 receives a packet, or when one packet does not fit in the buffer having the list structure, the port receiving unit 1 sequentially stores the received buffer in the receiving buffer storage unit 2. 3 to obtain the cell address. For this reason, the time spent for capturing is increased, and the time spent for actual data transfer is reduced.
Therefore, according to the third aspect of the present invention, as shown in FIG. 18, a reception buffer list storage unit 14 for storing a plurality of reception buffer cell addresses of cellized reception buffers in each port reception unit 1 is provided. Provided. In this case, the configuration of the reception buffer 3 is as shown in FIG. FIG.
The reception buffer shown in FIG.
In addition to 1 and the pointer table 32, a count data section 33 of the remaining number of the reception buffer list is provided. cell·
The buffer 31 includes a CELL unit for storing received data obtained by converting actual packets into cells, and a PNEXT unit for storing a pointer (link cell address) to the next cell. ,..., K−1, k are provided. Further, the pointer table 32 stores a reception data buffer cell address indicating a head pointer PHEAD of the cellized reception data. The remaining number of the reception buffer list indicating the vacancy of the pointer table 32 is stored in the count data section 33.

Next, the state of communication between the port receiving section 1 and the receiving buffer storage means 2 is shown in FIG. The port receiving unit 1 checks whether the receiving buffer address stores a certain fixed number of addresses in the receiving buffer list storage unit 14. If the number is less than the predetermined number, a request is made to the reception buffer storage means 2 to acquire an address. The receiving buffer storage unit 2 gives permission to the port receiving unit 1. The port receiving unit 1 captures the remaining number of the reception buffer list from the reception buffer 3 and checks whether or not the reception buffer address list remains. If there is a remaining number in the reception buffer list, the reception buffer address is fetched from the reception buffer address list formed in the pointer table 32 and stored in the reception buffer list storage unit 14 of the port reception unit 1. The number obtained by subtracting from the remaining number in the reception buffer list is returned to the reception buffer 3. When the packet is received by the port receiving unit 1, the packet is converted into a cell, and the cellized data is transferred to the reception buffer 3 based on the reception data buffer address previously stored in the reception buffer list storage unit 14.

The cell buffer 31, which is the reception data buffer of the present embodiment, has a cell-structured list structure as described above, and if a packet that does not fit into one list comes, the next list Are connected and stored.
When the received data cell does not fit in this one list, it has a fixed received data cell address in the reception buffer list storage unit 14 in advance. 20 and 21 show the specific procedure. The reception buffer list storage unit 14 of the port reception unit 1 stores
3 shows a reception data buffer cell address in the buffer 31. The remaining number of the reception buffer list is an offset value of the pointer table 32. Since the reception buffer list storage unit 14 of the port reception unit 1 is initially empty, the remaining number of the reception buffer list is read from the reception buffer storage unit 2 to determine whether or not the pointer table 32 has a cell address. If there is a cell address, two addresses [0, 1] are taken into the reception buffer list storage unit 14. Add 2 to the remaining number of the reception buffer list and rewrite it to a value indicating the position of the next address list.

Next, when a packet having a size of, for example, six cells is received when the cell is formed, the port receiver 1 writes the cellized data from the reception buffer list storage 14 to the reception data buffer cell address. . Since the first specified address is 0, C from address 0
The cellized received data is written in the ELL section, and the link cell address (PNEXT section) is read. Then, since the next address i is specified, next, the cellized received data is written into the CELL part from the address i, and the link cell address (PNEXT part) is read. Then, since the next address ii is specified, next, the address ii
Write the cellized received data to the CELL section from
Read the link cell address (PNEXT part). Then
Since it is recorded that there is no subsequent link address (Nil), the next reception data buffer cell address (= 1) is read from the reception buffer list storage unit 14, and
The link cell address (PNEXT section) following the CELL section of the address ii of the reception data buffer is rewritten from Nil to address 1, the cellized reception data is written in the CELL section from address 1, and the link cell address (PNEXT section) is written. Read. Then, since the next address j is specified, next, the cellized received data is written into the CELL part from the address j, and the link cell address (PNEXT part) is read. Then, the next address jj
Is specified, next, CE from address jj
The cellized received data is written in the LL section, and the link cell address (PNEXT section) is read. Then, since it is recorded that there is no subsequent link address (Nil), it means that the list-format data buffer for exactly 6 cells has been used up.

The state of communication between the port receiving unit 1 and the receiving buffer storage means 2 is shown on the time axis. In the previous embodiment, in order to take in the address of the receiving buffer, as shown in FIG. , An acquisition request phase, an address phase, a data phase, and an acquisition release phase are required. However, according to the method of the present embodiment, as shown in FIG. If it is executed N times to capture, (N-1)
Since the acquisition request phase, the address phase, and the acquisition release phase can be omitted, the communication time is shortened as a whole. That is, the number of accesses to the reception buffer 3 can be reduced, and the execution time for each port reception unit 1 to perform data transfer with the reception buffer storage unit 2 is shortened.

[0024]

According to the first to fourth aspects of the present invention, a reception buffer for storing data received from a port of each segment of the Ethernet and an address filter unit for deciding which port to transmit to are shared by the entire equipment. By
There is an effect that an inexpensive Ethernet switching device can be provided.

Further, according to the invention of claim 1, when a packet is received entirely one packet, the receiving buffer storage means, so forwards the packet to secure the receive buffer by that packet length, the reception buffer There is an effect that the use efficiency is improved.

[0026] Incidentally, as in the comparative example of FIG. 8 receive buffer
If the packet is stored in units of a fixed packet length and the packets are stored in units of blocks, it is possible to transfer the packet even if the packet length is not known in advance. since it begins forwarding, but can reduce the processing delay, in the present invention
Focuses more on the efficiency of using shared receive buffers
Is what it is.

According to the second aspect of the present invention, the reception buffer has a list structure composed of blocks of a fixed length, and the reception buffer storing means divides the packet into fixed fixed lengths and stores the packets in the reception buffer having the list structure. As a result, there is no need to know the packet length in advance.
There is an effect that the reception buffer can be used efficiently.

According to the third aspect of the present invention, by fetching a large number of received data buffer cell addresses at once into the port receiving section, it is possible to quickly process a list of packets that cannot be stored in the buffer having the list structure. This has the effect of becoming Further, the number of times of access to the reception buffer can be reduced, and there is an effect that the execution time in which each port receiving unit communicates with the reception buffer storage unit is shortened.

According to the fourth aspect of the present invention, the packets in the same segment can be discarded by the local address filtering means, so that the capacity of the reception buffer can be reduced and the bandwidth between the reception buffer storage means and the reception buffer can be reduced. There is an effect that efficiency can be improved.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a basic configuration of the present invention.

FIG. 2 is an explanatory diagram showing a state of collision due to simultaneous transmission in Ethernet.

FIG. 3 is an explanatory diagram showing the principle of a switching device in Ethernet.

FIG. 4 is a block diagram of a conventional switching device in Ethernet.

FIG. 5 is a diagram showing a configuration of an address table used in the present invention.

FIG. 6 is a flowchart showing processing contents of an address filter unit used in the present invention.

FIG. 7 is a block diagram illustrating a configuration of a first exemplary embodiment of the present invention.

FIG. 8 is a block diagram showing a configuration of a comparative example for the present invention.

FIG. 9 is a block diagram showing a configuration of a second exemplary embodiment of the present invention.

FIG. 10 is a block diagram showing a configuration of a third embodiment of the present invention.

FIG. 11 is a diagram illustrating a configuration of a reception buffer according to a third embodiment of the present invention.

FIG. 12 is a flowchart showing a process of storing data in a reception buffer according to a third embodiment of the present invention.

FIG. 13 is an explanatory diagram showing an initial state of a reception buffer according to a third embodiment of the present invention.

FIG. 14 is an explanatory diagram illustrating a second state of the reception buffer according to the third embodiment of this invention.

FIG. 15 is an explanatory diagram illustrating a third state of the reception buffer according to the third embodiment of this invention.

FIG. 16 is an explanatory diagram illustrating a fourth state of the reception buffer according to the third embodiment of this invention.

FIG. 17 is an explanatory diagram illustrating a fifth state of the reception buffer according to the third embodiment of this invention.

FIG. 18 is a block diagram showing a configuration of a fourth embodiment of the present invention.

FIG. 19 is an explanatory diagram illustrating a configuration of a reception buffer according to a fourth embodiment of the present invention.

FIG. 20 is an explanatory diagram showing a state of communication between a port receiving unit and a receiving buffer storage unit according to a fourth embodiment of the present invention.

FIG. 21 is an explanatory diagram showing a process of storing data in a reception buffer according to a fourth embodiment of the present invention.

FIG. 22 is an explanatory diagram showing a communication format between a port receiving unit and a receiving buffer storage unit according to a third embodiment of the present invention.

FIG. 23 is an explanatory diagram showing a communication format between a port receiving unit and a receiving buffer storage unit according to a fourth embodiment of the present invention.

Continuation of the front page (56) References JP-A-8-265341 (JP, A) JP-A-8-18571 (JP, A) JP-A-7-336379 (JP, A) JP-A-7-202905 (JP) JP-A-7-87100 (JP, A) JP-A-4-320128 (JP, A) JP-A-4-175034 (JP, A) JP-A-4-68934 (JP, A) 62-97490 (JP, A) JP-A-62-32797 (JP, A) U.S. Pat. No. 5,784,373 (US, A) Transactions of the Institute of Electronics, Information and Communication Engineers B-I Vol. J72-B-I, No. 11, 1989, Haruo Kitamura, "A Consideration of ATM Switch with Common Buffer Type", page s. 1070-1075 IEICE technical report, IN 88-120, Haruo Kitamura, "Study of common buffer type ATM exchange switch", page s. 19-23 IEICE Technical Report, SSE 90-35, Yamanaka Hideaki, et al. "Split Common Buffer ATM Switch", pages. 25-30 Matsushita Electric Works Technical Report No. 56, Sep. 1996, Masami Ohno et al., "Development of Easy Mount Type Master / Slave HUB", pages. 3-8 Matsushita Electric Works Technical Report No. 49, Dec. 1994, Atsushi Ogawa et al., "Trends in Information Wiring Systems in Buildings", pages. 51-57 (58) Field surveyed (Int. Cl. ⁶ , DB name) H04L 12/28 H04L 12/56 G06F 12/00 JICST file (JOIS) WPI (DIALOG)

Claims (4)

(57) [Claims] 1. A port receiving unit connected to an Ethernet segment for receiving and buffering packets, a receiving buffer storing packets from a plurality of port receiving units in a receiving buffer, and transmitting the storage address to an address filter unit. A storage unit, a reception buffer for storing the reception packet by the reception buffer storage unit, and a source address and a destination address of the reception packet read from the reception buffer based on the storage address information transmitted from the reception buffer storage unit. An address filter unit that determines the destination port of the packet and transmits the storage address of the packet and the destination port to the transmission buffer storage means; and stores the packet from the reception buffer based on the packet storage address and the destination port information from the address filter unit. Of the transmission port of the transmission port to which the A transmission buffer storing means for transferring the packet from the reception buffer to the port transmission buffer, and a port transmission unit connected to an Ethernet segment for transmitting data in the port transmission buffer.
Switching device for a LAN , comprising a receiving buffer
In the buffer storing means, the buffer in the port receiving unit is
Obtain information on the length of the packet and receive
Determine the buffer amount and store the packet in the receive buffer.
A switching device for a LAN. 2. A port receiving unit connected to an Ethernet segment for receiving and buffering packets, and a receiving buffer for storing packets from a plurality of port receiving units in a receiving buffer and transmitting the storage addresses to an address filter unit. A storage unit, a reception buffer for storing the reception packet by the reception buffer storage unit, and a source address and a destination address of the reception packet read from the reception buffer based on the storage address information transmitted from the reception buffer storage unit. An address filter unit that determines the destination port of the packet and transmits the storage address of the packet and the destination port to the transmission buffer storage means; and stores the packet from the reception buffer based on the packet storage address and the destination port information from the address filter unit. Of the transmission port of the transmission port to which the A transmission buffer storing means for transferring the packet from the reception buffer to the port transmission buffer, and a port transmission unit connected to an Ethernet segment for transmitting data in the port transmission buffer.
Switching device for a LAN , comprising a receiving buffer
Is a list structure composed of blocks of a certain length,
A fixed fixed length packet in the receiving buffer storage means
And store it in a list-structured receive buffer.
And a list-structured reception buffer in the transmission buffer storage means.
Means for extracting packets from the
LAN switching devices that. 3. The LAN switching device according to claim 2 , wherein the port receiving unit is provided with a receiving buffer list storing unit for storing a plurality of receiving buffer cell addresses of the cellized receiving buffer. 4. A local address filtering means for judging whether or not packet communication is performed within a segment connected to the port and discarding the packet when communication is performed within the segment is provided in the port receiving section. L according to any one of claims 1 to 3, wherein
AN switching device.