JPH08293875A - Lan switching equipment - Google Patents

Abstract

PURPOSE: To reduce the cost of an equipment by sharing a reception buffer storing reception data from the port of each segment of 'Ethernet(R)' and an address filter part deciding which port to transmit data to with the whole equipment. CONSTITUTION: A packet from a reception part 11 is stored in a port reception buffer 12 in a port reception part 1 connected with the segment of 'Ethernet(R)', and the reception buffer 3 and the address filter part 4 shared with the whole equipment are provided. A reception buffer storage means 2 stores a packet incoming asynchronously in the buffer 3 without losing while synchronizing with a reception part 1. The address filter part 4 retrieves a table, discriminates the port of a transmission destination, sends the packet to the transmission destination and deletes unnecessary packet from the buffer 3 so as to abolish. A transmission buffer storing means 5 transmits a packet addressed to the transmission destination through a port communication part 6. Thereby the filter part and the buffer are used in common to reduce the capacity of the buffer 3 and the cost of the equipment.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a LAN switching device, and more particularly, it is used for an Ethernet communication device (especially HUB).

[0002]

2. Description of the Related Art Currently, LAN (Local Area)
Ethernet (Ethernet, a registered trademark of Xerox Co., Ltd.) is one of the methods widely used in the network. In Ethernet, a collision occurs when transmission from terminals A to E and transmission from terminals B to D occur simultaneously as shown in FIG. This is the essence of the Ethernet method, and the impact of this collision is 10 Mb / s.
It is said that substantially 30% of the above band can be used. In order to solve this, as shown in FIG.
A method is conceivable in which a switching device Sw is provided and Ethernet packets are switched like a telephone exchange. This allows multiple transmissions simultaneously without collisions.

As a method for realizing this Ethernet switching, "COMPUTER NETWORK"
SWITCHING SYSTEM "(U.S. Pat. No. 5,274,631) has been proposed. As shown in FIG. 4, the packet processors 91 to 97 are provided at the respective ports of the switching device Sw, and the packet processors 91 to 97 are proposed. High-speed switching is realized by providing a receiving buffer and selecting means for transmitting to which port, respectively, in the figure, 90 is a multiplexing logic unit (multiplex logic), 98 is a system processor, 99 is a network interface.

[0004]

However, in such a system, a receiving buffer for each port and a means for selecting which port to transmit to are required, which is expensive. In view of this, the present invention provides a cheaper LAN switching device by sharing a reception buffer that stores reception data from all ports and an address filter unit that determines to which port the data is transmitted, as a whole. It is intended.

[0005]

According to the present invention, in order to solve the above problems, as shown in FIG. 1, a port receiving unit 1 connected to an Ethernet segment for receiving and buffering packets is provided. , A reception buffer storage unit 2 for storing packets from a plurality of port reception units 1 in the reception buffer 3 and transmitting the storage addresses to the address filter unit 4, and a reception buffer 3 for storing reception packets by the reception buffer storage unit 2. , The source address and destination address of the received packet are read from the reception buffer 3 based on the storage address information transmitted from the reception buffer storage means 2, the destination port of the packet is determined, and the storage address and destination of the packet are determined. Port to send buffer storage means 5
To the port transmitting buffer 61 of the port transmitting unit 6 of the transmitting port to which the packet is to be transmitted from the receiving buffer 3 based on the packet storage address and the destination port information from the address filtering unit 4. The transmission buffer storage means 5 for transferring the packet from the reception buffer 3 and the port transmission unit 6 connected to the Ethernet segment for transmitting the data in the port transmission buffer 61 are characterized by being characterized. . According to the above configuration, when the packet is received by the port reception unit 1, the reception buffer storage unit 2 causes the reception buffer 3
Stored in. The reception buffer storage means 2 informs the address storage unit 4 of the storage address of the packet. The address filter unit 4 extracts the source address and the destination address of the packet stored in the packet from the stored address information, searches the destination address in the address table, and sends the packet to which port. Know what to do. Further, by registering the information of the source address and the receiving port in the address table, it becomes possible to know which port is connected to which terminal having which address. Next, the storage address of this packet and the information indicating to which port it should be sent are stored in the transmission buffer storage means 5.
Teach to The transmission buffer storage means 5 is a transmission buffer 6 of a port from which the contents of the packet should be transmitted from the storage address.
Transfer to The port transmitter 6 transmits the packet in the transmission buffer 61 to the Ethernet. With the above operation, it is possible to switch Ethernet packets.

[0006]

BEST MODE FOR CARRYING OUT THE INVENTION Preferred embodiments of the present invention will be described below. FIG. 1 shows the basic configuration of the present invention. In the figure, the receiving unit 11 is an interface unit connected to an Ethernet segment. Receiver 1
The packet received from 1 is received by the port reception buffer 12
Stored in. This receiving unit 11 and port receiving buffer 1
A port receiving unit 1 composed of 2 and 2 is connected to each port. Apart from this port receive buffer 1, 1
One reception buffer 3 is provided. All packets are stored in this reception buffer 3.

Since the packets to each port arrive asynchronously, the data is stored in the reception buffer 3 while the reception units 1 are synchronized with each other.
Is the role of. By setting the bandwidth from the reception buffer storage unit 2 to the reception buffer 3 to be sufficiently larger than the bandwidth from the port reception unit 1 to the reception buffer storage unit 2, the port reception buffer 12 receives a small buffer amount (asynchronous input). It is possible to store the packet in the receiving buffer 3 without loss by the buffer amount required for synchronizing with the operation of the receiving buffer storing means 2. Rather than providing a large buffer for each port, it is more efficient to use one large buffer intensively and a small buffer for each port to absorb the asynchronism. As a result, a small amount of buffer is required.

When the packet is stored in the reception buffer 3, the reception buffer storage means 2 notifies the address filter section 4 of the storage address and the reception port number of the packet. The address filter unit 4 fetches only the source address and the destination address from the reception buffer 3 based on this storage address. FIG. 5 shows the address filter unit 4.
There is a table consisting of addresses and port numbers as described above, and by referring to this table, it is possible to know which port is connected to which device. FIG. 6 shows a flowchart of the main processing of the address filter unit 4.

First, the source address is searched in the table (# 41), and if not found, the address and the receiving port number are newly registered in the table (# 42). If the source address is found but the port number is different from the receiving port number registered in the table, it is considered that the device has moved and the connection port has been changed, so the receiving port number is set to the port number. Re-register (# 43). Furthermore, processing equivalent to bridge address learning such as aging is performed. Next, it is searched whether the destination address is in the table (# 44).
When the destination address is not found, it is not possible to specify which port the packet is to be transmitted to, so all ports except the receiving port are set as the destination (# 45). When the destination address is found, the port number is compared with the receiving port number (# 46), and if different, the port number is designated as the destination (# 47). If the port number and the receiving port number match, the communication is on the same segment and it is not necessary to send to another port, so the packet is deleted from the receiving buffer 3 and discarded (# 4).
8).

When the destination port is determined, except when the packet is discarded by the address filter unit 4, the address filter unit 4 notifies the transmission buffer storage means 5 of the storage address and the destination port number. Transmission buffer storage means 5
Transfers the contents of the packet from the reception buffer 3 to the port transmission buffer 61 in the port transmission unit 6 of the destination port. The port transmission unit 6 transmits the packet in the port transmission buffer 61 through the transmission unit 62 which is an interface with the Ethernet segment.

[0011]

EXAMPLES Various examples of the present invention will be described below. First, FIG. 7 is a configuration diagram of a first embodiment of the present invention.
In the basic configuration shown in FIG. 1, all received data is once stored in the reception buffer 3. However, when there is a lot of communication within one segment connected to the port, a large number of packets are temporarily stored in the reception buffer 3 but are discarded by the address filter unit 4, and the capacity of the reception buffer 3 and the reception buffer storage means are increased. The band between 2 and the receiving buffer 3 is wasted.

Therefore, in the first embodiment of the present invention, the local address filter 13 is provided in the port receiving section 1 as shown in FIG. This is an address filter that has only the address of the terminal connected to that port as an address table, and the packet between its own ports is discarded by this local address filter. The purpose of this local address filter is to reduce the load in the subsequent stage, and therefore it is not necessary to perform a complete filtering process. In other words, even if the address table is made small, there is some effect. For example, even if the address table is limited to one address, when transmission between the same terminals is continued like file transfer, the first one packet cannot be discarded, but the subsequent consecutive packets can be discarded. The purpose of reducing the load in the subsequent stage can be achieved. For this reason, the local address filter 13 can be realized at low cost, the capacity of the reception buffer 3 can be reduced, and the efficiency of the band between the reception buffer storage means 2 and the reception buffer 3 can be improved.

FIG. 8 is a block diagram of the second embodiment of the present invention. As described above, the present invention has one feature in that the reception buffer 3 is shared within the device, and the configuration of the reception buffer 3 is important in order to utilize this feature. In the present embodiment, in order to reduce the capacity of the port receiving buffer 12, the packet is divided and stored in cells of a certain fixed length as shown in FIG. A buffer for two cells is prepared in the port reception buffer 12. When one cell is stored, the reception buffer storage means 2 transfers the cell to the reception buffer 3. In this method, the cell length is not known because the cell transfer is started when all the packets have not been received yet. However, if the receiving buffer 3 is divided into blocks for each maximum packet length and the packet is stored in this block unit, transfer is possible without knowing the packet length in advance. This method has the advantage that the port reception buffer 12 for each port can be small and transfer can be started during packet reception, thus reducing processing delay, but the reception buffer 3 is blocked with the maximum packet length. Therefore, there is a disadvantage that the use efficiency of the reception buffer 3 is reduced.

FIG. 9 is a block diagram of the third embodiment of the present invention. In this embodiment, in order to improve the use efficiency of the reception buffer 3, a maximum packet length of 2 packets is prepared as the port reception buffer 12. When one packet is received, the reception buffer storage unit 2 secures the reception buffer 3 for the packet length and transfers the packet as shown in FIG. This method has an advantage that the use efficiency of the reception buffer 3 is improved, but the port reception buffer 12 for each port becomes large, and since the transfer cannot be started until the reception of the packet is completed, the processing delay becomes large. There are disadvantages.

Therefore, it is possible to increase the use efficiency of the reception buffer 3 while transferring cells as shown in FIG.
4 is a fourth embodiment shown in FIG. In this embodiment, the reception buffer 3 is divided into cells, and each cell is constructed in a list structure. For example, the packet received at the first port is stored at addresses 1 and 4, and the packet received at the second port is stored at addresses 2, 5, 7, and 9. Packets received at the third port are stored at addresses 3, 6, and 8. By implementing the receiving buffer 3 with such a list structure, it becomes possible to store in a cell unit and the use efficiency of the receiving buffer 3 is improved.

FIG. 11 shows the detailed structure of the receiving buffer 3 in this embodiment. The cell buffer 31 is composed of a CELL section for storing the contents of the actual packetized cell and a PNEXT section for storing a pointer to the next cell. The pointer to the empty cell buffer 31 is stored in the pointer table 32. The pointer table 32 has a ring buffer structure and has a start position BEGIN.
The table from to end position END is valid. PHEAD of the pointer table 32 points to the beginning of an empty cell.

FIG. 1 shows the processing by the receiving buffer storage means 2.
It is shown in FIG. In the reception buffer storage means 2, the packets are stored in the reception buffer 3 from the port reception buffer 12 as cells. It is assumed that the initial state of the reception buffer 3 until the packet is stored is as shown in FIG. First, the head address i of the vacant cell buffer 31 is read from the pointer table 32, the start position BEGIN of the table is incremented by 1, and one cell is read from the port reception buffer 12 to the CELL portion of the i address read from the table. Transfer minutes. The state of the reception buffer 3 after the transfer of one cell is as shown in FIG. 14, and the CELL1 is transferred to the CELL portion of the address i. In the PNEXT portion following the CELL portion of the address i, the address j of the next cell
Therefore, one cell is again transferred from the port reception buffer 12 to the CELL portion of this address j. As a result, CELL2 is transferred to the CELL section at address j as shown in FIG. Since the PNEXT portion following the CELL portion of the jth address has the address k of the next cell, the CELL of this address k is restarted.
1 cell is transferred from the port reception buffer 12 to the unit. As a result, in the CELL section at address k, as shown in FIG.
ELL3 is transferred. There is no next cell address in the PNEXT section following the CELL section of this k address. This state is indicated as NIL in the figure. Like this, PNE on the way
When the content of the XT portion becomes NIL, it means that there is no more cell list. Therefore, a new PHEAD is read from the pointer table 32, and the PNEXT portion is reconnected to transfer the remaining portion. In FIG. 15, P of the start position BEGIN of the pointer table 32 is
Since the address m is written in the HEAD section, new m
The list is added from the street address. FIG. 16 shows how this list is added. If the PNEXT portion is NIL when all the cells for one packet have been transferred, it means that the list of cells has been completely used up. However, when the next list still remains, it is necessary to make the remaining part usable as an empty cell. Therefore, as shown in FIG. 17, the remaining part (here, PNEXT following the mELL CELL part) is used.
Since the part refers to the nth address, the part after this nth address)
Is added to the pointer table 32, and the end position END of the pointer table 32 is incremented by one. After the transfer to the port transmission buffer 61, the reception buffer 3 can be emptied by simply registering the head address of this cell in the pointer table 32.

As described above, in this method, the handling of the list structure becomes complicated and an extra memory for storing the address of the next cell is required, but it is not necessary to know the packet length in advance,
The reception buffer 3 can be used efficiently by simply wasting the buffer for one cell per packet at the maximum.

In the above-mentioned method, each port receiving section 1 successively receives the packet each time a packet is received, and when one packet cannot be stored in the list structure buffer, the reception buffer storage means 2 and the reception buffer. Obtain the cell address from 3. For this reason, the time spent for fetching becomes long and the time spent for actual data transfer becomes small.
Therefore, according to the invention of claim 6, as shown in FIG. 18, each port receiving unit 1 is provided with a reception buffer list storage unit 14 for storing a plurality of reception buffer cell addresses of the cellized reception buffer. It is provided. In this case, the configuration of the reception buffer 3 is as shown in FIG. FIG.
The receive buffer shown in FIG. 9 is the cell buffer 3 described above.
In addition to 1 and the pointer table 32, it has a count data section 33 for the number of remaining reception buffer lists. cell·
The buffer 31 is composed of a CELL section that stores received data obtained by converting an actual packet into cells, and a PNEXT section that stores a pointer (link cell address) to the next cell. , ..., K−1, k are provided as receive data buffer cell addresses. In addition, the pointer table 32 stores a received data buffer cell address indicating the head pointer PHEAD of the cellized received data. Then, the remaining reception buffer list number indicating the vacancy of the pointer table 32 is stored in the count data section 33.

Next, FIG. 20 shows the manner of communication between the port receiving section 1 and the receiving buffer storing means 2. The port receiving unit 1 checks whether the receiving buffer list storage unit 14 stores a certain number of receiving buffer addresses. If the number is smaller than the fixed number, the reception buffer storage unit 2 is requested to acquire an address. The reception buffer storage unit 2 gives permission to the port reception unit 1. The port receiving unit 1 fetches the remaining number of the receiving buffer list from the receiving buffer 3 and confirms whether or not the receiving buffer address list remains. If there is a remaining number in the reception buffer list, the reception buffer address is fetched from the reception buffer address list formed in the pointer table 32 and stored in the reception buffer list storage unit 14 of the port reception unit 1. The number obtained by subtracting from the remaining number in the reception buffer list is returned to the reception buffer 3. When the packet is received by the port receiving unit 1, the packet is made into a cell, and the cellized data is transferred to the receiving buffer 3 based on the received data buffer address stored in the receiving buffer list storage unit 14 in advance.

The cell buffer 31, which is the reception data buffer of this embodiment, has a cellized list structure as described above. If a packet that does not fit in one list comes, the next list It is a configuration for connecting and storing.
When the data does not fit in this one list, the reception buffer list storage unit 14 has a predetermined reception data cell address in advance, so that the data is stored in the next buffer list from here. The specific procedure is shown in FIGS. The reception buffer list storage unit 14 of the port reception unit 1 is
The received data buffer cell address in the buffer 31 is shown. The remaining number of the reception buffer list is the offset value of the pointer table 32. Since the reception buffer list storage unit 14 of the port reception unit 1 is initially empty, the remaining reception buffer list is read out to the reception buffer storage unit 2 and it is determined whether or not there is a cell address in the pointer table 32. If there is a cell address, the two addresses [0, 1] are fetched into the reception buffer list storage unit 14. 2 is added to the remaining number of the reception buffer list and rewritten to a value indicating the position of the next address list.

Next, when a packet having a size of, for example, 6 cells is received when the cells are made into cells, the port receiving section 1 writes the cellized data from the reception buffer list storage section 14 to the reception data buffer cell address. . The address specified first is 0, so C from address 0
The cellized reception data is written in the ELL section, and the link cell address (PNEXT section) is read. Then, since the next address i is specified, the cellized reception data from the address i is written next, and the link cell address (PNEXT part) is read. Then, since the next address ii is specified, next address ii
Write the cellized received data in the CELL section from
Read the link cell address (PNEXT part). Then
Since it is recorded that there is no subsequent link address (Nil) this time, the next reception data buffer cell address (= 1) is read from the reception buffer list storage unit 14,
The link cell address (PNEXT part) following the CELL part of the address ii of the reception data buffer is rewritten from Nil to address 1, and the cellized reception data is written in the CELL part from address 1 to set the link cell address (PNEXT part). Read. Then, since the next address j is designated, the cellized reception data from the address j is then written into the cell section, and the link cell address (PNEXT section) is read. Then, the next address jj
Is specified, the CE from the address jj is
The cellized reception data is written in the LL section, and the link cell address (PNEXT section) is read. Then, since it is recorded that there is no subsequent link address (Nil), the data buffer in the list format for exactly 6 cells is used up.

Incidentally, when the communication between the port receiving section 1 and the receiving buffer storing means 2 is shown on the time axis, in the previous embodiment, the address of the receiving buffer is fetched as shown in FIG. , The acquisition request phase, the address phase, the data phase, and the acquisition release phase are necessary. However, in the method of the present embodiment, as shown in FIG. 23, N reception buffer cell addresses of the reception buffer list address are If it is executed N times to capture, (N-1)
Since the batch acquisition request phase, the address phase, and the acquisition release phase can be omitted, the communication time is shortened as a whole. That is, the number of accesses to the reception buffer 3 can be reduced, and the execution time for each port reception unit 1 to transfer data with the reception buffer storage unit 2 can be shortened.

[0024]

According to the invention of claim 1, the receiving buffer for storing the received data from the port of each segment of the Ethernet and the address filter section for deciding to which port the data is transmitted are shared by the entire device. There is an effect that an inexpensive Ethernet switching device can be provided.

According to the second aspect of the present invention, since the packets within the same segment can be discarded by the local address filtering means, the capacity of the receiving buffer can be reduced and the bandwidth between the receiving buffer storing means and the receiving buffer can be reduced. There is an effect that efficiency can be improved.

According to the third aspect of the present invention, the receiving buffer is divided into blocks each having a fixed packet length, and the packets are stored in block units. Therefore, the packet can be transferred without knowing the packet length in advance, and the port can be transferred. Each port reception buffer is small, and transfer can be started during packet reception, so that the processing delay can be reduced.

According to the invention of claim 4, when one packet is completely received, the receiving buffer storing means secures the receiving buffer for the packet length and transfers the packet, so that the efficiency of using the receiving buffer is improved. Has the effect of improving.

According to the invention of claim 5, the receiving buffer has a list structure composed of blocks of a fixed length, and the receiving buffer storing means divides the packet into fixed lengths and stores the packets in the receiving buffer of the list structure. Therefore, it is not necessary to know the packet length in advance, and it is possible to waste a buffer for one cell per packet at the maximum.
There is an effect that the reception buffer can be used efficiently.

According to the sixth aspect of the present invention, a large number of received data buffer cell addresses are stored in the port receiving unit at one time, so that it is possible to quickly process the listing of packets that cannot be stored in the list-structured buffer. The effect is that Further, the number of times the reception buffer is accessed can be reduced, and the execution time for each port reception unit to communicate with the reception buffer storage means can be shortened.

[Brief description of drawings]

FIG. 1 is a block diagram showing a basic configuration of the present invention.

FIG. 2 is an explanatory diagram showing a state of collision due to simultaneous transmission on Ethernet.

FIG. 3 is an explanatory diagram showing the principle of a switching device in Ethernet.

FIG. 4 is a block diagram of a conventional switching device in Ethernet.

FIG. 5 is a diagram showing a configuration of an address table used in the present invention.

FIG. 6 is a flowchart showing the processing contents of the address filter unit used in the present invention.

FIG. 7 is a block diagram showing a configuration of a first exemplary embodiment of the present invention.

FIG. 8 is a block diagram showing a configuration of a second exemplary embodiment of the present invention.

FIG. 9 is a block diagram showing a configuration of a third exemplary embodiment of the present invention.

FIG. 10 is a block diagram showing a configuration of a fourth exemplary embodiment of the present invention.

FIG. 11 is a diagram showing a configuration of a reception buffer according to a fourth embodiment of the present invention.

FIG. 12 is a flow chart showing a storing process in a receiving buffer according to the fourth embodiment of the present invention.

FIG. 13 is an explanatory diagram showing an initial state of the reception buffer according to the fourth embodiment of the present invention.

FIG. 14 is an explanatory diagram showing a second state of the reception buffer according to the fourth embodiment of the present invention.

FIG. 15 is an explanatory diagram showing a third state of the reception buffer according to the fourth embodiment of the present invention.

FIG. 16 is an explanatory diagram showing a fourth state of the reception buffer according to the fourth embodiment of the present invention.

FIG. 17 is an explanatory diagram showing a fifth state of the reception buffer according to the fourth embodiment of the present invention.

FIG. 18 is a block diagram showing a configuration of a fifth exemplary embodiment of the present invention.

FIG. 19 is an explanatory diagram showing the structure of a reception buffer according to the fifth embodiment of the present invention.

FIG. 20 is an explanatory diagram showing the manner of communication between the port receiving unit and the receiving buffer storage unit according to the fifth embodiment of the present invention.

FIG. 21 is an explanatory diagram showing storage processing in a reception buffer according to the fifth embodiment of the present invention.

FIG. 22 is an explanatory diagram showing a communication format between a port reception unit and a reception buffer storage unit according to the fourth embodiment of the present invention.

FIG. 23 is an explanatory diagram showing a communication format between a port receiving unit and a receiving buffer storage unit according to the fifth embodiment of the present invention.

[Explanation of symbols]

 1 port receiving unit 2 receiving buffer storing unit 3 receiving buffer 4 address filter unit 5 transmitting buffer storing unit 6 port transmitting unit

Claims (6)

[Claims] 1. A port receiving unit connected to an Ethernet segment for receiving and buffering packets, and a receiving buffer for storing packets from a plurality of port receiving units in a receiving buffer and transmitting the storage addresses to an address filter unit. A storage unit, a reception buffer for storing the reception packet by the reception buffer storage unit, and a packet for reading a source address and a destination address of the reception packet from the reception buffer based on the storage address information transmitted from the reception buffer storage unit Of the packet from the receiving buffer based on the packet storage address and the destination port information from the address filtering unit, which determines the destination port of the packet and transmits the packet storage address and the destination port to the transmitting buffer storage means. Of the sending port of the sending port that should be sent A LAN switching device comprising: a transmission buffer storage means for transferring the packet from the reception buffer to the port transmission buffer; and a port transmission unit connected to an Ethernet segment for transmitting the data in the port transmission buffer. . 2. A local address filtering means for determining whether or not packet communication is within a segment connected to the port and discarding the packet when the communication is within the segment in the port receiving unit. The LAN switching device according to claim 1, wherein the switching device is a LAN switching device. 3. The LAN switching device according to claim 1, wherein the receiving buffer storing means is provided with means for dividing a packet into a fixed length and storing it in the receiving buffer. 4. The receiving buffer storing means is provided with means for receiving packet length information from a buffer in the port receiving section, determining a necessary amount of receiving buffer from the information, and storing the packet in the receiving buffer. The LAN switching device according to claim 1, wherein the switching device is a LAN switching device. 5. The receiving buffer has a list structure composed of blocks of a fixed length, and means for dividing a packet into fixed fixed lengths in the receiving buffer storing means and storing the divided packet in the receiving buffer of the list structure is provided. 2. The LAN switching device according to claim 1, wherein said means is provided with means for taking out a packet from the reception buffer having a list structure. 6. The LAN switching device according to claim 5, wherein the port receiving unit is provided with a reception buffer list storage unit for storing a plurality of reception buffer cell addresses of the cellized reception buffer.