JPH09232466A - Manufacture of package for semiconductor chip - Google Patents
Manufacture of package for semiconductor chipInfo
- Publication number
- JPH09232466A JPH09232466A JP8036082A JP3608296A JPH09232466A JP H09232466 A JPH09232466 A JP H09232466A JP 8036082 A JP8036082 A JP 8036082A JP 3608296 A JP3608296 A JP 3608296A JP H09232466 A JPH09232466 A JP H09232466A
- Authority
- JP
- Japan
- Prior art keywords
- pad
- external lead
- lead terminal
- insulating substrate
- semiconductor element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体素子を収容
するための半導体素子収納用パッケージの製造方法に関
するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor element housing package for housing a semiconductor element.
【０００２】[0002]
【従来の技術】従来、半導体素子を収容するための半導
体素子収納用パッケージは、酸化アルミニウム質焼結体
等の電気絶縁材料から成り、表面に半導体素子の各電極
が電気的に接続されるボンディングパッド及び該ボンデ
ィングパッドに電気的に接続され、半導体素子を外部電
気回路に接続するための外部リード端子がロウ付けされ
るブレーズパッドを有する絶縁基体と、前記絶縁基体の
ブレーズパッドに銀ロウ等のロウ材を介してロウ付けさ
れた外部リード端子と、半導体素子を気密に封止するた
めの蓋体とから構成され、前記絶縁基体上に半導体素子
を搭載するとともに該半導体素子の各電極をボンディン
グパッドにボンディングワイヤーや金属バンプ等の電気
的接続手段を介して電気的に接続し、最後に前記絶縁基
体上に半導体素子を覆うようにして蓋体をロウ材、ガラ
ス、樹脂等の封止材を介してあるいは溶接により接合さ
せることにより製品としての半導体装置となり、前記外
部リード端子を外部電気回路基板の配線導体に接続する
ことによって内部に収容する半導体素子が外部電気回路
に電気的に接続されることとなる。2. Description of the Related Art Conventionally, a semiconductor element accommodating package for accommodating a semiconductor element is made of an electrically insulating material such as an aluminum oxide sintered body and has a surface to which electrodes of the semiconductor element are electrically connected. An insulating base having a blaze pad electrically connected to the pad and the bonding pad and having external lead terminals for connecting the semiconductor element to an external electric circuit brazed, and a silver braze or the like on the blaze pad of the insulating base. An external lead terminal brazed via a brazing material, and a lid for hermetically sealing the semiconductor element. The semiconductor element is mounted on the insulating substrate and each electrode of the semiconductor element is bonded. The pad is electrically connected to the pad through an electrical connecting means such as a bonding wire or a metal bump, and finally a semiconductor element is formed on the insulating base. A semiconductor device as a product is obtained by joining the lid so as to cover it through a sealing material such as brazing material, glass, or resin, or by welding, and connects the external lead terminal to the wiring conductor of the external electric circuit board. As a result, the semiconductor element housed inside is electrically connected to the external electric circuit.
【０００３】尚、前記半導体素子収納用パッケージは、
その絶縁基体のボンディングパッド表面、ブレーズパッ
ド表面及び外部リード端子の表面に、一般にニッケルか
ら成るめっき金属層及び金から成るめっき金属層が順次
被着されており、これによりボンディングパッド、ブレ
ーズパッド及び外部リード端子が酸化腐蝕するのが有効
に防止されるとともにボンディングパッドと半導体素子
の各電極との電気的接続及び外部リード端子と外部電気
回路基板の配線導体との接続が容易、且つ強固なものと
なるようになっている。The semiconductor element housing package is
A plating metal layer generally made of nickel and a plating metal layer generally made of gold are sequentially deposited on the bonding pad surface, the blaze pad surface and the surface of the external lead terminal of the insulating substrate. The lead terminal is effectively prevented from being oxidized and corroded, and the electrical connection between the bonding pad and each electrode of the semiconductor element and the connection between the external lead terminal and the wiring conductor of the external electric circuit board are easy and strong. It is supposed to be.
【０００４】また、前記半導体素子収納用パッケージの
絶縁基体のブレーズパッドに外部リード端子をロウ付け
するには、先ず、表面にボンディングパッド及びブレー
ズパッドを有する絶縁基体及び外部リード端子を準備す
るとともに前記絶縁基体のブレーズパッド上に外部リー
ド端子をこれらの間に銀ロウ等のロウ材を挟んで配置
し、次にこれらをトンネル炉等の加熱装置内に入れて加
熱することによって前記ロウ材を溶融させるとともに該
溶融したロウ材をブレーズパッドと外部リード端子間に
濡れ広がらせ、しかる後、これを冷却して前記溶融した
ロウ材を固化させることによって外部リード端子を絶縁
基体のブレーズパッドにロウ付けする方法が採用され
る。In order to braze the external lead terminal to the blazed pad of the insulating base of the semiconductor element housing package, first, the insulating base having the bonding pad and the blazed pad on the surface and the external lead terminal are prepared and The external lead terminals are placed on the blaze pad of the insulating substrate with a brazing material such as silver brazing sandwiched between them, and then these are placed in a heating device such as a tunnel furnace and heated to melt the brazing material. In addition, the molten brazing material is wetted and spread between the blaze pad and the external lead terminal, and then cooled to solidify the molten brazing material to braze the external lead terminal to the blaze pad of the insulating substrate. The method of doing is adopted.
【０００５】更に、前記絶縁基体のボンディングパッド
表面、ブレーズパッド表面及び外部リード端子表面にめ
っき金属層を被着させるには、絶縁基体のブレーズパッ
ドに外部リード端子をロウ付けした後、絶縁基体のボン
ディングパッド表面、ブレーズパッド表面及び外部リー
ド端子表面に従来周知の電解めっき法や無電解めっき法
等のめっき法を採用してニッケルから成るめっき金属層
及び金から成るめっき金属層を被着させる方法が採用さ
れる。Further, in order to deposit the plating metal layer on the bonding pad surface, the blaze pad surface and the external lead terminal surface of the insulating substrate, after brazing the external lead terminal to the blaze pad of the insulating substrate, A method of depositing a plated metal layer made of nickel and a plated metal layer made of gold on the surface of the bonding pad, the surface of the blaze pad and the surface of the external lead terminal by adopting the well-known electrolytic plating method or electroless plating method. Is adopted.
【０００６】[0006]
【発明が解決しようとする課題】しかしながら、この従
来の半導体素子収納用パッケージの製造方法によれば、
前記絶縁基体のブレーズパッド上に外部リード端子をこ
れらの間に銀ロウ等のロウ材を挟んで配置する際に、前
記絶縁基体と外部リード端子及びロウ材とを所定の位置
関係に保つために一般にカーボン製やセラミック製の保
持治具が用いられており、このため、前記保持治具と絶
縁基体や外部リード端子とがこれらを取り扱う際等の震
動や衝撃により、或はこれらを加熱装置に入れた際に発
生する絶縁基体及び外部リード端子と保持治具との熱膨
張量の差に起因して擦れ合うと、前記保持治具を構成す
るカーボンやセラミックが絶縁基体表面や外部リード端
子表面に付着してしまう。However, according to this conventional method of manufacturing a semiconductor element housing package,
When the external lead terminals are arranged on the blazed pad of the insulating base with a brazing material such as silver brazing interposed therebetween, in order to maintain the insulating base and the external lead terminals and the brazing material in a predetermined positional relationship. Generally, holding jigs made of carbon or ceramics are used. Therefore, due to vibration or shock when the holding jigs and the insulating substrate or the external lead terminals handle these, or these are used as a heating device. When they rub against each other due to the difference in thermal expansion between the holding jig and the insulating base and the external lead terminal that occurs when they are put in, the carbon and ceramics that make up the holding jig are transferred to the surface of the insulating base and the surface of the external lead terminal. It will stick.
【０００７】このように絶縁基体の表面や外部リード端
子の表面に付着したカーボンやセラミックの付着物は、
化学的に安定であり、めっき工程において被めっき物に
めっき金属層を被着させる前に通常施される酸洗浄やア
ルカリ洗浄等の化学的洗浄では十分に除去されにくい。As described above, the carbon or ceramic deposits attached to the surface of the insulating substrate or the surface of the external lead terminal are
It is chemically stable and cannot be sufficiently removed by chemical cleaning such as acid cleaning or alkali cleaning which is usually performed before depositing the plated metal layer on the object to be plated in the plating process.
【０００８】そこで、カーボンやセラミックの付着物が
十分に除去されずに付着したままの絶縁基体のボンディ
ングパッド表面やブレーズパッド表面、或は外部リード
端子表面にめっき金属層を被着させた場合、付着したカ
ーボンやセラミックとボンディングパッドやブレーズパ
ッド、或は外部リード端子との密着力並びに付着したカ
ーボンやセラミックとめっき金属層との密着力が乏し
く、その結果、ボンディングパッドの表面やブレーズパ
ッドの表面、或は外部リード端子の表面に被着させため
っき金属層に膨れや剥がれ、変色、シミ等が発生してし
まい、ボンディングパッドやブレーズパッド、或は外部
リード端子に酸化腐蝕を発生させたり、ボンディングパ
ッドと半導体素子の電極との電気的に接続や外部リード
端子と外部電気回路基板の配線導体との接続が困難なも
のとなってしまうという欠点を有していた。Therefore, when a plating metal layer is deposited on the bonding pad surface or the blaze pad surface of the insulating substrate or the surface of the external lead terminal where the deposits of carbon or ceramic are not sufficiently removed and are still deposited, Poor adhesion between adhered carbon or ceramic and bonding pad or blazed pad, or external lead terminals and adhesion between adhered carbon or ceramic and plated metal layer. As a result, bonding pad surface or blazed pad surface Or, the plated metal layer adhered to the surface of the external lead terminal may be swollen or peeled off, causing discoloration, stains, etc., which may cause oxidative corrosion on the bonding pad, the blaze pad, or the external lead terminal. Electrical connection between bonding pad and electrode of semiconductor element, external lead terminal and external electric circuit Connecting the plate wiring conductor had a defect that becomes difficult.
【０００９】[0009]
【課題を解決するための手段】本発明の半導体素子収納
用パッケージの製造方法は、表面に半導体素子の電極が
電気的に接続されるボンディングパッド及び外部リード
端子がロウ付けされるブレーズパッドを有する絶縁基体
と外部リード端子とを準備する工程と、前記絶縁基体の
ブレーズパッドに外部リード端子をロウ材を介して接合
する工程と、前記絶縁基体の表面及び外部リード端子の
表面をサンドブラストにより研磨清浄する工程と、前記
外部リード端子の表面、ボンディングパッドの表面及び
ブレーズパッド表面にめっき金属層を被着させる工程
と、から成ることを特徴とするものであり、絶縁基体の
ブレーズパッドに外部リード端子をロウ材を介してロウ
付けした後、前記絶縁基体の表面及び外部リード端子の
表面をサンドブラストにより研磨清浄したことから、外
部リード端子を絶縁基体のブレーズパッドにロウ付けす
る際に絶縁基体表面や外部リード端子表面に付着したカ
ーボンやセラミックがサンドブラストにより完全に研磨
除去され、その結果、絶縁基体のボンディングパッドや
ブレーズパッド表面及び外部リード端子表面にめっき金
属層を被着させても該めっき金属層に膨れや剥がれ、変
色、シミ等を発生させることは皆無である。A method of manufacturing a package for housing a semiconductor device according to the present invention has a bonding pad to which electrodes of the semiconductor device are electrically connected and a blaze pad to which an external lead terminal is brazed, on the surface. A step of preparing an insulating base and an external lead terminal; a step of bonding the external lead terminal to a blaze pad of the insulating base via a brazing material; and a surface of the insulating base and the surface of the external lead terminal polished and cleaned by sandblasting. And a step of depositing a plating metal layer on the surface of the external lead terminal, the surface of the bonding pad and the surface of the blazed pad, the external lead terminal being attached to the blazed pad of the insulating substrate. After brazing through the brazing material, the surface of the insulating substrate and the surface of the external lead terminals are sandblasted. Since it has been cleaned and cleaned by sandblasting, when brazing the external lead terminals to the blaze pad of the insulating substrate, the carbon and ceramic adhering to the surface of the insulating substrate and the surface of the external lead terminals are completely removed by sandblasting. Even if the plating metal layer is adhered to the surfaces of the bonding pad or the blaze pad and the surface of the external lead terminal, the plating metal layer never causes swelling, peeling, discoloration, stains or the like.
【００１０】また、本発明の半導体素子収納用パッケー
ジの製造方法においては、前記絶縁基体の表面及び外部
リード端子の表面をサンドブラストにより研磨清浄する
工程において、前記絶縁基体のボンディングパッドの表
面粗さが、、ＪＩＳーＢー０６０１ー１９９４に規定の
中心線平均粗さ（Ｒａ）で０．１μｍ≦Ｒａ≦１．０μ
ｍ、最大高さ（Ｒｙ）で０．５μｍ≦Ｒｙ≦４．０μｍ
となるように研磨清浄すると、半導体素子の電極をボン
ディングパッドに電気的に接続する際にボンディングパ
ッドと半導体素子の電極との電気的接続を容易、且つ強
固なものとなすことができる。Further, in the method for manufacturing a package for housing a semiconductor element of the present invention, in the step of polishing and cleaning the surface of the insulating substrate and the surface of the external lead terminal by sandblasting, the surface roughness of the bonding pad of the insulating substrate is ,, center line average roughness (Ra) specified in JIS-B-0601-1994, 0.1 μm ≦ Ra ≦ 1.0 μ
m, 0.5 μm ≦ Ry ≦ 4.0 μm at maximum height (Ry)
By polishing and cleaning so that the electrical connection between the bonding pad and the electrode of the semiconductor element can be made easy and strong when the electrode of the semiconductor element is electrically connected to the bonding pad.
【００１１】[0011]
【発明の実施の形態】次に、本発明を添付図面に基づき
説明する。図１は、本発明の製造方法によって製作され
た半導体素子収納用パッケージの一実施の形態を示す断
面図であり、１は絶縁基体、２は蓋体であり、該絶縁基
体１と蓋体２とで半導体素子３を収容する容器４が構成
される。DETAILED DESCRIPTION OF THE INVENTION The present invention will be described below with reference to the accompanying drawings. FIG. 1 is a sectional view showing an embodiment of a package for housing a semiconductor device manufactured by the manufacturing method of the present invention. Reference numeral 1 is an insulating base, 2 is a lid, and the insulating base 1 and the lid 2 are shown. And form a container 4 for housing the semiconductor element 3.
【００１２】前記絶縁基体１は、酸化アルミニウム質焼
結体、窒化アルミニウム質焼結体、ムライト質焼結体、
炭化珪素質焼結体、ガラスセラミック質焼結体等の電気
絶縁材料から成る略四角形状の板体であり、その上面中
央部には半導体素子３を搭載するための凹部１ａが形成
されており、該凹部１ａ底面には半導体素子３がロウ
材、ガラス、樹脂等の接着材を介して接着固定される。The insulating substrate 1 is made of an aluminum oxide sintered body, an aluminum nitride sintered body, a mullite sintered body,
It is a substantially rectangular plate made of an electrically insulating material such as a silicon carbide sintered body or a glass ceramic sintered body, and a recess 1a for mounting the semiconductor element 3 is formed in the center of the upper surface thereof. The semiconductor element 3 is bonded and fixed to the bottom surface of the recess 1a through an adhesive material such as a brazing material, glass, or resin.
【００１３】また、前記絶縁基体１はその凹部１ａ周辺
部からその下面に導出するタングステン、モリブデン、
銅、銀等の金属から成る複数のメタライズ配線層５が被
着形成されており、該メタライズ配線層５は内部に収容
する半導体素子３を後述する外部リード端子７に接続す
るための導電路として作用する。The insulating substrate 1 is made of tungsten, molybdenum, which is led out from the peripheral portion of the concave portion 1a to the lower surface thereof.
A plurality of metallized wiring layers 5 made of a metal such as copper or silver are adhered and formed. The metallized wiring layers 5 serve as conductive paths for connecting the semiconductor element 3 housed therein to external lead terminals 7 described later. To work.
【００１４】前記メタライズ配線層５は、凹部１ａ周辺
部位が半導体素子３の各電極が電気的に接続されるボン
ディングパッド５ａを、絶縁基体１底面に導出した部位
が外部リード端子がロウ付けされるブレーズパッド５ｂ
を形成しており、ボンディングパッド５ａには半導体素
子３の電極が例えばボンディングワイヤー６等の電気的
接続手段を介して電気的に接続され、またブレーズパッ
ド５ｂには外部リード端子７が銀ロウ等のロウ材８を介
してロウ付けされる。In the metallized wiring layer 5, the external lead terminal is brazed at the portion where the bonding pad 5a to which the respective electrodes of the semiconductor element 3 are electrically connected is provided in the peripheral portion of the recess 1a and which is led out to the bottom surface of the insulating substrate 1. Blaze pad 5b
The electrode of the semiconductor element 3 is electrically connected to the bonding pad 5a through an electrical connecting means such as a bonding wire 6 and the blaze pad 5b has an external lead terminal 7 such as silver solder. It is brazed through the brazing material 8.
【００１５】前記メタライズ配線層５のブレーズパッド
５ｂに銀ロウ等のロウ材８を介してロウ付けされた外部
リード端子７は、内部に収容する半導体素子３を外部電
気回路に電気的に接続するための接続端子として作用
し、該外部リード端子７を外部の電気回路基板の配線導
体に電気的に接続することにより内部に収容する半導体
素子３が外部電気回路に電気的に接続されることとな
る。The external lead terminals 7 brazed to the blaze pads 5b of the metallized wiring layer 5 via a brazing material 8 such as silver braze electrically connect the semiconductor element 3 housed therein to an external electric circuit. And the external lead terminal 7 is electrically connected to a wiring conductor of an external electric circuit board so that the semiconductor element 3 housed inside is electrically connected to an external electric circuit. Become.
【００１６】なお、前記半導体素子収納用パッケージ
は、絶縁基体１に被着形成させたメタライズ配線層５の
ボンディングパッド５ａ、ブレーズパッド５ｂ及び外部
リード端子７の露出する表面にニッケルや金から成るめ
っき金属層９が被着形成されている。In the package for accommodating semiconductor elements, the exposed surfaces of the bonding pads 5a, the blaze pads 5b and the external lead terminals 7 of the metallized wiring layer 5 adhered to the insulating substrate 1 are plated with nickel or gold. The metal layer 9 is deposited.
【００１７】また、前記めっき金属層９は、メタライズ
配線層５のボンディングパッド５ａ、ブレーズパッド５
ｂ及び外部リード端子７が酸化腐食するのを防止すると
ともにボンディングパッド５ａとボンディングワイヤー
６との接続及び外部リード端子７と外部電気回路基板の
配線導体との接続を容易、且つ強固なものとする作用を
為す。The plated metal layer 9 includes the bonding pad 5a of the metallized wiring layer 5 and the blazed pad 5.
b and the external lead terminal 7 are prevented from being oxidized and corroded, and the connection between the bonding pad 5a and the bonding wire 6 and the connection between the external lead terminal 7 and the wiring conductor of the external electric circuit board are made easy and strong. To act.
【００１８】かくして上述の半導体素子収納用パッケー
ジは、絶縁基体１の凹部底面に半導体素子３をロウ材、
ガラス、樹脂等の接着剤を介して接着固定するとともに
該半導体素子３の各電極をボンディングワイヤーを介し
てボンディングパッド５ａに電気的に接続し、しかる
後、前記絶縁基体１の上面に鉄−ニッケル−コバルト合
金等の金属やセラミックスから成る蓋体２をロウ材、ガ
ラス、樹脂等の封止材を介して、或はシームウエルド法
等の溶接によって接合し、絶縁基体１と蓋体２とから成
る容器内部に半導体素子３を気密に封止することによっ
て製品としての半導体装置となる。Thus, in the above-described package for accommodating semiconductor elements, the semiconductor element 3 is brazed on the bottom surface of the recess of the insulating substrate 1.
The electrodes of the semiconductor element 3 are electrically fixed to the bonding pads 5a via bonding wires while being fixedly adhered via an adhesive such as glass or resin, and thereafter, iron-nickel is attached to the upper surface of the insulating base 1. -The lid 2 made of a metal such as a cobalt alloy or ceramics is joined via a sealing material such as a brazing material, glass, or resin, or by welding such as the seam weld method, and the insulating base 1 and the lid 2 are joined together. A semiconductor device as a product is obtained by hermetically sealing the semiconductor element 3 inside the container.
【００１９】次に本発明の半導体素子収納用パッケージ
の製造方法について図２乃至図５に基づき説明する。先
ず、図２に示すように、表面にブレーズパッドが形成さ
れた絶縁基体１、外部リード端子７、及びロウ材８を準
備する。Next, a method of manufacturing the semiconductor element housing package of the present invention will be described with reference to FIGS. First, as shown in FIG. 2, an insulating substrate 1 having a blaze pad formed on its surface, an external lead terminal 7, and a brazing material 8 are prepared.
【００２０】前記絶縁基体１は、例えば酸化アルミニウ
ム質焼結体から成る場合、酸化アルミニウム、酸化珪
素、酸化マグネシウム、酸化カルシウム等の原料粉末に
適当な有機バインダー、溶剤、可塑剤、分散剤等を添加
混合して泥漿状のセラミックスラリーを得るとともに該
セラミックスラリーを従来周知のドクターブレード法等
のシート成形技術を採用してシート状のセラミックグリ
ーンシートとなし、しかる後、前記セラミックグリーン
シートに従来周知のパンチング法やレーザー加工法によ
り適当な打ち抜き加工や切断加工を施すとともにメタラ
イズ配線層５となる金属ペーストを従来周知のスクリー
ン印刷法等の厚膜手法を採用して所定パターンに印刷塗
布し、最後に前記セラミックグリーンシートを従来周知
の熱間プレス法等の積層法を採用して複数枚上下に積層
してセラミックグリーンシート積層体を得るとともに該
セラミックグリーンシート積層体を還元雰囲気中、約１
６００℃の温度で焼成することによって製作される。When the insulating substrate 1 is made of, for example, an aluminum oxide sintered body, a raw material powder of aluminum oxide, silicon oxide, magnesium oxide, calcium oxide or the like is mixed with an appropriate organic binder, solvent, plasticizer, dispersant or the like. Add and mix to obtain a slurry-like ceramic slurry and form the ceramic slurry into a sheet-shaped ceramic green sheet by adopting a conventionally known sheet forming technique such as a doctor blade method. Thereafter, the ceramic green sheet is conventionally well known. Appropriate punching and cutting are performed by the punching method and the laser processing method described above, and the metal paste to be the metallized wiring layer 5 is printed and applied in a predetermined pattern by using a thick film method such as a conventionally known screen printing method. The above-mentioned ceramic green sheet is applied to the conventionally well-known hot pressing method, etc. In a reducing atmosphere the ceramic green sheet laminate with obtaining a ceramic green sheet laminate by laminating the plurality of sheets vertically employ layer normal, about 1
It is manufactured by firing at a temperature of 600 ° C.
【００２１】前記絶縁基体１となるセラミックグリーン
シートに印刷塗布されるメタライズ金属層５となる金属
ペーストは、例えばメタライズ配線層５がタングステン
から成る場合、平均粒径が１〜５μｍ程度のタングステ
ン粉末に適当な有機バインダー、溶剤を添加混合してペ
ースト状とすることによって製作される。The metal paste to be the metallized metal layer 5 printed and applied on the ceramic green sheet to be the insulating substrate 1 is, for example, tungsten powder having an average particle size of about 1 to 5 μm when the metallized wiring layer 5 is made of tungsten. It is manufactured by adding and mixing an appropriate organic binder and a solvent to form a paste.
【００２２】一方、前記外部リード端子７は、鉄−ニッ
ケル−コバルト合金等の金属から成るインゴットを製作
するとともに該インゴットに従来周知の種々の金属加工
法を施すことにより棒状や板状とすることによって製作
される。On the other hand, the external lead terminal 7 is formed into a rod shape or a plate shape by manufacturing an ingot made of a metal such as an iron-nickel-cobalt alloy and subjecting the ingot to various conventionally known metal working methods. Produced by.
【００２３】また、前記ロウ材８は、例えば銀ロウから
成る場合、銀及び銅をるつぼ内で加熱溶融させ、これを
冷却することによって製作される。When the brazing material 8 is composed of, for example, silver brazing material, it is manufactured by heating and melting silver and copper in a crucible and then cooling it.
【００２４】なお、前記ロウ材８は、外部リード端子７
のロウ付け面に予め溶着させておくと、外部リード端子
７のメタライズパッド５ｂへのロウ付け作業を容易なも
のとすることができる。従って、前記ロウ材８は、外部
リード端子７のメタライズパッド５ｂへのロウ付け作業
を容易なものとするために、外部リード端子７のロウ付
け面に予め溶着させておくことが好ましい。The brazing material 8 is used for the external lead terminals 7.
By pre-welding to the brazing surface, the brazing work of the external lead terminals 7 to the metallized pads 5b can be facilitated. Therefore, it is preferable that the brazing material 8 is previously welded to the brazing surface of the external lead terminal 7 in order to facilitate the brazing work of the external lead terminal 7 to the metallized pad 5b.
【００２５】次に、図３に示すように、絶縁基体１及び
外部リード端子７をカーボン製やセラミック製の保持治
具Ｊに保持させることにより前記絶縁基体１の表面に被
着形成されたブレーズパッド５ｂ上に外部リード端子７
をこれらの間に銀ロウ等のロウ材８を挟んで配置させ、
これらを従来周知のトンネル炉等の加熱装置内に入れて
ロウ材８が溶融する温度以上の温度（例えばロウ材８が
銀ロウから成る場合、約８００〜９００℃）に加熱し、
前記ロウ材８を溶融させるとともに該溶融したロウ材８
をブレーズパッド５ｂと外部リード端子７との間に濡れ
広がらせ、続いてこれを冷却して前記溶融したロウ材８
を固化させることによって絶縁基体１のブレーズパッド
５ｂに外部リード端子７をロウ材８を介してロウ付けす
る。この場合、図４に示すように前記絶縁基体１や外部
リード端子７と保持治具Ｊとがこれらの取り扱いの際に
印可される震動や衝撃、或はこれらを加熱装置に入れた
際に発生する絶縁基体１及び外部リード端子７と保持治
具Ｊとの熱膨張量の差に起因して擦れ合い、絶縁基体１
の表面や外部リード端子７の表面に保持治具Ｊを構成す
るカーボンやセラミックから成る付着物Ａが付着する。Next, as shown in FIG. 3, the insulating base 1 and the external lead terminals 7 are held by a holding jig J made of carbon or ceramic, and the blaze adhered and formed on the surface of the insulating base 1. External lead terminal 7 on pad 5b
Is placed with a brazing material 8 such as silver brazing interposed therebetween,
These are placed in a heating device such as a conventionally well-known tunnel furnace and heated to a temperature equal to or higher than a temperature at which the brazing material 8 is melted (for example, when the brazing material 8 is made of silver wax, about 800 to 900 ° C.),
The brazing material 8 is melted and the molten brazing material 8 is melted.
Is spread between the blaze pad 5b and the external lead terminal 7 and then cooled to cool the molten brazing material 8
The external lead terminal 7 is brazed to the blazed pad 5b of the insulating substrate 1 through the brazing material 8 by solidifying the. In this case, as shown in FIG. 4, the insulating substrate 1, the external lead terminals 7 and the holding jig J are subjected to vibrations or impacts applied during their handling, or when these are placed in a heating device. Due to the difference in thermal expansion amount between the insulating base 1 and the external lead terminal 7 and the holding jig J,
A deposit A made of carbon or ceramics that constitutes the holding jig J is attached to the surface of the holding jig J or the surface of the external lead terminal 7.
【００２６】次に図５に示すように、前記外部リード端
子７がロウ付けされた絶縁基体１の表面及び外部リード
端子７の表面を従来周知のサンドブラスト法により研磨
清浄する。Next, as shown in FIG. 5, the surface of the insulating substrate 1 to which the external lead terminals 7 are brazed and the surface of the external lead terminals 7 are polished and cleaned by a conventionally known sandblast method.
【００２７】前記絶縁基体１及び外部リード端子７は、
その表面を物理的に研磨除去するサンドブラスト法によ
り研磨清浄されることから、化学的洗浄で除去されにく
いカーボンやセラミックス等から成る付着物も該絶縁基
体１の表面及び外部リード端子７の表面から良好に除去
され、その結果、後述するように絶縁基体１のボンディ
ングパッド５ａやブレーズパッド５ｂ、外部リード端子
７の表面にめっき金属層９を被着させた際に、めっき金
属層９に膨れや剥がれ、変色、シミ等が発生することは
皆無である。The insulating base 1 and the external lead terminals 7 are
Since the surface is polished and cleaned by a sandblasting method in which it is physically removed by polishing, deposits made of carbon, ceramics, etc., which are difficult to remove by chemical cleaning, are also good from the surface of the insulating substrate 1 and the surface of the external lead terminal 7. As a result, when the plated metal layer 9 is adhered to the surfaces of the bonding pad 5a and the blazed pad 5b of the insulating substrate 1 and the external lead terminals 7 as described later, the plated metal layer 9 is swollen and peeled off. There is no occurrence of discoloration, stains, etc.
【００２８】また、前記絶縁基体１の表面及び外部リー
ド端子７の表面をサンドブラスト法により研磨清浄する
際、絶縁基体１のボンディングパッド５ａの表面粗さ
が、ＪＩＳーＢー０６０１ー１９９４に規定の中心線平
均粗さ（Ｒａ）で０．１μｍ≦Ｒａ≦１．０μｍ、最大
高さ（Ｒｙ）で０．５μｍ≦Ｒｙ≦４．０μｍとなる
と、半導体素子３の各電極をボンディングワイヤー６を
介してボンディングパッド５ａに電気的に接続する時
に、ボンディングワイヤー６とボンディングパッド５ａ
との接続を容易、且つ強固なものとすることができる。
従って、前記絶縁基体１の表面及び外部リード端子７の
表面をサンドブラスト法により研磨清浄する工程におい
ては、絶縁基体１のボンディングパッド５ａの表面粗さ
がＪＩＳーＢー０６０１ー１９９４に規定の中心線平均
粗さ（Ｒａ）で０．１μｍ≦Ｒａ≦１．０μｍ、最大高
さ（Ｒｙ）で０．５μｍ≦Ｒｙ≦４．０μｍとなるよう
に研磨除去しておくことが好ましい。When the surface of the insulating base 1 and the surfaces of the external lead terminals 7 are polished and cleaned by the sandblast method, the surface roughness of the bonding pad 5a of the insulating base 1 is specified in JIS-B-0601-1994. When the center line average roughness (Ra) is 0.1 μm ≦ Ra ≦ 1.0 μm and the maximum height (Ry) is 0.5 μm ≦ Ry ≦ 4.0 μm, each electrode of the semiconductor element 3 is connected via the bonding wire 6. Bonding wire 6 and bonding pad 5a when electrically connecting to bonding pad 5a
The connection with can be made easy and strong.
Therefore, in the step of polishing and cleaning the surface of the insulating substrate 1 and the surface of the external lead terminal 7 by the sandblast method, the surface roughness of the bonding pad 5a of the insulating substrate 1 has a center line defined in JIS-B-0601-1994. It is preferable to polish and remove so that the average roughness (Ra) is 0.1 μm ≦ Ra ≦ 1.0 μm and the maximum height (Ry) is 0.5 μm ≦ Ry ≦ 4.0 μm.
【００２９】尚、前記絶縁基体１の表面及び外部リード
端子７の表面をサンドブラスト法により、絶縁基体１の
ボンディングパッド５ａの表面粗さが、中心線平均粗さ
Ｒａで０．１μｍ未満又は最大高さＲｙで０．５μｍ未
満となるように研磨清浄すると、半導体素子３の各電極
をボンディングワイヤー６を介してボンディングパッド
５ａに電気的に接続する際に、ボンディングワイヤー６
とメタライズパッド５ａとが滑り易くなるとともにボン
ディングワイヤー６とメタライズパッド５ａとの接合表
面積が小さいものとなり、ボンディングワイヤー６とボ
ンディングパッド５ａとを容易、且つ強固に接続するこ
とが困難となり、また絶縁基体１のボンディングパッド
５ａの表面粗さが、中心線平均粗さＲａで１．０μｍ又
は最大高さＲｙで４．０μｍを越えたものとなるように
研磨清浄した場合、ボンディングパッド５ａの表面にめ
っき金属層９を均一、且つ強固に被着させることができ
ず、その結果、半導体素子３の各電極をボンディングワ
イヤー６を介してボンディングパッド５ａに電気的に接
続する際にボンディングワイヤー６とボンディングパッ
ド５ａとを容易、且つ強固に接続することが困難となっ
てしまう。The surface roughness of the bonding pad 5a of the insulating base 1 is less than 0.1 μm or the maximum height of the center line average roughness Ra of the surface of the insulating base 1 and the surface of the external lead terminal 7 by sandblasting. If the polishing and cleaning are performed so that the thickness Ry is less than 0.5 μm, the bonding wire 6 can be electrically connected to each electrode of the semiconductor element 3 via the bonding wire 6 to the bonding pad 5a.
And the metallization pad 5a become slippery and the bonding surface area between the bonding wire 6 and the metallization pad 5a becomes small, which makes it difficult to connect the bonding wire 6 and the bonding pad 5a easily and firmly, and also the insulating substrate. When the surface roughness of the bonding pad 5a of No. 1 is polished and cleaned so that the center line average roughness Ra exceeds 1.0 μm or the maximum height Ry exceeds 4.0 μm, the surface of the bonding pad 5a is plated. The metal layer 9 cannot be deposited uniformly and firmly, and as a result, when the electrodes of the semiconductor element 3 are electrically connected to the bonding pad 5a via the bonding wire 6, the bonding wire 6 and the bonding pad It will be difficult to connect with 5a easily and firmly.
【００３０】また、前記サンドブラストによる絶縁基体
１の表面及び外部リード端子７の表面の研磨清浄は、ア
ルミナ粉末やガラス粉末から成る＃５００〜＃４０００
の砥粒を、吹き付け圧力０．１〜１．０ｋｇ／ｃｍ2 、
吹き付け量０．２〜３０ｇ／ｃｍ2 ・秒で約５〜６０秒
間吹き付けることによって行われる。Polishing and cleaning of the surface of the insulating substrate 1 and the surface of the external lead terminals 7 by sandblasting # 500 to # 4000 made of alumina powder or glass powder.
Of the abrasive grains of 0.1 to 1.0 kg / cm 2 ,
It is performed by spraying at a spray rate of 0.2 to 30 g / cm 2 · sec for about 5 to 60 seconds.
【００３１】また、サンドブラストに用いられる砥粒
は、＃５００未満では絶縁基体１の表面や外部リード端
子７の表面に大きな傷が付きやすいものとなり、また＃
４０００を越えると絶縁基体１の表面や外部リード端子
７の表面に付着したカーボンやセラミックから成る付着
物Ａを十分に除去できない傾向にある。従って、前記サ
ンドブラストに用いる砥粒は＃５００〜＃４０００程度
のものを使用することが好ましい。If the abrasive grains used for sandblasting are less than # 500, the surface of the insulating substrate 1 and the surface of the external lead terminals 7 are likely to be greatly scratched.
If it exceeds 4000, there is a tendency that the deposit A composed of carbon or ceramics attached to the surface of the insulating substrate 1 or the surface of the external lead terminal 7 cannot be sufficiently removed. Therefore, it is preferable to use abrasive grains of about # 500 to # 4000 for the sandblasting.
【００３２】更に、前記サンドブラストにおける砥粒吹
き付け圧力は、０．１ｋｇ／ｃｍ2未満では絶縁基体１
表面及び外部リード端子７表面に付着したカーボンやセ
ラミックから成る付着物を良好に除去することが困難と
なり、また１．０ｋｇ／ｃｍ2 を越えると絶縁基体１表
面や外部リード端子７の表面に大きな傷が付き易くな
る。従って、前記サンドブラストにおける砥粒吹き付け
圧力は０．１〜１．０ｋｇ／ｃｍ2 の範囲が好ましい。Further, if the abrasive blasting pressure in the sandblast is less than 0.1 kg / cm 2 , the insulating substrate 1
It becomes difficult to satisfactorily remove the deposits made of carbon and ceramics that adhere to the surface and the surface of the external lead terminal 7, and if it exceeds 1.0 kg / cm 2 , the surface of the insulating substrate 1 and the surface of the external lead terminal 7 become large. It is easily scratched. Therefore, the abrasive blasting pressure in the sandblast is preferably in the range of 0.1 to 1.0 kg / cm 2 .
【００３３】更にまた、前記サンドブラストにおける砥
粒吹き付け量は、０．２ｇ／ｃｍ2・秒未満では、絶縁
基体１表面及び外部リード端子７表面に付着したカーボ
ンやセラミックから成る付着物を効率良く除去すること
が困難となり、また３０ｇ／ｃｍ2 ・秒を越えると砥粒
が絶縁基体１上等に溜まりやすいものとなり、絶縁基体
１の表面や外部リード端子７の表面を均一に研磨清浄す
ることが困難となる傾向にある。従って、前記サンドブ
ラストにおける砥粒吹き付け量は、０．２〜３０ｇ／ｃ
ｍ2 ・秒の範囲が好ましい。Furthermore, if the amount of abrasive particles sprayed in the sandblast is less than 0.2 g / cm 2 · sec, the deposits made of carbon or ceramics on the surface of the insulating substrate 1 and the surfaces of the external lead terminals 7 can be efficiently removed. If it exceeds 30 g / cm 2 · sec, the abrasive grains are likely to accumulate on the insulating substrate 1 and the like, and the surface of the insulating substrate 1 and the surface of the external lead terminals 7 can be uniformly polished and cleaned. It tends to be difficult. Therefore, the amount of abrasive grains sprayed in the sandblast is 0.2 to 30 g / c.
The range of m 2 · sec is preferred.
【００３４】最後に、前記サンドブラストにより表面が
研磨清浄された絶縁基体１のボンディングパッド５ａ、
ブレーズパッド５ｂ及び外部リード端子７の露出表面に
めっき金属層９を被着させることにより図１に示すよう
な半導体素子収納用パッケージが完成する。Finally, the bonding pad 5a of the insulating substrate 1 whose surface has been polished and cleaned by the sandblasting,
By depositing the plated metal layer 9 on the exposed surfaces of the blaze pad 5b and the external lead terminals 7, the semiconductor element housing package as shown in FIG. 1 is completed.
【００３５】この場合、本発明の製造方法によって製作
される半導体素子収納用パッケージは、前記めっき金属
層９が被着される絶縁基体１のボンディングパッド５
ａ、ブレーズパッド５ｂ及び外部リード端子７の露出す
る表面がサンドブラストにより研磨清浄されており、め
っき金属層９に膨れや剥がれ、変色、シミ等を発生させ
る原因となるカーボンやセラミック等の付着物が完全に
研磨除去されているので、該ボンディングパッド５ａ、
ブレーズパッド５ｂ及び外部リード端子７の露出する表
面に被着されるめっき金属層９に膨れや剥がれ、変色、
シミ等が発生することはなく、従って、めっき金属層９
によりボンディングパッド５ａ、ブレーズパッド５ｂ及
び外部リード端子７が酸化腐食するのが有効に防止され
るとともにボンディングパッド５ａとボンディングワイ
ヤー６との接続及び外部リード端子７と外部電気回路基
板の配線導体との接続を容易、且つ強固なものとなすこ
とができる。In this case, the semiconductor element housing package manufactured by the manufacturing method of the present invention has the bonding pad 5 of the insulating substrate 1 on which the plating metal layer 9 is deposited.
a, the exposed surfaces of the blaze pad 5b and the external lead terminals 7 are polished and cleaned by sandblasting, and the deposits such as carbon and ceramics that cause swelling or peeling of the plated metal layer 9, discoloration, and stains are generated. Since it is completely removed by polishing, the bonding pad 5a,
Swelling or peeling, discoloration, and discoloration of the plated metal layer 9 applied to the exposed surfaces of the blaze pad 5b and the external lead terminals 7.
No stains are generated, and therefore the plated metal layer 9
This effectively prevents the bonding pad 5a, the blazed pad 5b, and the external lead terminal 7 from being oxidized and corroded, and the connection between the bonding pad 5a and the bonding wire 6 and the connection between the external lead terminal 7 and the wiring conductor of the external electric circuit board. The connection can be made easy and strong.
【００３６】なお、前記めっき金属層９は、ニッケルか
ら成る１〜１０μｍ程度の厚みの下地めっき金属層と金
から成る０．１〜５．０μｍ程度の仕上げめっき金属層
層の２層構造をしており、前記ニッケルから成る下地め
っき金属層と金から成る仕上げめっき金属層の何れも従
来周知の電解めっき法や無電解めっき法を採用すること
によりボンディングパッド５ａ、ブレーズパッド５ｂ及
び外部リード端子７の露出表面に所定の厚みに被着され
る。The plated metal layer 9 has a two-layer structure of a base plated metal layer made of nickel and having a thickness of about 1 to 10 μm, and a finish plated metal layer layer made of gold and having a thickness of about 0.1 to 5.0 μm. By adopting the conventionally well-known electrolytic plating method or electroless plating method for both the base plating metal layer made of nickel and the finish plating metal layer made of gold, the bonding pad 5a, the blazed pad 5b and the external lead terminal 7 are formed. To a predetermined thickness on the exposed surface of.
【００３７】また、本発明の半導体素子収納用パッケー
ジの製造方法は、上述の実施の形態に限定されるもので
はなく、本発明の要旨を逸脱しない範囲であれば種々の
変更が可能であることはいうまでもなく、例えば、本発
明の半導体素子収納用パッケージの製造方法は、外部リ
ード端子の他に銅や銅−タングステン等の金属から成る
ヒートシンクや鉄−ニッケル−コバルト等の金属から成
り、蓋体を絶縁基体に溶接する際の下地金属となるシー
ルリング等他の金属部材が絶縁基体にロウ付けされたタ
イプの半導体素子収納用パッケージの製造にも適用でき
る。Further, the method for manufacturing a package for accommodating semiconductor elements of the present invention is not limited to the above-mentioned embodiment, and various modifications can be made without departing from the gist of the present invention. Needless to say, for example, the manufacturing method of the package for storing a semiconductor element of the present invention includes a heat sink made of metal such as copper or copper-tungsten or a metal such as iron-nickel-cobalt in addition to the external lead terminal, It can also be applied to the manufacture of a package for housing a semiconductor element of a type in which another metal member such as a seal ring that serves as a base metal when the lid is welded to the insulating base is brazed to the insulating base.
【００３８】[0038]
【発明の効果】本発明の半導体素子収納用パッケージの
製造方法によれば、絶縁基体のブレーズパッドに外部リ
ード端子をロウ付けした後、前記絶縁基体の表面及び外
部リード端子の表面をサンドブラストにより研磨清浄し
たことから、絶縁基体のブレーズパッドに外部リード端
子をロウ付けした際に絶縁基体の表面や外部リード端子
の表面に付着したカーボンやセラミック等の付着物が完
全に除去され、前記カーボンやセラミック等の付着物が
除去された絶縁基体のボンディングパッドやブレーズパ
ッド、外部リード端子の露出表面にめっき金属層を被着
させたことから、該めっき金属層に膨れや剥がれ、変色
やシミ等が発生することは一切なく、従って、ボンディ
ングパッドやブレーズパッド及び外部リード端子が酸化
腐食することが有効に防止されるとともに半導体素子の
電極とボンディングパッドとの接続及び外部リード端子
と外部電気回路基板の配線導体との接続を容易、且つ強
固なものとなすことができる。According to the method of manufacturing a package for housing a semiconductor element of the present invention, after external lead terminals are brazed to the blaze pad of the insulating base, the surface of the insulating base and the surface of the external lead terminals are sandblasted. Since it has been cleaned, when the external lead terminals are brazed to the blazed pad of the insulating base, the adhered substances such as carbon and ceramic adhered to the surface of the insulating base and the surface of the external lead terminals are completely removed. Since the plating metal layer is adhered to the exposed surface of the bonding pad or blazed pad of the insulating substrate or the external lead terminal from which adhered substances have been removed, swelling or peeling of the plating metal layer, discoloration, stains, etc. occur Therefore, the bonding pads, blazed pads and external lead terminals may be oxidized and corroded. While being prevented connection between the connection and the external lead terminals and the external electric circuit board wiring conductor between the electrode and the bonding pads of the semiconductor element easily it can be made with and firm things.
【００３９】また、本発明の半導体素子収納用パッケー
ジの製造方法によれば、前記絶縁基体の表面及び外部リ
ード端子の表面をサンドブラストにより研磨清浄する工
程において、前記絶縁基体のボンディングパッドの表面
粗さが、ＪＩＳーＢー０６０１ー１９９４に規定の中心
線平均粗さ（Ｒａ）で０．１μｍ≦Ｒａ≦１．０μｍ、
最大高さ（Ｒｙ）で０．５μｍ≦Ｒｙ≦４．０μｍとな
るように研磨清浄すると、半導体素子の電極をボンディ
ングパッドに電気的に接続する際にボンディングパッド
と半導体素子の電極との電気的接続を容易、且つ強固な
ものとなすことができる。Further, according to the method for manufacturing a package for housing a semiconductor element of the present invention, in the step of polishing and cleaning the surface of the insulating substrate and the surface of the external lead terminal by sandblasting, the surface roughness of the bonding pad of the insulating substrate is increased. Is 0.1 μm ≦ Ra ≦ 1.0 μm in center line average roughness (Ra) specified in JIS-B-0601-1994,
If polishing and cleaning are performed so that the maximum height (Ry) is 0.5 μm ≦ Ry ≦ 4.0 μm, when the electrodes of the semiconductor element are electrically connected to the bonding pad, the electrical connection between the bonding pad and the electrode of the semiconductor element is performed. The connection can be made easy and strong.
【図１】本発明の製造方法によって製作された半導体素
子収納用パッケージの一実施形態を示す断面図である。FIG. 1 is a cross-sectional view showing an embodiment of a semiconductor element housing package manufactured by a manufacturing method of the present invention.
【図２】本発明の製造方法を説明するための図である。FIG. 2 is a diagram for explaining the manufacturing method of the present invention.
【図３】本発明の製造方法を説明するための図である。FIG. 3 is a diagram for explaining the manufacturing method of the present invention.
【図４】本発明の製造方法を説明するための図である。FIG. 4 is a diagram for explaining the manufacturing method of the present invention.
【図５】本発明の製造方法を説明するための図である。FIG. 5 is a diagram for explaining the manufacturing method of the present invention.
１・・・・・・絶縁基体 ２・・・・・・蓋体 ３・・・・・・半導体素子 ４・・・・・・容器 ５ｂ・・・・・ブレーズパッド ７・・・・・・外部リード端子 ８・・・・・・ロウ材 ９・・・・・・めっき金属層 1 ··· Insulating substrate 2 ·· Lid 3 ·· Semiconductor element 4 ·· Container 5b · Blaze pad 7 ·· External lead terminal 8 ... Brazed material 9 ... Plated metal layer
Claims (2)
れるボンディングパッド及び外部リード端子がロウ付け
されるブレーズパッドを有する絶縁基体と外部リード端
子とを準備する工程と、前記絶縁基体のブレーズパッド
に外部リード端子をロウ材を介して接合する工程と、前
記絶縁基体の表面及び外部リード端子の表面をサンドブ
ラストにより研磨清浄する工程と、前記外部リード端子
の表面、ボンディングパッドの表面及びブレーズパッド
表面にめっき金属層を被着させる工程と、から成ること
を特徴とする半導体素子収納用パッケージの製造方法。1. A step of preparing an insulating base having a bonding pad to which an electrode of a semiconductor element is electrically connected and a blaze pad to which an external lead terminal is brazed, and an external lead terminal are provided on the surface, and the insulating base. A step of joining the external lead terminal to the blazed pad via a brazing material; a step of polishing and cleaning the surface of the insulating substrate and the surface of the external lead terminal by sandblasting; a surface of the external lead terminal, a surface of the bonding pad and a blazed pad. A method of manufacturing a package for accommodating a semiconductor device, comprising the step of depositing a plated metal layer on the pad surface.
表面をサンドブラストにより研磨清浄する工程におい
て、前記絶縁基体のボンディングパッドの表面粗さが、
ＪＩＳーＢー０６０１ー１９９４に規定の中心線平均粗
さ（Ｒａ）で０．１μｍ≦Ｒａ≦１．０μｍ、最大高さ
（Ｒｙ）で０．５μｍ≦Ｒｙ≦４．０μｍとなるように
研磨清浄することを特徴とする請求項１に記載の半導体
素子収納用パッケージの製造方法。2. A surface roughness of a bonding pad of the insulating substrate in a step of polishing and cleaning the surface of the insulating substrate and the surface of the external lead terminal by sandblasting.
Polished to have a center line average roughness (Ra) of 0.1 μm ≦ Ra ≦ 1.0 μm and a maximum height (Ry) of 0.5 μm ≦ Ry ≦ 4.0 μm as specified in JIS-B-0601-1994. The method of manufacturing a package for accommodating a semiconductor device according to claim 1, wherein the package is cleaned.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP03608296A JP3266490B2 (en) | 1996-02-23 | 1996-02-23 | Method for manufacturing package for housing semiconductor element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP03608296A JP3266490B2 (en) | 1996-02-23 | 1996-02-23 | Method for manufacturing package for housing semiconductor element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH09232466A true JPH09232466A (en) | 1997-09-05 |
| JP3266490B2 JP3266490B2 (en) | 2002-03-18 |
Family
ID=12459832
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP03608296A Expired - Fee Related JP3266490B2 (en) | 1996-02-23 | 1996-02-23 | Method for manufacturing package for housing semiconductor element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3266490B2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPWO2015016173A1 (en) * | 2013-07-29 | 2017-03-02 | 京セラ株式会社 | Wiring board, wiring board with leads, and electronic device |
| JP2017108021A (en) * | 2015-12-10 | 2017-06-15 | 日立金属株式会社 | Method for manufacturing multilayer ceramic substrate and multilayer ceramic substrate |
| CN114126213A (en) * | 2020-08-25 | 2022-03-01 | 日本特殊陶业株式会社 | Wiring board |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014041851A (en) * | 2010-12-24 | 2014-03-06 | Asahi Glass Co Ltd | Coupling substrate and method for manufacturing the same, element substrate and light emitting device |
-
1996
- 1996-02-23 JP JP03608296A patent/JP3266490B2/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPWO2015016173A1 (en) * | 2013-07-29 | 2017-03-02 | 京セラ株式会社 | Wiring board, wiring board with leads, and electronic device |
| JP2017108021A (en) * | 2015-12-10 | 2017-06-15 | 日立金属株式会社 | Method for manufacturing multilayer ceramic substrate and multilayer ceramic substrate |
| CN114126213A (en) * | 2020-08-25 | 2022-03-01 | 日本特殊陶业株式会社 | Wiring board |
| JP2022037312A (en) * | 2020-08-25 | 2022-03-09 | 日本特殊陶業株式会社 | Wiring board |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3266490B2 (en) | 2002-03-18 |
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