JPH0917941A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH0917941A
JPH0917941A JP16390095A JP16390095A JPH0917941A JP H0917941 A JPH0917941 A JP H0917941A JP 16390095 A JP16390095 A JP 16390095A JP 16390095 A JP16390095 A JP 16390095A JP H0917941 A JPH0917941 A JP H0917941A
Authority
JP
Japan
Prior art keywords
inner lead
island
inner leads
wire
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16390095A
Other languages
Japanese (ja)
Other versions
JP2637940B2 (en
Inventor
Kaori Nishioka
かおり 西岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Kyushu Ltd
Original Assignee
NEC Kyushu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Kyushu Ltd filed Critical NEC Kyushu Ltd
Priority to JP16390095A priority Critical patent/JP2637940B2/en
Publication of JPH0917941A publication Critical patent/JPH0917941A/en
Application granted granted Critical
Publication of JP2637940B2 publication Critical patent/JP2637940B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE: To ensure the strength of joints between inner leads and wires without increases in material cost due to increases in the length of wires or increase in manufacturing cost due to increases in processing time in a semiconductor device of such a stricture that a semiconductor pellet and inner leads are connected with each other by wire bonding. CONSTITUTION: Second inner leads 6 are placed between first inner leads 5. The ends of the first inner leads 5 are extended toward an island 2 as far as their width is processable. The second inner leads 6 are extended closer to the island 2 than the ends of the first inner leads 5 are, and the ends of the second inner leads 6 are widened. These inner leads of two types are coupled with each other and secured in the direction of the row using an insulating tape 3 extending from the ends of the first inner leads 5 to the widened ends of the second inner leads 6. The bonding pads on the pellet 1 and the inner leads 5, 6 are connected with each other by a bonding wire 4 bridging the insulating tape 3.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体装置に関し、特
に、金属製リードフレームのインナリードと半導体ペレ
ットのボンディングパッドとがワイヤボンディングで接
続されている構造の半導体装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device having a structure in which an inner lead of a metal lead frame and a bonding pad of a semiconductor pellet are connected by wire bonding.

【0002】[0002]

【従来の技術】この種の従来の半導体装置の一例の上面
図を、図3(a)に示す。又、断面図を図3(b)に示
す。この半導体装置は、特開昭64ー27236号公報
に記載されたものである。図3を参照して、この半導体
装置では、半導体ペレット1のボンディングパッド(接
続用電極)8とインナリード9のワイヤ接合部10とが
ワイヤ4によって、ワイヤボンディングで結ばれてい
る。インナリード9には、その先端部であって上記のワ
イヤ接合部10よりペレット1に近い部分に、上面側
(リードフレームのペレット搭載側の面)から絶縁性テ
ープ3が貼り付けられている。このテープ3によってイ
ンナリード9は、隣接するインナリードの先端部が同一
平面上に揃えられる。このことにより、ワイヤボンディ
ング時に、インナリード9のワイヤ接合部10とワイヤ
4との間に十分な熱と圧力とを加えることができるの
で、インナリード9とワイヤ4との間の接合状態が良好
なものとなる。
2. Description of the Related Art A top view of an example of a conventional semiconductor device of this kind is shown in FIG. FIG. 3B is a cross-sectional view. This semiconductor device is described in JP-A-64-27236. Referring to FIG. 3, in this semiconductor device, a bonding pad (connection electrode) 8 of semiconductor pellet 1 and a wire bonding portion 10 of inner lead 9 are connected by wire 4 by wire bonding. The insulating tape 3 is attached to the inner lead 9 from the upper surface side (the surface of the lead frame on the pellet mounting side) at the tip of the inner lead 9 and closer to the pellet 1 than the wire bonding portion 10 described above. The inner leads 9 of the inner leads 9 are aligned on the same plane by the tape 3. Thereby, sufficient heat and pressure can be applied between the wire bonding portion 10 of the inner lead 9 and the wire 4 at the time of wire bonding, so that the bonding state between the inner lead 9 and the wire 4 is good. It becomes something.

【0003】一方、図4(a)にその上面図を示し、図
4(b)にその断面図を示す半導体装置は、この種の半
導体装置の他の例であって、特開平3ー124055号
公報に記載されたものである。図4を参照すると、この
半導体装置では、インナリード9の下面にその最先端を
含むように、絶縁性テープ3が貼着されている。この貼
着のための熱硬化性接着剤7は、隣接リード間に入り込
んでインナリードどうしを連結、固定するように、イン
ナリード間で硬化せしめられている。このことからこの
半導体装置では、熱ストレスを受けたときでも熱ひずみ
を生じることがなく、強度が高まる。又、ボンディング
に際してもインナリードに変形が生じることなく、ボン
ディングエリアが正しい位置間隔を保つので、ボンディ
ング精度が高まる。しかも、ボンディング時の衝撃によ
る変形を防止できるので、半導体装置の信頼性を高める
ことができる。
On the other hand, a semiconductor device whose top view is shown in FIG. 4A and whose cross-sectional view is shown in FIG. 4B is another example of this type of semiconductor device. It is described in Japanese Patent Publication No. Referring to FIG. 4, in this semiconductor device, insulating tape 3 is attached to the lower surface of inner lead 9 so as to include the leading end. The thermosetting adhesive 7 for this attachment is hardened between the inner leads so as to enter between the adjacent leads to connect and fix the inner leads. For this reason, in this semiconductor device, even when subjected to thermal stress, no thermal distortion occurs and the strength is increased. Also, during bonding, the bonding area is kept at the correct position interval without deformation of the inner lead, so that bonding accuracy is improved. In addition, since deformation due to impact during bonding can be prevented, the reliability of the semiconductor device can be improved.

【0004】[0004]

【発明が解決しようとする課題】上述した特開昭64ー
27236号公報記載の半導体装置では、インナリード
先端部分を、上面側から、絶縁性テープ3で、固定して
いるので、ペレットのボンディングパッド8とインナリ
ードのワイヤ接合部10とを結ぶワイヤ4は必然的に、
テープ3を跨ぐことになる。従ってワイヤ長は、従来の
長さに加えて更に、テープ3の幅と、テープ端からワイ
ヤ接合部10までの距離とが必要になる。又、ワイヤボ
ンディングに要する時間が長くなる。その結果、ワイヤ
の材料費が増加し、製造工期が長期化して、製造コスト
が上昇してしまう。
In the semiconductor device described in JP-A-64-27236, the tip of the inner lead is fixed from the upper surface with an insulating tape 3, so that the pellet bonding is performed. The wire 4 connecting the pad 8 and the wire joint 10 of the inner lead is inevitably
It will straddle the tape 3. Therefore, in addition to the conventional length, the wire length requires the width of the tape 3 and the distance from the tape end to the wire joint 10. In addition, the time required for wire bonding increases. As a result, the material cost of the wire increases, the manufacturing period is lengthened, and the manufacturing cost increases.

【0005】一方、特開平3ー124055号公報記載
の半導体装置では、インナリード9先端部の裏面にポリ
イミドテープのような絶縁性テープ3を貼着している。
ところで、ワイヤボンディング時には、インナリード9
下方から金属製ヒータプレートを宛てがい、一方、イン
ナリード上方からはウエッジやキャピラリのようなボン
ディングツールで、ワイヤ4とインナリード9に熱と圧
力とを加えるのであるが、図4に示す半導体装置では、
インリード9とその下のヒータプレート(図示せず)と
の間にポリイミドテープが介在することになる。ところ
がポリイミドテープに限らず絶縁性テープは一般に、金
属に比べて熱伝導性が悪く硬度が低い。従って、図3に
示す半導体装置では金属製ヒータプレートとインナリー
ドとを直接接触させることができるのに対して、図4に
示す半導体装置では、ワイヤボンディング時に十分な熱
と圧力とを加えることができない。その結果、ワイヤ接
合部の接合強度が低い。
On the other hand, in the semiconductor device described in Japanese Patent Application Laid-Open No. 3-124555, an insulating tape 3 such as a polyimide tape is attached to the back surface of the tip of the inner lead 9.
By the way, at the time of wire bonding, the inner leads 9
Heat and pressure are applied to the wire 4 and the inner lead 9 by applying a bonding tool such as a wedge or a capillary from above the inner lead to the metal heater plate from below. Then
A polyimide tape is interposed between the in-lead 9 and a heater plate (not shown) thereunder. However, not only polyimide tape but also insulating tape generally has poor thermal conductivity and low hardness as compared with metal. Accordingly, in the semiconductor device shown in FIG. 3, the metal heater plate and the inner lead can be brought into direct contact, whereas in the semiconductor device shown in FIG. 4, sufficient heat and pressure can be applied during wire bonding. Can not. As a result, the bonding strength of the wire bonding part is low.

【0006】従って、本発明は、インナリードとペレッ
トとをボンディングワイヤにより接続する構造の半導体
装置において、ワイヤの長尺化に伴う材料費および工期
の増加による製造コストの増加なしに、インナリードと
ワイヤとの接合強度を確保することを目的とするもので
ある。
Accordingly, the present invention provides a semiconductor device having a structure in which an inner lead and a pellet are connected to each other by a bonding wire without increasing the manufacturing cost due to an increase in material cost and work period due to the elongation of the wire. The purpose is to secure the bonding strength with the wire.

【0007】[0007]

【課題を解決するための手段】本発明の半導体装置は、
半導体ペレットを搭載するためのアイランドと、そのア
イランドの外方からアイランドに向けて水平方向に延び
る複数のインナリードと、アイランドに搭載された半導
体ペレットとを少くとも備え、前記半導体ペレットに設
けられたボンディングパッドとインナリードとが金属細
線を用いたワイヤボンデンィングにより接続された構造
の半導体装置において、前記複数のインナリードが、ア
イランド近傍まで延びる第1のインナリードと、その第
1のインナリードの間に少くとも一つ置きに配置された
インナリードであって、第1のインナリードのアイラン
ド側の最先端位置より更にアイランドに近い位置まで延
びて先端部分を拡幅された構造の第2のインナリードと
で構成されると共に、前記二種類のインナリードが、第
1のインナリードのアイランド側先端部分から第2のイ
ンナリードのアイランド側の前記拡幅された先端部分に
亘る絶縁性テープで、並び方向に連結、固定され、前記
半導体ペレットのボンディングパッドとインナリードと
を接続する金属細線が、前記絶縁性テープを跨いでワイ
ヤボンディングされていることを特徴とする。
According to the present invention, there is provided a semiconductor device comprising:
An island for mounting a semiconductor pellet, a plurality of inner leads extending horizontally from the outside of the island toward the island, and at least a semiconductor pellet mounted on the island, provided on the semiconductor pellet In a semiconductor device having a structure in which a bonding pad and an inner lead are connected by wire bonding using a thin metal wire, the plurality of inner leads are a first inner lead extending to the vicinity of an island; A second inner lead having a structure in which at least every other inner lead is arranged therebetween, and extends to a position closer to the island than the most distal end position on the island side of the first inner lead and has a widened end portion. And the two types of inner leads are a first inner lead. Insulating tape extending from the tip end on the island side to the widened tip end on the island side of the second inner lead, is connected and fixed in the direction of the line, and connects the bonding pad of the semiconductor pellet to the inner lead. However, it is characterized in that wire bonding is performed over the insulating tape.

【0008】[0008]

【実施例】次に、本発明の好適な実施例について、図面
を参照して説明する。図1は、本発明の一実施例による
半導体装置の要部を拡大して示す上面図であり、図2
は、その側面図である。図1および図2を参照して、本
実施例は、アイランド2方向に延びる第1インナリード
5と、その第1インナリード5より更にアイランド2の
近くまで延びる第2インナリードの、2種類のインナリ
ードを備えている。そして、第1インナリード5の先端
部から第2インナリード6の先端部にかけて、インナリ
ード上面(リードフレームのペレット搭載側の面)に絶
縁性テープ3が貼着されている。テープ3の貼着位置
は、貼着精度を考慮して、第2インナリード6の先端よ
り、アイランド2から離れる方向へ0.2mmとして、
第2インナリード6の最先端からはみ出すことのないよ
うにする。
Next, a preferred embodiment of the present invention will be described with reference to the drawings. FIG. 1 is an enlarged top view showing a main part of a semiconductor device according to one embodiment of the present invention.
Is a side view thereof. Referring to FIGS. 1 and 2, the present embodiment has two types of first inner leads 5 extending in the direction of island 2 and second inner leads extending closer to island 2 than first inner leads 5. It has an inner lead. The insulating tape 3 is adhered to the upper surface of the inner lead (the surface of the lead frame on the pellet mounting side) from the distal end of the first inner lead 5 to the distal end of the second inner lead 6. The position of the tape 3 to be applied is set at 0.2 mm in the direction away from the island 2 from the tip of the second inner lead 6 in consideration of the adhesion accuracy.
It does not protrude from the tip of the second inner lead 6.

【0009】第2インナリード6は、第1インナリード
5の間に配置する。第1インナリード5は、リードフレ
ーム製造の際の加工可能な下限のリード幅まで、先端を
アイランド2側に延長してある。一方、第2インナリー
ド6はその先端を、上記の第1インナリード5の延長さ
れた最先端より更にアイランド2側に、テープ3の貼着
可能な範囲まで、延長してある。第1,第2インナリー
ドとも、単に延長するだけでは、リード先端の幅が狭く
なりテープ3との接着面積が小さくなるので、接着力が
低くなってしまう。そこで、先端の隣接リード間間隔が
広い方の、第2インナリード6の先端幅を広げ接着面積
を拡げることにより、テープ3との接着力を高めてい
る。
The second inner leads 6 are arranged between the first inner leads 5. The tip of the first inner lead 5 is extended to the island 2 side to the minimum lead width that can be processed at the time of manufacturing a lead frame. On the other hand, the tip of the second inner lead 6 is extended further to the island 2 side than the extended front end of the first inner lead 5 to a range where the tape 3 can be stuck. In both the first and second inner leads, simply extending the length of the lead leads to a smaller width at the tip of the lead and a smaller bonding area with the tape 3, so that the bonding strength is reduced. Therefore, the adhesive force with the tape 3 is increased by increasing the width of the distal end of the second inner lead 6 where the distance between the adjacent leads at the distal end is wider and increasing the bonding area.

【0010】絶縁性テープ3が貼り付けられる第1イン
ナリード5および第2インナリード6と、アイランド2
上に搭載された半導体ペレット1のボンディングバッド
との間のワイヤボンディングは、ワイヤ4がテープ3を
跨ぐようにして行う。
A first inner lead 5 and a second inner lead 6 to which the insulating tape 3 is attached;
The wire bonding between the semiconductor pellet 1 and the bonding pad mounted thereon is performed such that the wire 4 straddles the tape 3.

【0011】本実施例では、図3に示す従来の半導体装
置に比べて、インナリードのアイランド側先端を可能な
限り延長して、ワイヤ長を短縮している。又、インナリ
ード先端の並び方向の連結、固定を、インナリード上面
側に貼着した絶縁性テープに依っている。これにより、
インナリードとワイヤとのボンディング時に、インナリ
ードとヒータプレートとを直接接触させて十分に加熱、
加圧し、インナリードとワイヤとの接合強度を確保して
いる。
In this embodiment, as compared with the conventional semiconductor device shown in FIG. 3, the tip of the inner lead on the island side is extended as much as possible to shorten the wire length. Further, the connection and fixing of the tips of the inner leads in the arrangement direction depend on the insulating tape adhered to the upper surface side of the inner leads. This allows
At the time of bonding the inner lead and the wire, the inner lead and the heater plate are brought into direct contact and
Pressure is applied to ensure the bonding strength between the inner lead and the wire.

【0012】尚、これまでの説明から、第2インナリー
ド6は、必ずしもこれを第1インナリードの1本ごとに
1本ずつ対応させて配置する必要はなく、複数本に1本
を配置するようにしてもよく、更には、配置の繰返しに
規則性を持たせる必要もないことは、明かであろう。
From the above description, it is not necessary to arrange the second inner leads 6 one by one for each of the first inner leads, and one second inner lead 6 is arranged for a plurality of first inner leads. Obviously, it is clear that the arrangement does not need to be regular.

【0013】[0013]

【発明の効果】以上説明したように、本発明では、イン
ナリードのアイランド側先端を可能な限り延長して、ワ
イヤ長を短縮している。又、インナリード先端の並び方
向の連結、固定を、インナリード上面側に貼着した絶縁
性テープに依って行い、インナリードとワイヤとのボン
ディング時に、インナリードとヒータプレートとを直接
接触させて十分に加熱、加圧している。
As described above, in the present invention, the tip of the inner lead on the island side is extended as much as possible to shorten the wire length. In addition, the connection and fixing of the tip of the inner lead in the direction of alignment are performed by using an insulating tape attached to the upper surface of the inner lead, and when the inner lead and the wire are bonded, the inner lead and the heater plate are brought into direct contact. Heating and pressurization are sufficient.

【0014】これにより本発明によれば、ワイヤの長尺
化に伴う材料費および工期の長期化による製造コストの
上昇なしに、インナリード先端に加わる外力によるイン
ナリードおよびワイヤの変形を防止し、しかもインナリ
ードとワイヤとの接合強度を確保できる。
According to the present invention, the deformation of the inner lead and the wire due to the external force applied to the tip of the inner lead can be prevented without increasing the material cost due to the lengthening of the wire and the production cost due to the elongation of the construction period. Moreover, the bonding strength between the inner lead and the wire can be secured.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例による半導体装置の要部を拡
大して示す上面図である。
FIG. 1 is an enlarged top view showing a main part of a semiconductor device according to an embodiment of the present invention.

【図2】本発明の一実施例による半導体装置の要部を拡
大して示す側面図である。
FIG. 2 is an enlarged side view showing a main part of the semiconductor device according to one embodiment of the present invention.

【図3】ワイヤボンディングを用いた従来の半導体装置
の一例の、上面図および断面図である。
FIG. 3 is a top view and a cross-sectional view of an example of a conventional semiconductor device using wire bonding.

【図4】ワイヤボンディングを用いた従来の半導体装置
の他の例の、上面図および断面図である。
FIG. 4 is a top view and a cross-sectional view of another example of a conventional semiconductor device using wire bonding.

【符号の説明】[Explanation of symbols]

1 ペレット 2 アイランド 3 絶縁性テープ 4 ワイヤ 5 第1インナリード 6 第2インナリード 7 接着剤 8 ボンディングパッド 9 インナリード 10 ワイヤ接合部 REFERENCE SIGNS LIST 1 pellet 2 island 3 insulating tape 4 wire 5 first inner lead 6 second inner lead 7 adhesive 8 bonding pad 9 inner lead 10 wire joint

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 半導体ペレットを搭載するためのアイラ
ンドと、そのアイランドの外方からアイランドに向けて
水平方向に延びる複数のインナリードと、アイランドに
搭載された半導体ペレットとを少くとも備え、前記半導
体ペレットに設けられたボンディングパッドとインナリ
ードとが金属細線を用いたワイヤボンデンィングにより
接続された構造の半導体装置において、 前記複数のインナリードが、アイランド近傍まで延びる
第1のインナリードと、その第1のインナリードの間に
少くとも一つ置きに配置されたインナリードであって、
第1のインナリードのアイランド側の最先端位置より更
にアイランドに近い位置まで延びて先端部分を拡幅され
た構造の第2のインナリードとで構成されると共に、 前記二種類のインナリードが、第1のインナリードのア
イランド側先端部分から第2のインナリードのアイラン
ド側の前記拡幅された先端部分に亘る絶縁性テープで、
並び方向に連結、固定され、 前記半導体ペレットのボンディングパッドとインナリー
ドとを接続する金属細線が、前記絶縁性テープを跨いで
ワイヤボンディングされていることを特徴とする半導体
装置。
An island for mounting a semiconductor pellet, a plurality of inner leads extending horizontally from the outside of the island toward the island, and at least a semiconductor pellet mounted on the island; In a semiconductor device having a structure in which a bonding pad provided on a pellet and an inner lead are connected by wire bonding using a thin metal wire, the plurality of inner leads extend to a vicinity of an island; An inner lead arranged at least every other between one inner lead,
The first inner lead includes a second inner lead having a structure in which the first inner lead extends to a position closer to the island than the frontmost position on the island side and has a widened end portion. An insulating tape extending from the island-side tip portion of the first inner lead to the widened tip portion on the island side of the second inner lead;
A semiconductor device, wherein a thin metal wire connected and fixed in the arrangement direction and connecting a bonding pad of the semiconductor pellet and an inner lead is wire-bonded across the insulating tape.
JP16390095A 1995-06-29 1995-06-29 Semiconductor device Expired - Fee Related JP2637940B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16390095A JP2637940B2 (en) 1995-06-29 1995-06-29 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16390095A JP2637940B2 (en) 1995-06-29 1995-06-29 Semiconductor device

Publications (2)

Publication Number Publication Date
JPH0917941A true JPH0917941A (en) 1997-01-17
JP2637940B2 JP2637940B2 (en) 1997-08-06

Family

ID=15782962

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16390095A Expired - Fee Related JP2637940B2 (en) 1995-06-29 1995-06-29 Semiconductor device

Country Status (1)

Country Link
JP (1) JP2637940B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009224726A (en) * 2008-03-18 2009-10-01 Powertech Technology Inc Col semiconductor package

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009224726A (en) * 2008-03-18 2009-10-01 Powertech Technology Inc Col semiconductor package

Also Published As

Publication number Publication date
JP2637940B2 (en) 1997-08-06

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