JP3151323B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an IC, an LSI, and a VLS.
Highly integrated semiconductor integrated circuits (semiconductor chips)
And a method for manufacturing the same.

[0002]

2. Description of the Related Art In general, lead frames are often used for mounting semiconductor chips such as ICs, LSIs and VLSIs. This lead frame usually includes an island formed at the center and inner leads formed around the island, and the semiconductor chip is die-bonded on the island.

Under these circumstances, recently, there is no portion corresponding to an island, and a semiconductor chip is provided below or above the surface of a lead frame.
A semiconductor device provided with a lead frame having an ad on chip (COL) or a COL (chip on lead) structure has been developed. The advantages of using these LOC or COL structures include product development in a variety of packages, high-speed operation and noise countermeasures during multi-bit simultaneous output, support for larger semiconductor chips, and reduction in lead frame design time. Etc.,
A great effect can be expected in solving many problems in producing a state-of-the-art semiconductor chip.

FIG. 6 is a configuration diagram of a semiconductor device having a lead frame having this kind of LOC structure. A semiconductor chip 2 is mounted on the lead frame 1. The lead frame 1 is formed of a conductive material (a 42 alloy, a copper alloy, a copper material sandwiched between 42 alloys on both sides thereof, or the like).

The tip of each inner lead 3 of the lead frame 1 is positioned (aligned) with respect to each aluminum electrode (pad) 4 of the semiconductor chip 2, and further, the tip of each inner lead 3 is connected to the semiconductor chip 2.
Are connected by wire bonding with bonding wires (Au wire, Al wire, etc.) 5.

Here, in order to position the tip of each inner lead 3 and each pad 4 of the semiconductor chip 2, the semiconductor chip 2 and the inner lead 3 are temporarily fixed with a double-sided adhesive tape 6 before performing wire bonding. It is done by doing.

In connection by such wire bonding, the shortest distance between adjacent bonding wires 5 is restricted by the outer shape of the bonding capillary (needle) used, and the distance between the electrodes 4 on the semiconductor chip 2 is reduced. It is difficult to reduce the size to about 100 μm or less.

Further, in order to connect the Au wire or the Al wire to the pad 4 on the semiconductor chip 2 with a metal, it is necessary to apply a physical load such as heating, pressurizing, ultrasonic vibration, etc. May damage the semiconductor chip 2 itself.

Therefore, in order to solve the above-mentioned problems, recently, for example, one disclosed in Japanese Patent Application Laid-Open No. 4-37149 has been proposed. That is, what is shown here is that the inner leads of the lead frame are brought into contact with the pads of the semiconductor chip, and then the inner leads and the pads of the semiconductor chip are directly contacted with metal plating or a conductive adhesive. The connection is made by using in combination with metal plating.

However, when the tip of each inner lead is brought close to or brought into contact with each pad on the semiconductor chip, unless the alignment accuracy between the tip of each inner lead 3 and each pad 4 is high, these inner leads 3 may be formed. The connection between the tip and each pad 4 is not reliably performed, and a non-contact portion may occur.

That is, the tip of the inner lead 3 is half-etched to improve the contact with the pad 4 to form a small tip, and the inner lead is bent by depressing to have a spring property. To apply contact pressure to the pad.

However, when half etching and depressing are performed on each inner lead 3, the alignment accuracy between the tip of each inner lead 3 and each pad 4 is reduced.

For this reason, the tip of the inner lead 3 and each pad 4 are not connected with a predetermined connection strength, and the tip of the inner lead 3 and the pad 4 are not connected in subsequent steps such as molding.
May peel off.

Further, when the tip of the inner lead 3 comes into contact with the pad 4 during the temporary fixing, the pad 4 may be damaged. For this reason, there is a possibility that the pad, aluminum (Al) wiring and the like are corroded from the damaged portion of the pad 4.

[0015]

As described above, during the temporary fixing, if the alignment accuracy between the tip of each inner lead 3 and each pad 4 is not high, a non-contact portion may occur. Further, when the tip of the inner lead 3 comes into contact with the pad 4 during the temporary fixing, the pad 4 may be damaged.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a semiconductor device which can increase the alignment accuracy between the tip of the inner lead and the pad, does not generate a non-contact portion, and does not damage the pad, and a method of manufacturing the same. .

[0017]

According to the present invention, there is provided a semiconductor device in which an electrode on a semiconductor chip and a tip of an inner lead of a lead frame are connected by plating. A double-sided adhesive tape for temporarily fixing the semiconductor chip by thermocompression bonding,
A semiconductor device which has a cutting portion formed on the surface of the inner lead on the side of the semiconductor chip and where the double-sided adhesive tape is bonded, to achieve the above object.

In this case, the cut portion is formed at a depth equal to or greater than the thickness of the double-sided adhesive tape.
It is formed by performing a half etching process.

Further, the tip of the inner lead is formed such that a portion in contact with the pad of the semiconductor chip by forming a cut portion is smaller than the shape of this electrode.

According to the present invention, in the above semiconductor device,
A heat-shrinkable double-sided adhesive tape for temporarily fixing the inner lead and the semiconductor chip by thermocompression bonding, and at a place where the double-sided adhesive tape is bonded to the inner lead, and at a depth equal to or less than the thickness of the double-sided adhesive tape, for example, A semiconductor device that achieves the above object by providing a cut portion formed by performing a half etching process.

[0021]

By providing such means, the surface of the inner lead of the lead frame on the semiconductor chip side can be
For example, the semiconductor chip is cut by a half-etching process, and then the chip is temporarily fixed by thermocompression bonding with a double-sided adhesive tape interposed between the cut portion and the semiconductor chip. In this case, the cut portion is formed at a depth equal to or greater than the thickness of the double-sided adhesive tape. If the double-sided adhesive tape has high heat shrinkability, the cut portion is formed to be shallower than the thickness of the double-sided adhesive tape. After the temporary fixing, the electrodes of the semiconductor chip and the tips of the inner leads are connected by, for example, electroplating.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a first embodiment of the present invention will be described with reference to the drawings. The same parts as those in FIG. 6 are denoted by the same reference numerals, and detailed description thereof will be omitted.

FIG. 1 is an overall configuration diagram of a semiconductor device. A plurality of inner leads 11 are formed on a lead frame 10 formed of a conductive material. As shown in FIG. 2, the inner leads 11 are formed of, for example, an iron (Fe) -nickel (Ni) alloy, that is, a 42 alloy, and are formed in a thin plate shape having a thickness a of about 150 μm.

A half-etched portion 12 is formed on these inner leads 11. The position of the half-etched portion 12 is on the side facing the semiconductor chip 2 when the semiconductor chip 2 is temporarily fixed, and is where the double-sided tape 6 for temporarily fixing the semiconductor chip 2 is bonded. . The double-sided tape 6 is a double-sided tape using an acrylic adhesive.

The half-etched portion 12 is formed by performing a half-etching process.
The etching depth b is 90 to 100 μm. The etching depth is formed to be equal to or greater than the thickness of the double-sided tape 6.

On the other hand, the tip 13 of the inner lead 11
By applying the half-etched portion 12, the size of the pad 4 on the semiconductor chip 2 is smaller than that of the pad 4. That is, if one side c of the pad 4 is formed to 100 μm as shown in FIG. 3, half etching is performed while leaving the length d of the tip 13 of the inner lead 11 by 80 μm.

With this configuration, when the semiconductor chip 2 is temporarily fixed to the lead frame 10, the semiconductor chip 2 and the half-etched portion 12
And a double-sided tape 6 is interposed therebetween. In this case, since the depth of the half-etched portion 12 is greater than the thickness of the double-sided tape 6, the tip of the inner lead 11 reliably contacts the pad 4 as shown in FIG.

The tip of the inner lead 11 is
Since this is smaller than the shape of the pad 4, the pad 4 is securely contacted and the pad 4 is not damaged. Then, in this state, the positioning of each pad 4 on the semiconductor chip 2 and the tip of each inner lead 11 is performed.

Thereafter, the semiconductor chip 2 of the double-sided tape 6 and each inner lead 11 are thermocompression-bonded. The heating temperature in this thermocompression bonding is approximately 200 ° C.

After the temporary fixing, the tip of each inner lead 11 and each pad 4 are connected by, for example, electroplating.

As described above, in the first embodiment,
The surface of the inner lead 11 on the side of the semiconductor chip 2 is subjected to half-etching treatment. The double-sided tape 6 is interposed between the half-etched portion 12 and the semiconductor chip 2 for thermocompression bonding to temporarily fix the pad. Since the inner lead 4 and the inner lead tip 13 are connected by electroplating or the like, half-etching or depressing of the inner lead tip 13 becomes unnecessary, and the processing accuracy of each inner lead 11 can be maintained. 1
3 and each pad 4 can maintain high alignment accuracy,
The connection between the inner lead tip 13 and each pad 4 can be ensured.

In particular, since the inner lead 11 is plate-shaped and the depth of the half-etched portion 12 is greater than the thickness of the double-sided tape 6, the tip 13 of the inner lead is securely
And the contact pressure of the depressed inner lead is not applied to the pad 4, and the contact pressure of the inner lead tip 13 against the pad 4 can be reduced.

Thus, each inner lead tip 13 and each pad 4 can be connected with a predetermined connection strength, and the inner lead tip 13 and each pad 4 are not separated from each other in a subsequent process such as molding. In addition, since the pads 4 are not damaged during the temporary fixing, the electrodes, aluminum (Al) wiring, and the like are not corroded from the damaged portions.

Next, a second embodiment of the present invention will be described with reference to FIGS. 2 and 3 are denoted by the same reference numerals, and detailed description thereof will be omitted.

In this semiconductor device, a double-sided tape 20 having high heat shrinkage is used as the double-sided tape. The thickness of the double-sided tape 20 is equal to or greater than the depth b of the half-etched portion 12 before heating.

With this configuration, when the semiconductor chip 2 is temporarily fixed to the lead frame 10, the semiconductor chip 2 and the half-etched portion 12
, A heat-shrinkable double-sided tape 20 is interposed.
In this case, since the thickness of the double-sided tape 20 is equal to or greater than the depth of the half-etched portion 12,
Is located close to the tip 13 of the pad 4. Then, in this state, the positioning of each pad 4 on the semiconductor chip 2 and the tip 13 of each inner lead is performed.

Thereafter, the semiconductor chip 2 of the double-sided tape 20 and each of the inner leads 11 are thermocompression-bonded and temporarily fixed. The heating temperature in this thermocompression bonding is approximately 200 ° C. as described above. Due to this thermocompression bonding, the thickness of the double-sided tape 20 having high heat shrinkage gradually decreases, and accordingly, the tip 13 of the inner lead comes into contact with the pad 4 slowly.

Therefore, when the tip of the inner lead 11 contacts the pad 4, the pad 4 is not damaged.

After the temporary fixing, the tip of each inner lead 11 and each pad 4 are connected by, for example, electroplating.

As described above, in the second embodiment,
A heat-shrinkable double-sided tape 20 is interposed between the half-etched part 12 of the inner lead 11 and the semiconductor chip 2 and thermocompression-bonded and temporarily fixed, and then the pad 4 of the semiconductor chip 2 and the tip 13 of the inner lead are separated. Since the connection is made by electroplating or the like, the same effect as that of the first embodiment can be obtained, and the tip 13 of the inner lead is alleviated with respect to the pad 4 by using the double-sided tape 20 having high heat shrinkage. Can be contacted without damaging the pad 4.

The present invention is not limited to the above embodiments, and may be changed without changing the gist of the present invention. Each inner lead 11 is not limited to being cut by the half etching process, but may be cut mechanically. or,
The depth of the half-etched portion 12 may be equal to or greater than the thickness of the double-sided tape 6.

[0042]

As described above in detail, according to the present invention, the alignment accuracy between the tip of the inner lead and the pad can be improved, and a semiconductor device which does not cause a non-contact portion and does not damage the pad and its manufacture. Can provide a method.

[Brief description of the drawings]

FIG. 1 is a configuration diagram showing a first embodiment of a semiconductor device according to the present invention.

FIG. 2 is a configuration diagram of an inner lead and a double-sided tape in the same device.

FIG. 3 is a configuration diagram showing a contact state between an inner lead and a pad in the device.

FIG. 4 is a configuration diagram of an inner lead and a double-sided tape in a second embodiment of the device.

FIG. 5 is a configuration diagram showing a contact state between an inner lead and a pad in the device.

FIG. 6 is a configuration diagram of a conventional device.

[Explanation of symbols]

2: semiconductor chip, 4: pad, 6: double-sided tape, 10
... Lead frame, 11 inner lead, 12 half-etched portion, 13 inner lead tip, 20 double-sided tape.

────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Tatsuhiro Okano 1-5-1, Taito, Taito-ku, Tokyo Toppan Printing Co., Ltd. (72) Inventor Takao Fujitsu 1-1-1 Komukai Toshiba-cho, Sai-ku, Kawasaki-shi, Kanagawa Stock (72) Inventor Yoshimasa Kudo 1 in Komukai Toshiba-cho, Saiwai-ku, Kawasaki-shi, Kanagawa Prefecture In-house Toshiba Tamagawa Plant (72) Inventor Shinya Shimizu 1 in Komukai-Toshiba-cho, Saiwai-ku, Kawasaki-shi, Kanagawa Inside the Toshiba Tamagawa Plant (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 23/50 H01L 21/60 321

Claims (6)

(57) [Claims] 1. A semiconductor device comprising an electrode on a semiconductor chip and a lead end of an inner lead of a lead frame connected by plating, wherein the semiconductor chip is interposed between the semiconductor chip and the inner lead to heat the inner lead and the semiconductor chip. A semiconductor, comprising: a double-sided adhesive tape for temporarily fixing by pressing, and a cutting portion formed on a surface of the inner lead on the semiconductor chip side and where the double-sided adhesive tape is bonded. apparatus. 2. The semiconductor device according to claim 1, wherein the cut portion is formed at a depth equal to or greater than the thickness of the double-sided adhesive tape. 3. The semiconductor device according to claim 1, wherein a portion of the tip of the inner lead that contacts the electrode of the semiconductor chip is formed smaller than the shape of the electrode. 4. A semiconductor device in which an electrode of a semiconductor chip and a tip of an inner lead of a lead frame are connected by plating, wherein the inner lead and the semiconductor chip are interposed between the semiconductor chip and the inner lead by thermocompression bonding. A heat-shrinkable double-sided adhesive tape for temporary fixing, and a cut portion formed at a position where the double-sided adhesive tape is bonded to the inner lead and at a depth equal to or less than the thickness of the double-sided adhesive tape. A semiconductor device, comprising: 5. The semiconductor device according to claim 1, wherein the cut portion is formed by performing a half etching process. 6. A method of manufacturing a semiconductor device, comprising plating and connecting an electrode of a semiconductor chip and a tip of an inner lead of a lead frame, wherein a surface of the inner lead on the semiconductor chip side is cut, and the cut portion and the semiconductor are cut. A method of manufacturing a semiconductor device, comprising: temporarily fixing by thermocompression bonding with a double-sided adhesive tape interposed between the chip and the chip; and thereafter, connecting an electrode of the semiconductor chip and a tip of the inner lead.