JPH09107159A - Circuit board and method of manufacture - Google Patents
Circuit board and method of manufactureInfo
- Publication number
- JPH09107159A JPH09107159A JP8286178A JP28617896A JPH09107159A JP H09107159 A JPH09107159 A JP H09107159A JP 8286178 A JP8286178 A JP 8286178A JP 28617896 A JP28617896 A JP 28617896A JP H09107159 A JPH09107159 A JP H09107159A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- insulating substrate
- circuit
- terminals
- contact terminals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
Landscapes
- Structure Of Printed Boards (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】この発明は、電子機器に設けられ
ている回路基板に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board provided in an electronic device.
【０００２】[0002]
【従来の技術】従来、回路基板の端子部は、コネクタに
入りやすくする為、その先端部の角を研磨器にかけてテ
ーパをつけていた。また、コネクタに直接差し込まれる
端子部が形成された回路基板においては、特開昭５５−
１２７０９６号公報に開示されているように、多数の回
路基板を一枚の絶縁基板で形成し、後に各回路基板毎に
その境界にＶ字状溝を設け、このＶ字状溝で絶縁基板を
割って一枚毎の回路基板を得るものもある。2. Description of the Related Art Conventionally, a terminal portion of a circuit board is tapered by using a grinder at the corner of a tip end thereof in order to easily enter the connector. Further, in a circuit board having a terminal portion directly inserted into a connector, Japanese Patent Application Laid-Open No.
As disclosed in Japanese Patent No. 127096, a large number of circuit boards are formed by a single insulating substrate, a V-shaped groove is provided at the boundary of each circuit board, and the insulating substrate is formed by the V-shaped groove. In some cases, a single circuit board is obtained by cracking.
【０００３】[0003]
【発明が解決しようとする課題】上記従来の技術の前者
の場合、複数の回路基板を一枚の絶縁基板を分割して製
造するいわゆる多数個取りの際に、端子部を一枚の絶縁
基板の外側に向けて端子部を形成しなければならず、最
大２列の回路基板を一枚の絶縁基板から分割する程度で
あり、量産性が悪いという欠点があった。In the former case of the above-mentioned prior art, when a plurality of circuit boards are manufactured by dividing a single insulating substrate into so-called multiple pieces, the terminals are connected to one insulating substrate. The terminal portions must be formed toward the outside of the circuit board, and the circuit boards of up to two rows are only divided from one insulating substrate, which is disadvantageous in that mass productivity is poor.
【０００４】また、上記従来の技術の後者の場合、Ｖ字
状溝を形成するのは単に絶縁基板を分割するためだけで
あり、溝を形成する部分にも幅広くメッキ接続パターン
が形成され、カッターによりＶ字状溝を形成する際に、
メッキ接続パターンの切りくずが端子部分に付着し、シ
ョートを起こす原因となっていた。また、回路基板の端
子部以外の部分は、分割用のミシン目やＶ溝が形成され
ておらず、一枚の絶縁基板から多数の回路基板を取るの
は難しいものである。In the latter case of the prior art, the V-shaped groove is formed merely to divide the insulating substrate, and a plating connection pattern is formed widely in a portion where the groove is formed. When forming a V-shaped groove by
Chips of the plating connection pattern adhered to the terminal portion, causing a short circuit. Also, portions other than the terminal portions of the circuit board are not provided with dividing perforations or V-grooves, and it is difficult to remove many circuit boards from one insulating substrate.
【０００５】この発明は、上記の従来の技術の課題に鑑
みて成されたもので、容易に分割が可能であり、端子間
でのショートが生ぜず、生産性も高い回路基板を提供す
ることを目的とする。The present invention has been made in view of the above-mentioned problems of the related art, and provides a circuit board which can be easily divided, has no short circuit between terminals, and has high productivity. With the goal.
【０００６】[0006]
【課題を解決するための手段】この発明は、一組毎の回
路パターンが一枚の絶縁基板表面に複数組形成され、各
回路パターンのコネクタ接点端子が互いに他の回路パタ
ーンのコネクタ接点端子と所定の間隔を隔てて対向して
上記絶縁基板上に形成され、この相対向するコネクタ接
点端子の表裏境界部に、溝の幅が溝の深さより広く、溝
の幅が上記相対向する両コネクタ接点端子の端縁部間の
間隔よりわずかに狭いＶ字状溝が形成され、上記各組の
回路パターン毎の境界部分に強度を下げたミシン目が形
成されている回路基板である。また、上記ミシン目は、
上記端子形成部分以外の上記回路基板に形成されている
ものである。さらに、上記対向した端子間には、対向す
る端子から連続した細い接続部が形成されているもので
ある。According to the present invention, a plurality of sets of circuit patterns for each set are formed on the surface of one insulating substrate, and the connector contact terminals of each circuit pattern are mutually connected to the connector contact terminals of another circuit pattern. The two connectors are formed on the insulating substrate so as to face each other at a predetermined interval, and the width of the groove is wider than the depth of the groove, and the width of the groove is opposite to each other. A circuit board in which a V-shaped groove slightly narrower than an interval between end portions of contact terminals is formed, and a perforated line having reduced strength is formed at a boundary portion of each of the above-described sets of circuit patterns. Also, the perforation is
It is formed on the circuit board other than the terminal formation portion. Further, between the opposed terminals, a thin connecting portion continuous from the opposed terminals is formed.
【０００７】[0007]
【作用】この発明の回路基板は、絶縁基板に互いに対向
して形成された各回路パターンの端子部の境界でＶ字状
溝を施し、絶縁基板の分割を容易にするとともに、ミシ
ン目によって、他の部分とも分離可能に形成され、端子
部端縁間のＶ溝は、端子端縁間より僅かに狭く形成さ
れ、回路パターンを形成する導体の削りくずが端子間に
付着しないようにしたものである。According to the circuit board of the present invention, a V-shaped groove is formed at the boundary between the terminal portions of the respective circuit patterns formed opposite to each other on the insulating substrate, so that the insulating substrate can be easily divided. V-grooves between the terminal edges are formed slightly narrower than the terminal edges so that shavings of the conductor forming the circuit pattern do not adhere between the terminals. It is.
【０００８】[0008]
【実施例】以下、この発明の実施例について図面に基づ
いて説明する。図１ないし図６は、この発明の一実施例
を示すもので、この実施例の回路基板は、図１に示すよ
うに、フェノール樹脂、エポキシ樹脂、ガラス、セラミ
ックス等をベースにした絶縁基板１に、銅箔又は導電塗
料による回路パターン２及びこれにこれに接続している
端子３が形成されたものである。この回路パターン２
は、一枚の大きな絶縁基板１に、最終的に分割される一
枚の回路基板４毎にその範囲内に形成されている。ま
た、絶縁基板１の端子３は、互いに対向する回路パター
ン２から連続して形成され、その端子３間は、端子３の
端縁部から連続した接続部３ａにより互いに連続して形
成されている。そして、端子３には、金等のメッキが施
されている。Embodiments of the present invention will be described below with reference to the drawings. FIGS. 1 to 6 show an embodiment of the present invention. As shown in FIG. 1, a circuit board according to this embodiment is an insulating substrate 1 based on phenol resin, epoxy resin, glass, ceramics or the like. In addition, a circuit pattern 2 made of copper foil or conductive paint and a terminal 3 connected to the circuit pattern 2 are formed. This circuit pattern 2
Are formed in one large insulating substrate 1 within the range for each one circuit board 4 to be finally divided. Further, the terminals 3 of the insulating substrate 1 are formed continuously from the circuit patterns 2 facing each other, and the space between the terminals 3 is formed continuously from each other by a connection portion 3 a continuous from the edge of the terminal 3. . The terminals 3 are plated with gold or the like.
【０００９】さらに、各回路基板４同士の境界のうち、
端子３が位置している部分以外には、強度を下げた分割
部として、パンチングによりミシン目５が形成され、後
に回路基板４毎に容易に分割できるようになっている。Further, of the boundaries between the circuit boards 4,
Perforations 5 are formed by punching at portions other than the portion where the terminal 3 is located, with reduced strength, so that the circuit board 4 can be easily divided later.
【００１０】次に、以上のように形成されている絶縁基
板１を、図２に示すように、Ｖカット加工機（図示せ
ず）に装着し一対のカッター６の間に位置させる。この
カッター６の刃先角θは、１２０°に形成されている。
絶縁基板１は、この一対のカッター６の間で、端子３同
士が対向している境界線上にカッター６の刃先が位置す
るように装着される。Next, the insulating substrate 1 formed as described above is mounted on a V-cut processing machine (not shown) and positioned between a pair of cutters 6 as shown in FIG. The blade angle θ of the cutter 6 is set to 120 °.
The insulating substrate 1 is mounted between the pair of cutters 6 such that the cutting edge of the cutters 6 is located on a boundary line where the terminals 3 face each other.
【００１１】そして、図３に示すように、カッター６を
回転させ，刃先が基板１の表裏面に所定の深さのＶ字状
溝７を形成する。そのＶ字状溝７の角度φは１２０°で
あり、図４に示すように、端子３の端縁部間の間隔ｄ
は、Ｖ字状溝７の開口部の幅ｗより僅かに広く設定され
る。Then, as shown in FIG. 3, the cutter 6 is rotated to form a V-shaped groove 7 having a predetermined edge on the front and back surfaces of the substrate 1. The angle φ of the V-shaped groove 7 is 120 °, and as shown in FIG.
Is set slightly wider than the width w of the opening of the V-shaped groove 7.
【００１２】このようにして、端子３の境界線でＶ字状
溝７が形成された絶縁基板１を、そのミシン目５及びＶ
字状溝７に沿って折り、図５に示すように、個々の回路
基板４を得る。この回路基板４は、このあとメモリその
他の電子素子が装着されて電子機器のコネクタ８に、そ
の端子３が差し込まれる。In this manner, the insulating substrate 1 having the V-shaped groove 7 formed at the boundary of the terminal 3 is separated from the perforations 5 and V
The individual circuit boards 4 are obtained by folding along the groove 7 as shown in FIG. After that, the circuit board 4 is mounted with a memory and other electronic elements, and the terminal 3 is inserted into a connector 8 of the electronic device.
【００１３】この実施例の回路基板４は、端子３の端面
にＶ字状溝７によるテーパが形成されており、しかもＶ
字状溝７の深さが幅より浅くこのテーパもゆるやかであ
るので、コネクタ８への差し込みが容易となる。さら
に、テーパを形成する加工と、分割のための加工とが、
Ｖカット加工により同時に行なうことができ、工数及び
コストの削減にもなる。In the circuit board 4 of this embodiment, the end face of the terminal 3 is tapered by a V-shaped groove 7.
Since the depth of the U-shaped groove 7 is smaller than the width and the taper is gentle, the insertion into the connector 8 becomes easy. Furthermore, the processing for forming the taper and the processing for dividing are:
It can be performed simultaneously by V-cut processing, which also reduces the number of steps and cost.
【００１４】また、端子３を大きな一枚の絶縁基板１の
中央部にも形成することができ、より効果的な多数個取
りが可能となる。Further, the terminals 3 can be formed also in the central portion of one large insulating substrate 1, so that more effective multi-cavity can be obtained.
【００１５】さらに、端子３の形成後のＶカット加工時
にも端子３を削らないので、銅箔等の導電物質の粉が端
子３に付着せず、端子３間のショート等が生じにくいも
のである。Further, since the terminal 3 is not shaved during the V-cut processing after the formation of the terminal 3, powder of a conductive material such as copper foil does not adhere to the terminal 3, and short-circuiting between the terminals 3 is hardly generated. is there.
【００１６】尚、この発明において、回路路パターン及
び端子は絶縁基板の片面、両面のいずれに形成されてて
も良く、回路パターンは銅箔で形成し端子は導電塗料に
より設けても良く、さらに導箔の上に導電塗料を印刷し
て端子を形成しても良い。In the present invention, the circuit path pattern and the terminals may be formed on one or both sides of the insulating substrate. The circuit pattern may be formed of copper foil, and the terminals may be provided with a conductive paint. A terminal may be formed by printing a conductive paint on the conductive foil.
【００１７】[0017]
【発明の効果】この発明の回路基板は、端子形成部分の
端面にＶ字状溝によるテーパが形成されており、しかも
Ｖ字状溝の深さが幅より浅くこのテーパがるやかである
ので、コネクタへの差し込みが容易となる。さらに、端
子間の間隔が溝の幅よりも僅かに広いので、溝形成時に
も端子部分を削らず、この削りくずが端子間に付着する
こともない。According to the circuit board of the present invention, the V-shaped groove is tapered at the end face of the terminal forming portion, and the V-shaped groove is shallower than the width and has a gentle taper. This facilitates insertion into the connector. Further, since the interval between the terminals is slightly larger than the width of the groove, the terminal portion is not shaved even when the groove is formed, and the shavings do not adhere between the terminals.
【図１】この発明の一実施例の回路基板を示す部分破断
平面図である。FIG. 1 is a partially broken plan view showing a circuit board according to an embodiment of the present invention.
【図２】この実施例の回路基板にＶ字状溝を形成する際
の縦断面図である。FIG. 2 is a longitudinal sectional view when a V-shaped groove is formed in the circuit board of this embodiment.
【図３】この実施例の回路基板にＶ字状溝を形成してい
る状態を示す縦断面図である。FIG. 3 is a longitudinal sectional view showing a state in which a V-shaped groove is formed in the circuit board of this embodiment.
【図４】この実施例の回路基板に形成されたＶ字状溝を
示す縦断面図である。FIG. 4 is a longitudinal sectional view showing a V-shaped groove formed on the circuit board of this embodiment.
【図５】この実施例の回路基板を個々の回路基板毎に分
割した状態の平面図である。FIG. 5 is a plan view showing a state where the circuit board of this embodiment is divided into individual circuit boards.
【図６】この実施例の回路基板をコネクタに差し込む際
の縦断面図である。 １ 絶縁基板 ２ 回路パターン ３ 端子 ３ａ 接続部 ４ 回路基板 ５ ミシン目 ７ Ｖ字状溝FIG. 6 is a longitudinal sectional view when the circuit board of this embodiment is inserted into a connector. DESCRIPTION OF SYMBOLS 1 Insulating board 2 Circuit pattern 3 Terminal 3a Connection part 4 Circuit board 5 Perforation 7 V-shaped groove
─────────────────────────────────────────────────────
────────────────────────────────────────────────── ───
【手続補正書】[Procedure amendment]
【提出日】平成８年１１月６日[Submission date] November 6, 1996
【手続補正１】[Procedure amendment 1]
【補正対象書類名】明細書[Document name to be amended] Statement
【補正対象項目名】全文[Correction target item name] Full text
【補正方法】変更[Correction method] Change
【補正内容】[Correction contents]
【書類名】 明細書[Document Name] Statement
【発明の名称】 回路基板とその製造方法Title: Circuit board and method of manufacturing the same
【特許請求の範囲】[Claims]
【発明の詳細な説明】Detailed Description of the Invention
【０００１】[0001]
【産業上の利用分野】この発明は、電子機器に設けられ
ている回路基板とその製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board provided in electronic equipment and a method for manufacturing the same.
【０００２】[0002]
【従来の技術】従来、回路基板の端子部は、コネクタに
入りやすくする為、その先端部の角を研磨器にかけてテ
ーパをつけていた。また、コネクタに直接差し込まれる
端子部が形成された回路基板においては、特開昭５５−
１２７０９６号公報に開示されているように、多数の回
路基板を一枚の絶縁基板で形成し、後に各回路基板毎に
その境界にＶ字状溝を設け、このＶ字状溝で絶縁基板を
割って一枚毎の回路基板を得るものもある。2. Description of the Related Art Conventionally, a terminal portion of a circuit board is tapered by using a grinder at the corner of a tip end thereof in order to easily enter the connector. Further, in a circuit board having a terminal portion directly inserted into a connector, Japanese Patent Application Laid-Open No.
As disclosed in Japanese Patent No. 127096, a large number of circuit boards are formed by a single insulating substrate, a V-shaped groove is provided at the boundary of each circuit board, and the insulating substrate is formed by the V-shaped groove. In some cases, a single circuit board is obtained by cracking.
【０００３】[0003]
【発明が解決しようとする課題】上記従来の技術の前者
の場合、複数の回路基板を一枚の絶縁基板を分割して製
造するいわゆる多数個取りの際に、端子部を一枚の絶縁
基板の外側に向けて端子部を形成しなければならず、最
大２列の回路基板を一枚の絶縁基板から分割する程度で
あり、量産性が悪いという欠点があった。In the former case of the above-mentioned prior art, when a plurality of circuit boards are manufactured by dividing a single insulating substrate into so-called multiple pieces, the terminals are connected to one insulating substrate. The terminal portions must be formed toward the outside of the circuit board, and the circuit boards of up to two rows are only divided from one insulating substrate, which is disadvantageous in that mass productivity is poor.
【０００４】また、上記従来の技術の後者の場合、Ｖ字
状溝を形成するのは単に絶縁基板を分割するためだけで
あり、溝を形成する部分にも幅広くメッキ接続パターン
が形成され、カッターによりＶ字状溝を形成する際に、
メッキ接続パターンの切りくずが端子部分に付着し、シ
ョートを起こす原因となっていた。また、回路基板の端
子部以外の部分は、分割用のミシン目やＶ溝が形成され
ておらず、一枚の絶縁基板から多数の回路基板を取るの
は難しいものである。In the latter case of the prior art, the V-shaped groove is formed merely to divide the insulating substrate, and a plating connection pattern is formed widely in a portion where the groove is formed. When forming a V-shaped groove by
Chips of the plating connection pattern adhered to the terminal portion, causing a short circuit. Also, portions other than the terminal portions of the circuit board are not provided with dividing perforations or V-grooves, and it is difficult to remove many circuit boards from one insulating substrate.
【０００５】この発明は、上記の従来の技術の課題に鑑
みて成されたもので、容易に分割が可能であり、生産性
も高い回路基板を提供することを目的とする。The present invention has been made in view of the above problems of the prior art, and an object thereof is to provide a circuit board which can be easily divided and has high productivity.
【０００６】[0006]
【課題を解決するための手段】この発明は、一対毎の回
路パターンが一枚の絶縁基板表面に複数対形成され、一
対の回路パターンのコネクタ接点端子同士が互いに所定
の間隔を隔てて対向して上記絶縁基板上に形成され、こ
の相対向するコネクタ接点端子の表裏境界部に、溝の幅
が溝の深さより広いＶ字状溝が互いに対称に形成され、
上記一対の回路パターン毎の境界部分に上記絶縁基板の
強度を下げたミシン目が形成されている回路基板であ
る。そして、一対毎の回路パターンが一枚の絶縁基板表
面に複数対形成され、一対の回路パターンのコネクタ接
点端子同士が互いに所定の間隔を隔てて対向して上記絶
縁基板上に形成され、この相対向するコネクタ接点端子
の表裏境界部に、溝の幅が溝の深さより広いＶ字状溝が
互いに対称に形成され、上記一対の回路パターン毎の境
界部分に上記絶縁基板の強度を下げたミシン目が形成さ
れている回路基板である。According to the present invention, a plurality of pairs of circuit patterns are formed on the surface of one insulating substrate, and the connector contact terminals of the pair of circuit patterns are opposed to each other with a predetermined space therebetween. V-shaped grooves having a groove width wider than the groove depth are formed symmetrically with each other at the front and back boundary portions of the connector contact terminals facing each other.
The circuit board has perforations formed by reducing the strength of the insulating substrate at the boundary between the pair of circuit patterns. Then, a plurality of pairs of circuit patterns for each pair are formed on the surface of one insulating substrate, and the connector contact terminals of the pair of circuit patterns are formed on the insulating substrate so as to face each other at a predetermined interval. A V-shaped groove having a groove width wider than the groove depth is formed symmetrically at the front and back boundary portions of the facing connector contact terminals, and the strength of the insulating substrate is reduced at the boundary portion of each of the pair of circuit patterns. It is a circuit board in which eyes are formed.
【０００７】またこの発明は、回路パターンを一枚の絶
縁基板表面に複数形成し、回路パターンから延長した導
体部を上記絶縁基板上に形成し、上記絶縁基板の上記回
路パターン及びその他導体部以外の箇所に、上記回路基
板の表裏対称に同時にＶ字状溝を形成していく回路基板
の製造方法である。また特に、一対毎の回路パターンを
一枚の絶縁基板表面に複数対形成し、一対の回路パター
ンのコネクタ接点端子同士を互いに所定の間隔を隔てて
対向して上記絶縁基板上に形成し、この相対向するコネ
クタ接点端子の表裏境界部に、溝の幅が溝の深さより広
いＶ字状溝を互いに対称に表裏同時に形成する回路基板
の製造方法である。Further, according to the present invention, a plurality of circuit patterns are formed on the surface of one insulating substrate, and a conductor portion extended from the circuit pattern is formed on the insulating substrate, except for the circuit pattern and other conductor portions of the insulating substrate. Is a method for manufacturing a circuit board in which V-shaped grooves are formed at the same time symmetrically on the front and back sides of the circuit board. Further, in particular, a plurality of pairs of circuit patterns for each pair are formed on the surface of one insulating substrate, and the connector contact terminals of the pair of circuit patterns are formed on the insulating substrate so as to face each other with a predetermined gap, This is a method for manufacturing a circuit board in which V-shaped grooves having a groove width wider than the groove depth are formed symmetrically on the front and back sides at the front and back boundary portions of the opposing connector contact terminals.
【０００８】[0008]
【作用】この発明の回路基板は、絶縁基板に互いに対向
して形成された各回路パターンの端子部の境界でＶ字状
溝を施し、絶縁基板の分割を容易にするとともに、ミシ
ン目によって、他の部分とも分離可能に形成されてい
る。そして、端子部端縁間のＶ溝は、端子端縁間より僅
かに狭く形成され、回路パターンを形成する導体の削り
くずが回路パターンの端子に付着しないようにしたもの
である。In the circuit board of the present invention, the V-shaped groove is formed at the boundary of the terminal portions of the circuit patterns formed on the insulating substrate so as to face each other, thereby facilitating the division of the insulating substrate, and by the perforations, It is formed so as to be separable from other parts. The V groove between the terminal end edges is formed slightly narrower than between the terminal edges so that the shavings of the conductor forming the circuit pattern do not adhere to the terminals of the circuit pattern.
【０００９】[0009]
【実施例】以下、この発明の実施例について図面に基づ
いて説明する。図１ないし図６は、この発明の一実施例
を示すもので、この実施例の回路基板は、図１に示すよ
うに、フェノール樹脂、エポキシ樹脂、ガラス、セラミ
ックス等をベースにした絶縁基板１に、銅箔又は導電塗
料による回路パターン２及びこれにこれに接続している
導体部である端子３が形成されたものである。この回路
パターン２は、一枚の大きな絶縁基板１に、最終的に分
割される一枚の回路基板４毎にその範囲内に形成されて
いる。また、絶縁基板１の端子３は、互いに対向する回
路パターン２から連続して形成され、その端子３間は、
端子３の端縁部から連続した接続部３ａにより互いに連
続して形成されている。そして、端子３には、金等のメ
ッキが施されている。Embodiments of the present invention will be described below with reference to the drawings. FIGS. 1 to 6 show an embodiment of the present invention. As shown in FIG. 1, a circuit board according to this embodiment is an insulating substrate 1 based on phenol resin, epoxy resin, glass, ceramics or the like. Further, a circuit pattern 2 made of copper foil or conductive paint and a terminal 3 which is a conductor connected to the circuit pattern 2 are formed. The circuit pattern 2 is formed on one large insulating substrate 1 within the range for each of the finally divided circuit boards 4. The terminals 3 of the insulating substrate 1 are formed continuously from the circuit patterns 2 facing each other.
The terminals 3 are formed to be continuous with each other by connecting portions 3a which are continuous from the edge. The terminals 3 are plated with gold or the like.
【００１０】さらに、各回路基板４同士の境界のうち、
端子３が位置している部分以外には、強度を下げた分割
部として、パンチングによりミシン目５が形成され、後
に回路基板４毎に容易に分割できるようになっている。Further, among the boundaries between the circuit boards 4,
Perforations 5 are formed by punching at portions other than the portion where the terminal 3 is located, with reduced strength, so that the circuit board 4 can be easily divided later.
【００１１】次に、以上のように形成されている絶縁基
板１を、図２に示すように、Ｖカット加工機（図示せ
ず）に装着し一対のカッター６の間に位置させる。この
カッター６の刃先角θは、１２０°に形成されている。
絶縁基板１は、この一対のカッター６の間で、端子３同
士が対向している境界線上にカッター６の刃先が位置す
るように装着される。Next, the insulating substrate 1 formed as described above is mounted on a V-cut processing machine (not shown) as shown in FIG. 2 and positioned between the pair of cutters 6. The blade angle θ of the cutter 6 is set to 120 °.
The insulating substrate 1 is mounted between the pair of cutters 6 such that the cutting edge of the cutters 6 is located on a boundary line where the terminals 3 face each other.
【００１２】そして、図３に示すように、カッター６を
回転させ，刃先が基板１の表裏面に所定の深さのＶ字状
溝７を形成する。そのＶ字状溝７の角度φは１２０°で
あり、図４に示すように、端子３の端縁部間の間隔ｄ
は、Ｖ字状溝７の開口部の幅ｗより僅かに広く設定され
る。Then, as shown in FIG. 3, the cutter 6 is rotated to form a V-shaped groove 7 having a predetermined depth on the front and back surfaces of the substrate 1. The angle φ of the V-shaped groove 7 is 120 °, and as shown in FIG.
Is set slightly wider than the width w of the opening of the V-shaped groove 7.
【００１３】このようにして、端子３の境界線でＶ字状
溝７が形成された絶縁基板１を、そのミシン目５及びＶ
字状溝７に沿って折り、図５に示すように、個々の回路
基板４を得る。この回路基板４は、このあとメモリその
他の電子素子が装着されて電子機器のコネクタ８に、そ
の端子３が差し込まれる。In this way, the insulating substrate 1 having the V-shaped groove 7 formed at the boundary line of the terminal 3 is cut into the perforations 5 and V.
The individual circuit boards 4 are obtained by folding along the groove 7 as shown in FIG. After that, the circuit board 4 is mounted with a memory and other electronic elements, and the terminal 3 is inserted into a connector 8 of the electronic device.
【００１４】この実施例の回路基板４は、端子３の端面
にＶ字状溝７によるテーパが形成されており、しかもＶ
字状溝７の深さが幅より浅くこのテーパもゆるやかであ
るので、コネクタ８への差し込みが容易となる。さら
に、テーパを形成する加工と、分割のための加工とが、
Ｖカット加工により同時に行なうことができ、工数及び
コストの削減にもなる。In the circuit board 4 of this embodiment, a taper is formed by the V-shaped groove 7 on the end face of the terminal 3, and V is formed.
Since the depth of the U-shaped groove 7 is smaller than the width and the taper is gentle, the insertion into the connector 8 becomes easy. Furthermore, the processing for forming the taper and the processing for dividing are:
It can be performed simultaneously by V-cut processing, which also reduces the number of steps and cost.
【００１５】また、端子３を大きな一枚の絶縁基板１の
中央部にも形成することができ、より効果的な多数個取
りが可能となる。Further, the terminals 3 can be formed also in the central portion of one large insulating substrate 1, so that more effective multi-cavity production is possible.
【００１６】さらに、端子３の形成後のＶカット加工時
にも端子３を削らないので、銅箔等の導電物質の粉が端
子３に付着せず、端子３間のショート等が生じにくいも
のである。Furthermore, since the terminals 3 are not ground even during the V-cut processing after the terminals 3 are formed, powder of a conductive material such as copper foil does not adhere to the terminals 3 and shorts between the terminals 3 are unlikely to occur. is there.
【００１７】尚、この発明において、回路路パターン及
び端子は絶縁基板の片面、両面のいずれに形成されてて
も良く、回路パターンは銅箔で形成し端子は導電塗料に
より設けても良く、さらに導箔の上に導電塗料を印刷し
て端子を形成しても良い。In the present invention, the circuit path pattern and the terminals may be formed on one side or both sides of the insulating substrate, the circuit pattern may be formed of copper foil, and the terminals may be provided by conductive paint. The terminals may be formed by printing a conductive paint on the conductive foil.
【００１８】[0018]
【発明の効果】この発明の回路基板は、端子形成部分の
端面にＶ字状溝によるテーパが形成されており、しかも
Ｖ字状溝の深さが幅より浅くこのテーパがるやかである
ので、コネクタへの差し込みが容易となる。さらに、端
子間の間隔が溝の幅よりも僅かに広いので、溝形成時に
も端子部分を削らず、この削りくずが端子間に付着する
こともない。According to the circuit board of the present invention, the V-shaped groove is tapered at the end face of the terminal forming portion, and the V-shaped groove is shallower than the width and has a gentle taper. This facilitates insertion into the connector. Further, since the interval between the terminals is slightly larger than the width of the groove, the terminal portion is not shaved even when the groove is formed, and the shavings do not adhere between the terminals.
【図面の簡単な説明】[Brief description of the drawings]
【図１】この発明の一実施例の回路基板を示す部分破断
平面図である。FIG. 1 is a partially broken plan view showing a circuit board according to an embodiment of the present invention.
【図２】この実施例の回路基板にＶ字状溝を形成する際
の縦断面図である。FIG. 2 is a longitudinal sectional view when a V-shaped groove is formed in the circuit board of this embodiment.
【図３】この実施例の回路基板にＶ字状溝を形成してい
る状態を示す縦断面図である。FIG. 3 is a longitudinal sectional view showing a state in which a V-shaped groove is formed in the circuit board of this embodiment.
【図４】この実施例の回路基板に形成されたＶ字状溝を
示す縦断面図である。FIG. 4 is a longitudinal sectional view showing a V-shaped groove formed on the circuit board of this embodiment.
【図５】この実施例の回路基板を個々の回路基板毎に分
割した状態の平面図である。FIG. 5 is a plan view showing a state where the circuit board of this embodiment is divided into individual circuit boards.
【図６】この実施例の回路基板をコネクタに差し込む際
の縦断面図である。 １ 絶縁基板 ２ 回路パターン ３ 端子 ３ａ 接続部 ４ 回路基板 ５ ミシン目 ７ Ｖ字状溝FIG. 6 is a longitudinal sectional view when the circuit board of this embodiment is inserted into a connector. DESCRIPTION OF SYMBOLS 1 Insulating board 2 Circuit pattern 3 Terminal 3a Connection part 4 Circuit board 5 Perforation 7 V-shaped groove
Claims (2)
表面に複数組形成され、各回路パターンのコネクタ接点
端子が互いに他の回路パターンのコネクタ接点端子と所
定の間隔を隔てて対向して上記絶縁基板上に形成され、
この相対向するコネクタ接点端子の表裏境界部に、溝の
幅が溝の深さより広く、溝の幅が上記相対向する両コネ
クタ接点端子の端縁部間の間隔よりわずかに狭いＶ字状
溝が形成され、上記各組の回路パターン毎の境界部分に
上記絶縁基板の他の部分より強度を下げたミシン目が形
成されている回路基板。A plurality of sets of circuit patterns for each set are formed on the surface of one insulating substrate, and connector contact terminals of each circuit pattern oppose each other with a predetermined interval from connector contact terminals of another circuit pattern. Formed on the insulating substrate,
A V-shaped groove having a groove width wider than the groove depth and a groove width slightly smaller than an interval between the edge portions of the opposing connector contact terminals is formed at the front and back boundary portions of the opposed connector contact terminals. And a perforated line having a lower strength than other portions of the insulating substrate is formed at a boundary portion between the circuit patterns of each set.
の上記回路基板に形成されている請求項１記載の回路基
板。2. The circuit board according to claim 1, wherein the perforation is formed on the circuit board other than the terminal forming portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8286178A JP2809305B2 (en) | 1996-10-07 | 1996-10-07 | Circuit board manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8286178A JP2809305B2 (en) | 1996-10-07 | 1996-10-07 | Circuit board manufacturing method |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6076662A Division JP2612842B2 (en) | 1994-03-22 | 1994-03-22 | Circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH09107159A true JPH09107159A (en) | 1997-04-22 |
| JP2809305B2 JP2809305B2 (en) | 1998-10-08 |
Family
ID=17700964
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8286178A Expired - Fee Related JP2809305B2 (en) | 1996-10-07 | 1996-10-07 | Circuit board manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2809305B2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPWO2008066133A1 (en) * | 2006-11-30 | 2010-03-11 | 株式会社トクヤマ | Method for manufacturing metallized ceramic substrate chip |
| JP2014042066A (en) * | 2008-06-20 | 2014-03-06 | Hitachi Metals Ltd | Ceramic assembled board |
| JP2018181990A (en) * | 2017-04-10 | 2018-11-15 | 株式会社ケーヒン | Electronic control device |
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| JPS58105166U (en) * | 1982-01-13 | 1983-07-18 | 東芝ケミカル株式会社 | double-sided printed wiring board |
| JPS594722A (en) * | 1982-07-01 | 1984-01-11 | Mochizuki Motor Kk | Clutcher for drawing operation of wooden sheet pile |
| JPS60118262U (en) * | 1984-01-18 | 1985-08-09 | 日本電気株式会社 | Printed board |
| JPS60169857U (en) * | 1984-04-19 | 1985-11-11 | パイオニア株式会社 | Printed board |
| JPS6134765U (en) * | 1984-08-02 | 1986-03-03 | 株式会社明電舎 | printed wiring board |
| JPS6228109A (en) * | 1985-07-31 | 1987-02-06 | Nec Kansai Ltd | Cutting method for printed wiring structure |
| JPS6261454U (en) * | 1985-10-08 | 1987-04-16 | ||
| JPS62178564U (en) * | 1986-05-02 | 1987-11-12 | ||
| JPS62197875U (en) * | 1986-06-09 | 1987-12-16 |
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1996
- 1996-10-07 JP JP8286178A patent/JP2809305B2/en not_active Expired - Fee Related
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50142788A (en) * | 1974-05-02 | 1975-11-17 | ||
| JPS5254874U (en) * | 1975-10-20 | 1977-04-20 | ||
| JPS58105166U (en) * | 1982-01-13 | 1983-07-18 | 東芝ケミカル株式会社 | double-sided printed wiring board |
| JPS594722A (en) * | 1982-07-01 | 1984-01-11 | Mochizuki Motor Kk | Clutcher for drawing operation of wooden sheet pile |
| JPS60118262U (en) * | 1984-01-18 | 1985-08-09 | 日本電気株式会社 | Printed board |
| JPS60169857U (en) * | 1984-04-19 | 1985-11-11 | パイオニア株式会社 | Printed board |
| JPS6134765U (en) * | 1984-08-02 | 1986-03-03 | 株式会社明電舎 | printed wiring board |
| JPS6228109A (en) * | 1985-07-31 | 1987-02-06 | Nec Kansai Ltd | Cutting method for printed wiring structure |
| JPS6261454U (en) * | 1985-10-08 | 1987-04-16 | ||
| JPS62178564U (en) * | 1986-05-02 | 1987-11-12 | ||
| JPS62197875U (en) * | 1986-06-09 | 1987-12-16 |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPWO2008066133A1 (en) * | 2006-11-30 | 2010-03-11 | 株式会社トクヤマ | Method for manufacturing metallized ceramic substrate chip |
| JP5037521B2 (en) * | 2006-11-30 | 2012-09-26 | 株式会社トクヤマ | Method for manufacturing metallized ceramic substrate chip |
| JP2014042066A (en) * | 2008-06-20 | 2014-03-06 | Hitachi Metals Ltd | Ceramic assembled board |
| JP2018181990A (en) * | 2017-04-10 | 2018-11-15 | 株式会社ケーヒン | Electronic control device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2809305B2 (en) | 1998-10-08 |
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