JPH0878217A - Manufacture of rectangular-shaped thin film chip resistor - Google Patents

Manufacture of rectangular-shaped thin film chip resistor

Info

Publication number
JPH0878217A
JPH0878217A JP6211174A JP21117494A JPH0878217A JP H0878217 A JPH0878217 A JP H0878217A JP 6211174 A JP6211174 A JP 6211174A JP 21117494 A JP21117494 A JP 21117494A JP H0878217 A JPH0878217 A JP H0878217A
Authority
JP
Japan
Prior art keywords
thin film
resistance
chip resistor
film
dividing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6211174A
Other languages
Japanese (ja)
Other versions
JP3196519B2 (en
Inventor
Hiroyuki Yamada
博之 山田
Akio Fukuoka
章夫 福岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP21117494A priority Critical patent/JP3196519B2/en
Publication of JPH0878217A publication Critical patent/JPH0878217A/en
Application granted granted Critical
Publication of JP3196519B2 publication Critical patent/JP3196519B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Non-Adjustable Resistors (AREA)

Abstract

PURPOSE: To prevent both the generation of deterioration in linearity and the generation of disconnection failure by a method wherein a resistance pattern is formed by conducting two or more exposing operations in a photolithography process without increasing number of man-hours. CONSTITUTION: Dividing grooves 2, in vertical and horizontal directions opposing with each other, are formed on the front and back sides of an alumina substrate 1. These dividing grooves 2 are formed in such a manner that the groove on the front side is deeper than the grooves on the back side. Then, after a thin film front side electrode layer 3 and a thin film back side electrode layer have been formed, a thin resistance film 5 is formed on the whole back side of the substrate 1, and a photolithography process is conducted for formation of the thin resistance film 5 on the prescribed resistance pattern 6. First, positive type resist is uniformly coated on the thin resistance film 5, and after the resist has been dried up, an exposing operation is conducted. The exposing operation is conducted twice using different photomasks of different pattern. A photomask, which is designed to expose the dividing grooves 2 only, is used in the exposing operation.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は一般的に電子回路に用い
られる角形薄膜チップ抵抗器の製造方法に関するもので
ある。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates generally to a method of manufacturing a rectangular thin film chip resistor used in electronic circuits.

【0002】[0002]

【従来の技術】近年、電子機器のダウンサイジング化に
伴い、その回路基板の実装密度を高めるため、搭載され
る電子部品に対する小形化への要求が高まっている。角
形チップ抵抗器に対しても小形化が進められるととも
に、高精度(抵抗値許容差、抵抗温度特性)かつ電流雑
音特性に優れた角形薄膜チップ抵抗器への要求が高まっ
ている。
2. Description of the Related Art In recent years, with the downsizing of electronic equipment, there is an increasing demand for miniaturization of electronic components to be mounted in order to increase the packaging density of the circuit board. Along with the miniaturization of the rectangular chip resistors, there is an increasing demand for rectangular thin film chip resistors with high accuracy (resistance tolerance, resistance temperature characteristics) and excellent current noise characteristics.

【0003】従来の角形薄膜チップ抵抗器の製造方法の
一例を図2に示す。まず、表裏面に互いに相対するよう
に設けた複数の縦方向および横方向の分割溝22を有す
る96%アルミナからなる絶縁基板21を受け入れる。
この絶縁基板21は、その材料コストを低減するために
角形厚膜チップ抵抗器に使用するものと共用している。
したがって、絶縁基板21に設けている分割溝22は、
後の分割工程における個片状の分割形状を良好にするた
め、厚膜抵抗体を形成する面を表面とすると、表面の方
が裏面よりも深く形成されているのが一般的である。
An example of a conventional method for manufacturing a rectangular thin film chip resistor is shown in FIG. First, the insulating substrate 21 made of 96% alumina having a plurality of vertical and horizontal dividing grooves 22 provided so as to face each other on the front and back surfaces is received.
This insulating substrate 21 is also used as a rectangular thick film chip resistor in order to reduce the material cost.
Therefore, the dividing groove 22 provided on the insulating substrate 21 is
In order to improve the individual divided shape in the subsequent dividing step, when the surface on which the thick film resistor is formed is the front surface, the front surface is generally formed deeper than the back surface.

【0004】次に、96%アルミナ基板21の表面およ
び裏面にAuを主成分とする金属有機物からなる電極ペ
ーストをスクリーン印刷・乾燥する。その後、電極ペー
ストの有機成分だけを飛ばし、金属成分だけをアルミナ
基板21上に焼き付けるために、ベルト式連続焼成炉に
よって850℃の温度で、ピーク時間6分、IN−OU
T時間45分のプロファイルによって焼成し、薄膜上面
電極層23および薄膜裏面電極層を形成する工程を行
う。
Next, an electrode paste made of a metal organic material containing Au as a main component is screen-printed and dried on the front and back surfaces of the 96% alumina substrate 21. Thereafter, in order to remove only the organic component of the electrode paste and burn only the metal component onto the alumina substrate 21, a belt type continuous firing furnace was used at a temperature of 850 ° C. for a peak time of 6 minutes, IN-OU.
A step of forming the thin film upper surface electrode layer 23 and the thin film back surface electrode layer is performed by firing according to a profile of T time 45 minutes.

【0005】次に、絶縁基板21の表面(分割溝の深い
面)上全体にNi−Cr等の薄膜抵抗皮膜24を形成す
るスパッタ工程と、薄膜抵抗皮膜24を所定の抵抗パタ
ーン25に形成するフォトリソプロセス工程(レジスト
塗布・乾燥、露光、現像、エッチング、レジスト剥離)
と、抵抗パターン25を安定な膜にするために、窒素中
などで350〜400℃の熱処理工程とを行う。その
後、絶縁基板21の分割溝22に残った薄膜抵抗皮膜2
4を除去するために、レーザーにより、抵抗皮膜除去工
程を行い、また、抵抗パターン25の抵抗値を所定の値
に修正するために、レーザートリミングにより抵抗値修
正工程を行う。そして、抵抗値修正済み抵抗パターン2
5を保護するために、熱硬化性の樹脂による保護コート
26の形成工程を行う。さらに、絶縁基板21を短冊状
基板21aに分割する一次基板分割工程を行い、その短
冊状基板21aの端面にスパッタを用い、薄膜端面電極
層27を形成する端面電極形成工程を行う。最後に、短
冊状基板21aを個片状基板21bに分割する二次基板
分割工程を行い、最後にはんだ付け時の信頼性の確保の
ため電極めっき層28を形成する電極めっき工程を行
い、角形薄膜チップ抵抗器を形成していた。
Next, a sputtering step of forming a thin film resistance film 24 of Ni-Cr or the like on the entire surface of the insulating substrate 21 (the surface where the dividing groove is deep), and the thin film resistance film 24 is formed into a predetermined resistance pattern 25. Photolithography process steps (resist coating / drying, exposure, development, etching, resist stripping)
Then, in order to make the resistance pattern 25 a stable film, a heat treatment process at 350 to 400 ° C. is performed in nitrogen or the like. After that, the thin film resistance film 2 remaining in the dividing grooves 22 of the insulating substrate 21
In order to remove No. 4, a resistance film removing process is performed by a laser, and in order to correct the resistance value of the resistance pattern 25 to a predetermined value, a resistance value correcting process is performed by laser trimming. Then, the resistance pattern 2 whose resistance value has been corrected
In order to protect No. 5, a step of forming the protective coat 26 made of a thermosetting resin is performed. Further, a primary substrate dividing step of dividing the insulating substrate 21 into strip substrates 21a is performed, and an end face electrode forming step of forming the thin film end face electrode layer 27 is performed by using sputtering on the end faces of the strip substrate 21a. Finally, a secondary substrate dividing step of dividing the strip substrate 21a into individual substrates 21b is performed, and finally an electrode plating step of forming an electrode plating layer 28 for ensuring reliability at the time of soldering is performed. Formed a thin film chip resistor.

【0006】[0006]

【発明が解決しようとする課題】しかしながら、従来の
薄膜チップ抵抗器の製造方法では、次に示すような問題
点を有していた。
However, the conventional method of manufacturing a thin film chip resistor has the following problems.

【0007】(1)分割溝22を有する絶縁基板21の
表面に薄膜抵抗皮膜24を形成すると、分割溝22に形
成された薄膜抵抗皮膜24をフォトリソプロセス工程で
完全に除去することができない。なぜなら、パターン形
成のために絶縁基板21の表面全体にレジストを塗布す
ると分割溝22内にも流れ込み、しかも抵抗パターン2
5を形成する部分よりもレジストの膜厚が厚くなり、露
光・現像後に分割溝22部分にレジストが残るからであ
る。つまり、抵抗パターン25を形成する部分のレジス
ト膜厚に露光条件を設定する際、分割溝22内にレジス
トが残り、薄膜抵抗皮膜24が覆われたままの状態にさ
れているのである。よって、分割溝22に薄膜抵抗皮膜
24が残れば、隣接素子間で並列抵抗が形成され、目標
とする抵抗値への抵抗値修正が不可能となる。また、並
列抵抗が形成されなくても部分的に残っていれば、最後
の電極めっき工程においてその部分にめっきが付着し、
外観的に美観も損なわれていた。したがって、この分割
溝22内に残ったレジストを除去するためにレーザーに
よる抵抗皮膜除去工程が必要となり、工数を増加させる
という問題点を有していた。
(1) When the thin film resistance film 24 is formed on the surface of the insulating substrate 21 having the dividing grooves 22, the thin film resistance film 24 formed in the dividing grooves 22 cannot be completely removed by the photolithography process step. This is because when a resist is applied to the entire surface of the insulating substrate 21 for pattern formation, it flows into the dividing grooves 22 and the resist pattern 2
This is because the film thickness of the resist becomes thicker than the part where 5 is formed, and the resist remains in the dividing groove 22 part after exposure and development. That is, when the exposure condition is set to the resist film thickness of the portion where the resistance pattern 25 is formed, the resist remains in the dividing groove 22 and the thin film resistance film 24 is left covered. Therefore, if the thin film resistance film 24 remains in the dividing groove 22, a parallel resistance is formed between adjacent elements, and it becomes impossible to correct the resistance value to a target resistance value. In addition, if the parallel resistance is partially left even if it is not formed, the plating will adhere to that part in the final electrode plating step,
The appearance was also impaired. Therefore, in order to remove the resist remaining in the dividing groove 22, a resistance film removing process using a laser is required, which causes a problem of increasing the number of steps.

【0008】(2)フォトリソプロセス工程での露光時
間を延長し、分割溝22内のポジレジストに十分な光量
を与え可溶性とした場合には、エッチング工程で分割溝
22内の薄膜抵抗皮膜24を完全に除去することができ
る。しかし、所定の抵抗パターン25の露光時間も同時
に延長されることになり、光のハレーションが発生し、
直線性を劣化させたり、抵抗体の線幅が狭い場合には断
線不良を発生させたりするという問題点を有していた。
(2) When the exposure time in the photolithography process step is extended and a sufficient amount of light is given to the positive resist in the dividing groove 22 to make it soluble, the thin film resistance film 24 in the dividing groove 22 is formed in the etching step. Can be completely removed. However, the exposure time of the predetermined resistance pattern 25 is also extended at the same time, causing halation of light,
There are problems that the linearity is deteriorated and a disconnection failure occurs when the resistor has a narrow line width.

【0009】本発明は上記問題点を解決し、工数を増加
させることもなく、直線性の劣化防止および断線不良発
生の防止を図った小形の角形薄膜チップ抵抗器を安価に
製造する方法を提供することを目的とする。
The present invention solves the above problems and provides a method for inexpensively manufacturing a small rectangular thin film chip resistor which prevents deterioration of linearity and occurrence of disconnection defects without increasing man-hours. The purpose is to do.

【0010】[0010]

【課題を解決するための手段】上記目的を達成するため
に本発明の角形薄膜チップ抵抗器の製造方法は、表裏面
に互いに相対するように、複数の縦方向および横方向の
分割溝を設けた絶縁基板の裏面に薄膜抵抗皮膜を形成す
る工程と、前記薄膜抵抗皮膜を所定の抵抗パターンに形
成するフォトリソプロセス工程と、前記所定の抵抗パタ
ーン上にチップ抵抗器を形成する工程とを備え、前記フ
ォトリソプロセス工程において、少なくとも2回以上の
露光を行って抵抗パターンを形成する構成としたもので
ある。
In order to achieve the above object, a method of manufacturing a rectangular thin film chip resistor according to the present invention is provided with a plurality of vertical and horizontal dividing grooves so as to face each other. A step of forming a thin film resistance film on the back surface of the insulating substrate, a photolithography process step of forming the thin film resistance film in a predetermined resistance pattern, and a step of forming a chip resistor on the predetermined resistance pattern, In the photolithography process step, the resistance pattern is formed by performing exposure at least twice.

【0011】[0011]

【作用】本発明によれば、2回以上の露光を行うことに
より、両面に分割溝を有する絶縁基板を使用して、薄膜
抵抗皮膜による抵抗パターンを形成する場合に、その直
線性を劣化させることなく、分割溝内のレジストを完全
に露光できるためにその部分の薄膜抵抗皮膜を完全に除
去することができる。また、従来から厚膜チップ抵抗器
で使用している分割溝を両面に有する絶縁基板を使用す
るため、分割形状の良好な小形の角形薄膜チップ抵抗器
を形成することができる。
According to the present invention, when the resistance pattern is formed by the thin film resistance film by using the insulating substrate having the dividing grooves on both surfaces by performing the exposure twice or more, the linearity thereof is deteriorated. Since the resist in the dividing groove can be completely exposed to light, the thin film resistance film in that portion can be completely removed. Further, since the insulating substrate having the dividing grooves on both sides, which is conventionally used in the thick film chip resistor, is used, it is possible to form a small rectangular thin film chip resistor having a good dividing shape.

【0012】[0012]

【実施例】以下、本発明の一実施例の角形薄膜チップ抵
抗器の製造方法について、図1に示す工程図により説明
する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method for manufacturing a rectangular thin film chip resistor according to an embodiment of the present invention will be described below with reference to the process chart shown in FIG.

【0013】まず、耐熱性および絶縁性に優れた96%
アルミナ基板1を受け入れる工程Aを行う。この96%
アルミナ基板1の表裏面には、短冊状、および個片状に
分割するために、互いに相対するように設けた縦方向お
よび横方向の分割溝2(グリーンシート時に金型成形)
が形成されている。形成されている分割溝2は、後の分
割工程における個片状の分割形状を良好にするため、表
面の方が裏面よりも深く形成されている。1.0×0.
5mm角の角形薄膜チップ抵抗器を作製するために、ア
ルミナ基板1の厚みは0.3mm、縦方向および横方向
の分割溝2により区画された個々のユニットの寸法は
1.0×0.5mm、表面の分割溝2の深さを約150
μm、裏面の分割溝の深さを約30μmとした。これ
は、アルミナ基板1は、角形厚膜チップ抵抗器に使用す
る絶縁基板となるので、分割形状を一番良好とするため
である。
First, 96% excellent in heat resistance and insulation.
Step A of receiving the alumina substrate 1 is performed. This 96%
The front and back surfaces of the alumina substrate 1 are divided into strip-shaped and individual pieces so as to face each other in the vertical and horizontal dividing grooves 2 (molding at the time of green sheet).
Are formed. The formed dividing groove 2 is formed so that the front surface is deeper than the back surface in order to improve the individual divided shape in the subsequent dividing step. 1.0 × 0.
In order to manufacture a square thin film chip resistor of 5 mm square, the thickness of the alumina substrate 1 is 0.3 mm, and the size of each unit partitioned by the vertical and horizontal dividing grooves 2 is 1.0 × 0.5 mm. , The depth of the dividing groove 2 on the surface is about 150
μm, and the depth of the dividing groove on the back surface was about 30 μm. This is because the alumina substrate 1 serves as an insulating substrate used for the rectangular thick film chip resistor, and thus has the best divided shape.

【0014】次に、96%アルミナ基板1の表面および
裏面にAuを主成分とする金属有機物からなる電極ペー
ストをスクリーン印刷・乾燥する。その後、金属有機物
電極ペーストの有機成分だけを飛ばし、金属成分だけを
アルミナ基板1上に焼き付けるために、ベルト式連続焼
成炉によって850℃の温度で、ピーク時間6分、IN
−OUT時間45分のプロファイルによって焼成し、薄
膜上面電極層3および薄膜裏面電極層を形成する工程B
を行う。
Next, an electrode paste made of a metal organic material containing Au as a main component is screen-printed and dried on the front and back surfaces of the 96% alumina substrate 1. After that, in order to remove only the organic component of the metal organic electrode paste and burn only the metal component onto the alumina substrate 1, a belt type continuous firing furnace was used at a temperature of 850 ° C. for a peak time of 6 minutes, and the IN
Step B of forming a thin film upper surface electrode layer 3 and a thin film back surface electrode layer by firing according to a profile of -OUT time 45 minutes
I do.

【0015】次に96%アルミナ基板1の裏面全体にN
i−Cr等の薄膜抵抗皮膜5を形成するスパッタ工程C
を行う。
Next, the entire back surface of the 96% alumina substrate 1 is filled with N.
Sputtering step C for forming a thin film resistance film 5 such as i-Cr
I do.

【0016】次に、薄膜抵抗皮膜5を所定の抵抗パター
ン6に形成するためにフォトリソプロセス工程を行う。
このフォトリソプロセス工程について詳細に説明する。
まず、ポジタイプのレジストを薄膜抵抗皮膜5上に均一
に塗布・乾燥(工程D)した後、露光を行う。ここで露
光は2回行い、露光ごとに各々異なるパターンによるフ
ォトマスクを使用する。1回目は、分割溝2のみが露光
されるよう設計されたフォトマスクを使用して露光する
(工程E)。このときの露光時間は、分割溝2内に塗布
されたレジストすべてが可溶性となるに十分な光量が確
保されるように設定した。次に2回目の露光を所定のパ
ターン6によるフォトマスクを使用して行う(工程
F)。このときの露光時間は従来の設定のままでよい。
これで2回の露光を完了する。この方法により、抵抗パ
ターン6を形成する部分には従来と同じ時間のみ露光す
ることができ、分割溝2には十分な露光を行うことがで
きる。この後、現像(工程G)ポストベークを経てエッ
チング(工程H)を行い、最後にレジストを剥離して所
定の抵抗パターン6に形成されたNi−Crによる薄膜
抵抗皮膜5を形成する。
Next, a photolithography process step is performed to form the thin film resistance film 5 on the predetermined resistance pattern 6.
This photolithography process step will be described in detail.
First, a positive type resist is uniformly applied onto the thin film resistance film 5 and dried (step D), and then exposed. Here, the exposure is performed twice, and a photomask having a different pattern is used for each exposure. The first time, exposure is performed using a photomask designed to expose only the dividing groove 2 (step E). The exposure time at this time was set so that a sufficient amount of light was ensured so that all the resist applied in the dividing groove 2 was soluble. Next, the second exposure is performed using a photomask having a predetermined pattern 6 (step F). The exposure time at this time may be the same as the conventional setting.
This completes two exposures. By this method, the portion where the resistance pattern 6 is formed can be exposed only for the same time as the conventional one, and the dividing groove 2 can be sufficiently exposed. After that, etching (step H) is performed through development (step G) post-baking, and finally the resist is peeled off to form a thin film resistance film 5 of Ni—Cr formed on a predetermined resistance pattern 6.

【0017】次に抵抗パターン6を安定な膜にするため
に、窒素中で350〜400℃の温度の熱処理工程Iを
行う。
Next, in order to form a stable film of the resistance pattern 6, a heat treatment step I at a temperature of 350 to 400 ° C. is performed in nitrogen.

【0018】その後、抵抗パターン6の抵抗値を所定の
値に修正するためにレーザートリミングにより、抵抗値
修正工程Jを行う。
Then, a resistance value correcting step J is performed by laser trimming in order to correct the resistance value of the resistance pattern 6 to a predetermined value.

【0019】次に、抵抗値修正済み抵抗パターン6を保
護するために、エポキシ系樹脂ペーストをスクリーン印
刷し、熱硬化して保護コート7を形成する工程Kを行
う。
Next, in order to protect the resistance pattern 6 whose resistance value has been corrected, an epoxy resin paste is screen-printed and heat-cured to form a protective coat 7.

【0020】そして、96%アルミナ基板1を短冊状基
板1aに分割する一次分割工程Lを行い、その短冊状基
板1aの端面にスパッタリングにより薄膜上面電極層3
と薄膜裏面電極層をつなぐように、Ni−Cr系の薄膜
端面電極層8を形成する端面電極形成工程Mを行う。
Then, a primary dividing step L for dividing the 96% alumina substrate 1 into strip substrates 1a is performed, and the thin film upper surface electrode layer 3 is formed on the end face of the strip substrate 1a by sputtering.
An end face electrode forming step M for forming the Ni—Cr-based thin film end face electrode layer 8 is performed so as to connect the thin film back face electrode layer with.

【0021】最後に、短冊状基板1aを個片状基板1b
に分割する二次分割工程Nを行い、露出している薄膜上
面電極層3と薄膜裏面電極層と薄膜端面電極層8のはん
だ付け時の電極食われの防止およびはんだ付け時の信頼
性の確保のため、電解めっきによってNi,Sn−Pb
のめっき層9を形成する電極めっき工程Oを行う。
Finally, the strip-shaped substrate 1a is replaced with the individual substrate 1b.
A secondary dividing step N is performed to divide the exposed thin film upper surface electrode layer 3, thin film back surface electrode layer, and thin film end surface electrode layer 8 to prevent electrode erosion during soldering and ensure reliability during soldering. Therefore, by electrolytic plating, Ni, Sn-Pb
The electrode plating step O for forming the plating layer 9 is performed.

【0022】以上の工程により、従来の製造方法で発生
していた分割溝2内に薄膜抵抗皮膜5が残ることがなく
なり、また露光工程を変更することによる抵抗パターン
6の直線性を劣化させることもなく、しかも分割後の製
品分割形状は従来と同等にすることができる。
By the steps described above, the thin film resistance film 5 is not left in the dividing groove 2 generated by the conventional manufacturing method, and the linearity of the resistance pattern 6 is deteriorated by changing the exposure process. Moreover, the product division shape after division can be made equal to the conventional one.

【0023】なお、本発明ではアルミナ基板1の裏面に
抵抗体を形成したが、表面を使用しても同様の効果を得
ることができる。この場合、分割溝2が深いので、1回
目の露光(分割溝2部分)での露光時間を、裏面を使用
する場合に比べ、長く設定すればよい。また、一般的
に、角形厚膜チップ抵抗器に使用される絶縁基板は一方
の面の方が、他方の面よりも分割溝2の深さが深くなる
ように形成して分割形状を良好にしている。よって、こ
の絶縁基板を使用する場合には、分割溝2の浅い裏面を
利用する方が有利である。さらに、裏面の分割溝2の深
さは30μmよりも深い場合も同様の効果が得られる
が、30μmの場合の方が角形厚膜チップ抵抗器では分
割形状が一番良好である。抵抗パターンを形成する面の
分割溝は浅い方がフォトリソプロセス工程を考えた場合
有利であるが、分割形状も考慮しなければならないため
に、30μmが一番適している。
Although the resistor is formed on the back surface of the alumina substrate 1 in the present invention, the same effect can be obtained by using the front surface. In this case, since the dividing groove 2 is deep, the exposure time in the first exposure (the dividing groove 2 portion) may be set longer than when the back surface is used. In general, the insulating substrate used for the rectangular thick film chip resistor is formed such that one surface has a greater depth of the dividing groove 2 than the other surface to improve the dividing shape. ing. Therefore, when using this insulating substrate, it is advantageous to use the shallow back surface of the dividing groove 2. Further, the same effect can be obtained when the depth of the division groove 2 on the back surface is deeper than 30 μm, but the division shape is the best in the square thick film chip resistor when the depth is 30 μm. It is more advantageous that the dividing groove on the surface on which the resistance pattern is formed is shallower in consideration of the photolithography process step, but since the dividing shape must be taken into consideration, 30 μm is most suitable.

【0024】また、本発明では1.0×0.5mm角の
角形薄膜チップ抵抗器の実施例を示したが、これより大
きい形状でも本発明が適用可能である。
In the present invention, an example of a rectangular thin film chip resistor of 1.0 × 0.5 mm square is shown, but the present invention can be applied to a larger shape.

【0025】さらに、本発明では絶縁基板としてアルミ
ナ基板1を用いたが、その他の基板でも絶縁性があれば
用いてもかまわない。
Further, although the alumina substrate 1 is used as the insulating substrate in the present invention, other substrates may be used as long as they have insulating properties.

【0026】[0026]

【発明の効果】以上のように本発明によれば、分割溝部
分と抵抗パターン部分の露光を別々で行うため、分割溝
内の薄膜抵抗皮膜を完全に除去し、かつ所定の抵抗パタ
ーンで直線性に優れた抵抗パターンを形成することがで
き、抵抗パターン形成工程での不良率を低減できる。ま
た、従来から厚膜チップ抵抗器で大量に使用している分
割溝を両面に有する絶縁基板を使用し、かつ従来必要と
された抵抗皮膜除去工程を削除できるため、大幅に製造
コストを低減することができる(抵抗皮膜除去工程より
も露光工程を増やした方が、はるかに工数を低減するこ
とができ、生産性を向上することができる)。さらに両
面に分割溝を有する絶縁基板を使用するため、分割形状
が良好で実装性に優れた小形の角形薄膜チップ抵抗器を
安価に供給することが可能となる。
As described above, according to the present invention, since the division groove portion and the resistance pattern portion are separately exposed, the thin film resistance film in the division groove is completely removed, and a straight line having a predetermined resistance pattern is formed. The resistance pattern having excellent properties can be formed, and the defect rate in the resistance pattern forming step can be reduced. Moreover, since an insulating substrate having split grooves on both sides, which has been conventionally used in large amounts in thick film chip resistors, can be used, and the conventionally required resistance film removing step can be eliminated, the manufacturing cost is greatly reduced. (It is possible to significantly reduce the number of steps and improve the productivity by increasing the number of exposure steps rather than the resistance film removing step). Further, since the insulating substrate having the dividing grooves on both sides is used, it is possible to inexpensively supply a small-sized rectangular thin film chip resistor having a good dividing shape and excellent mountability.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例の角形薄膜チップ抵抗器の製
造方法を示す工程図
FIG. 1 is a process diagram showing a method of manufacturing a prismatic thin film chip resistor according to an embodiment of the present invention.

【図2】従来の角形薄膜チップ抵抗器の製造方法を示す
工程図
FIG. 2 is a process diagram showing a method of manufacturing a conventional rectangular thin film chip resistor.

【符号の説明】[Explanation of symbols]

1 アルミナ基板 2 分割溝 3 薄膜上面電極層 5 薄膜抵抗皮膜 7 保護コート 8 薄膜端面電極層 9 めっき層 1 Alumina substrate 2 Dividing groove 3 Thin film upper surface electrode layer 5 Thin film resistance film 7 Protective coat 8 Thin film end face electrode layer 9 Plating layer

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 表裏面に互いに相対するように、複数の
縦方向および横方向の分割溝を設けた絶縁基板の裏面に
薄膜抵抗皮膜を形成する工程と、前記薄膜抵抗皮膜を所
定の抵抗パターンに形成するフォトリソプロセス工程
と、前記所定の抵抗パターン上にチップ抵抗器を形成す
る工程とを備え、前記フォトリソプロセス工程におい
て、少なくとも2回以上の露光を行って抵抗パターンを
形成する角形薄膜チップ抵抗器の製造方法。
1. A step of forming a thin film resistance film on the back surface of an insulating substrate provided with a plurality of vertical and horizontal dividing grooves so as to face each other on the front and back surfaces, and the thin film resistance film having a predetermined resistance pattern. And a photolithography process step of forming a chip resistor on the predetermined resistance pattern. In the photolithography process step, a rectangular thin film chip resistor for forming a resistance pattern by performing at least two exposures. Manufacturing method.
【請求項2】 絶縁基板は、その裏面に設けた分割溝の
深さを表面に設けた分割溝の深さよりも浅くした請求項
1記載の角形薄膜チップ抵抗器の製造方法。
2. The method of manufacturing a rectangular thin film chip resistor according to claim 1, wherein the insulating substrate has a depth of the dividing groove provided on the back surface thereof smaller than that of the dividing groove provided on the front surface.
【請求項3】 露光の少なくとも1回は、分割溝のみを
露光する請求項1記載の角形薄膜チップ抵抗器の製造方
法。
3. The method of manufacturing a rectangular thin film chip resistor according to claim 1, wherein only the dividing groove is exposed at least once.
JP21117494A 1994-09-05 1994-09-05 Method of manufacturing rectangular thin film chip resistor Expired - Fee Related JP3196519B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21117494A JP3196519B2 (en) 1994-09-05 1994-09-05 Method of manufacturing rectangular thin film chip resistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21117494A JP3196519B2 (en) 1994-09-05 1994-09-05 Method of manufacturing rectangular thin film chip resistor

Publications (2)

Publication Number Publication Date
JPH0878217A true JPH0878217A (en) 1996-03-22
JP3196519B2 JP3196519B2 (en) 2001-08-06

Family

ID=16601640

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21117494A Expired - Fee Related JP3196519B2 (en) 1994-09-05 1994-09-05 Method of manufacturing rectangular thin film chip resistor

Country Status (1)

Country Link
JP (1) JP3196519B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001307903A (en) * 2000-04-11 2001-11-02 Koketsu Kagi Kofun Yugenkoshi Method of manufacturing thin film resistor
JP2007150197A (en) * 2005-11-30 2007-06-14 Rohm Co Ltd Chip type electronic component
JP2007194595A (en) * 2005-12-19 2007-08-02 Matsushita Electric Ind Co Ltd Method of manufacturing thin-film chip resistor, thin-film chip capacitor, and thin-film chip inductor
JP2007522644A (en) * 2003-11-04 2007-08-09 エレクトロ サイエンティフィック インダストリーズ インコーポレーテッド Method of forming terminals of passive electronic components using laser

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001307903A (en) * 2000-04-11 2001-11-02 Koketsu Kagi Kofun Yugenkoshi Method of manufacturing thin film resistor
JP2007522644A (en) * 2003-11-04 2007-08-09 エレクトロ サイエンティフィック インダストリーズ インコーポレーテッド Method of forming terminals of passive electronic components using laser
JP2007150197A (en) * 2005-11-30 2007-06-14 Rohm Co Ltd Chip type electronic component
JP2007194595A (en) * 2005-12-19 2007-08-02 Matsushita Electric Ind Co Ltd Method of manufacturing thin-film chip resistor, thin-film chip capacitor, and thin-film chip inductor

Also Published As

Publication number Publication date
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