JPH08307153A - Structure of package - Google Patents

Structure of package

Info

Publication number
JPH08307153A
JPH08307153A JP12730395A JP12730395A JPH08307153A JP H08307153 A JPH08307153 A JP H08307153A JP 12730395 A JP12730395 A JP 12730395A JP 12730395 A JP12730395 A JP 12730395A JP H08307153 A JPH08307153 A JP H08307153A
Authority
JP
Japan
Prior art keywords
package
terminal
terminals
recess
internal memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12730395A
Other languages
Japanese (ja)
Other versions
JP3426053B2 (en
Inventor
Toshio Uchida
俊男 内田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toyo Communication Equipment Co Ltd
Original Assignee
Toyo Communication Equipment Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toyo Communication Equipment Co Ltd filed Critical Toyo Communication Equipment Co Ltd
Priority to JP12730395A priority Critical patent/JP3426053B2/en
Publication of JPH08307153A publication Critical patent/JPH08307153A/en
Application granted granted Critical
Publication of JP3426053B2 publication Critical patent/JP3426053B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Landscapes

  • Oscillators With Electromechanical Resonators (AREA)

Abstract

PURPOSE: To rewrite temperature compensation data without a defect such as complicated manufacture process or malfunction due to mis-connection of terminals by providing a recessed part to a proper position in the middle of a lower side of a package and fixing a continuity terminal for internal memory rewrite to the inner bottom of the recessed part. CONSTITUTION: Conductor patterns arranged between each of ceramics layers 2 forming a package 1 are electrically connected by via-holes as required. Then inter-layer conductive patterns connected respectively electrically to an input output conductor terminal 16a arranged to an end ridge of the package 1 or an internal memory rewrite conducting terminal 16b arranged to an inner bottom side of a recessed part 15 provided in the middle of a lower side of the package 1 by via-holes. In the adjustment after the assembling, a jig is used to connect a jumper pin to the input output terminal 16a and the adjustment terminal 16b to secure electric connection and data are rewritten to a memory in an IC chip 6.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は組立て後に外部から内部
の半導体素子のメモリ内容等を書き換えることが可能な
導通端子を有する温度補償型水晶発振器のパッケージの
構造の改良に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement in the structure of a temperature-compensated crystal oscillator package having a conductive terminal capable of rewriting the memory contents of a semiconductor element inside from outside after assembly.

【0002】[0002]

【従来技術】温度変化に対する発振周波数の変動を抑
え、常に安定した出力を得る温度補償型水晶発振器は、
水晶振動子、チップ抵抗、チップコンデンサ及びトリマ
コンデンサ等の部品を導電パターンが印刷形成されたア
ルミナ基板上にハンダを用いて実装したものを絶縁材料
から成るパッケージ内に気密的に収納した構成を有す
る。上記トリマコンデンサに対しては、実装直後に穴を
有した金属製キャップによってこれを覆い、各部品の実
装終了後に出力周波数が所望の温度範囲に渡って一定に
なる様に、トリマコンデンサの容量値を調整するという
工程が行われる。
2. Description of the Related Art A temperature-compensated crystal oscillator that suppresses fluctuations in oscillation frequency due to temperature changes and always obtains stable output is
It has a structure in which parts such as a crystal oscillator, a chip resistor, a chip capacitor, and a trimmer capacitor are mounted on an alumina substrate on which a conductive pattern is printed by using solder and are hermetically housed in a package made of an insulating material. . For the above trimmer capacitor, cover it with a metal cap having a hole immediately after mounting, and set the capacitance value of the trimmer capacitor so that the output frequency becomes constant over the desired temperature range after mounting each component. Is adjusted.

【0003】ところで、近年の半導体技術の進歩によ
り、温度補償を行うべき補償データを半導体メモリ内に
記憶して温度の変化に対して対応する補償データを読み
出して温度補償を行うようにした発振器がある。このよ
うな温度補償型水晶発振器では、例えば発振器を恒温槽
に納めて雰囲気温度を変化させて夫々の温度における補
償データを半導体メモリに記憶させるよう構成してい
る。そして、固有の温度補償データを記憶させる作業を
行う場合には、外部から各温度に応じたデータを送り込
んで半導体メモリに書き込む必要がある。
By the way, due to recent advances in semiconductor technology, there has been an oscillator in which compensation data to be temperature-compensated is stored in a semiconductor memory and the compensation data corresponding to a change in temperature is read to perform temperature compensation. is there. In such a temperature-compensated crystal oscillator, for example, the oscillator is housed in a thermostatic chamber, the ambient temperature is changed, and compensation data at each temperature is stored in a semiconductor memory. When the operation of storing the unique temperature compensation data is performed, it is necessary to send data corresponding to each temperature from the outside and write the data in the semiconductor memory.

【0004】最近の温度補償型水晶発振器として、IC
用のパッケージとして多用されているLCC(リードレ
ス・チップ・キャリア)型のパッケージに水晶振動子と
発振回路を収容する構成が提案されている。例えば、特
開平6−232630号公報には、水晶発振回路が実装
された絶縁製基板がミシン目及びスルーホールから成る
ブレークラインを越えてパッケージ外部に接続基板とし
て延在しており、この接続基板の端部をエッジコネクタ
形状とすることにより、製造時に外部から基板上のIC
チップである半導体メモリへ温度補償データを書込み、
その後、ブレークラインによって該接続基板を切除する
構成となっている。接続基板の切除後においては、切除
面に残るスルーホール導体(パッド)を用いて温度補償
データの書込みを行うことが可能となる。しかし、この
従来技術にあっては、製造時のデータ書込み後に接続基
板を切除する作業が必要であり、工程の増大と、基板資
源の無駄が発生する。
As a recent temperature compensation type crystal oscillator, IC
There has been proposed a configuration in which a crystal resonator and an oscillation circuit are housed in an LCC (leadless chip carrier) type package which is widely used as a package for a laser. For example, in Japanese Unexamined Patent Publication No. 6-232630, an insulating substrate on which a crystal oscillation circuit is mounted extends as a connection substrate outside the package beyond a break line formed of perforations and through holes. By making the edge part of the edge connector shape, the IC on the substrate is
Write temperature compensation data to the semiconductor memory that is a chip,
After that, the connection substrate is cut off by a break line. After the connection board is cut off, the temperature compensation data can be written using the through-hole conductor (pad) remaining on the cut surface. However, in this conventional technique, it is necessary to cut off the connection substrate after data writing at the time of manufacturing, resulting in an increase in processes and waste of substrate resources.

【0005】また、実開平6−34260号公報には、
直方体形状を有するパッケージの対向する一対の側面に
通常の入出力端子を配置するとともに、他の一対の側面
には調整用の端子を側面から突出しないように逆L字形
の切欠きを設けてパッケージの下部に配置した構成が開
示されている。しかし、この従来例に於ては、パッケー
ジの側面を利用して調整用の端子を設ける為、パッケー
ジの大きさによって内部メモリ書き換え用端子の数が制
限されると共に、入出力端子の配置場所及び端子数が制
限される為に、設計の自由度が狭くなり、更に治具に配
置された接触ピンを上記切欠き内に差し入れて切欠き内
部の端子に接触させる際に、ピン先端を安定して端子に
接触させ続けることが難しく、ピンが端子から外れてパ
ッケージの外側へ逃げ、端子との接続が良好に行われ
ず、良好な調整を期待することができない。
Further, Japanese Utility Model Laid-Open No. 6-34260 discloses that
A package having a rectangular parallelepiped shape has normal I / O terminals arranged on a pair of opposite side surfaces, and an inverted L-shaped cutout is provided on the other pair of side surfaces so that adjustment terminals do not protrude from the side surfaces. Is disclosed below. However, in this conventional example, since the terminals for adjustment are provided by utilizing the side surface of the package, the number of terminals for rewriting the internal memory is limited by the size of the package, and the location of the input / output terminals is Since the number of terminals is limited, the degree of freedom in design is narrowed down.In addition, when inserting the contact pin placed in the jig into the above notch and making contact with the terminal inside the notch, stabilize the pin tip. It is difficult to keep the terminal in contact with the terminal, the pin disengages from the terminal and escapes to the outside of the package, the connection with the terminal is not performed well, and good adjustment cannot be expected.

【0006】また、実開平6−13155号公報には、
直方体形状のパッケージの対向する一対の側面に通常の
入出力端子を配置し、他の一対の側面には調整用の端子
を配置した構成が開示されている。しかし、この従来例
に於ては、パッケージの側面の平坦部に内部メモリ書き
換え用の端子を設けているので、使用者がこの端子を他
の端子と見誤って誤操作することがあり、またこの不具
合をなくするために書き換え後に当該端支部にマスキン
グ等を施すと、余計な工程が加わってデバイスのコスト
アップにつながる。
Further, Japanese Utility Model Laid-Open No. 6-13155 discloses that
A configuration is disclosed in which normal input / output terminals are arranged on a pair of opposing side surfaces of a rectangular parallelepiped package, and adjustment terminals are arranged on another pair of side surfaces. However, in this conventional example, since the terminal for rewriting the internal memory is provided in the flat portion on the side surface of the package, the user may mistake this terminal for other terminals and make an erroneous operation. If masking or the like is applied to the end support after rewriting in order to eliminate a defect, an extra step is added and the device cost is increased.

【0007】[0007]

【発明の目的】本発明は上記に鑑みてなされたものであ
り、水晶振動子やメモリICチップ等を実装した基板を
パッケージにより気密封止した構造の温度補償型水晶発
振器において、端子を見誤って誤操作したり、製造工程
を複雑化する等の不具合を伴うことなく、温度補償デー
タの書き換えを行うことができる温度補償型水晶発振器
を提供することを目的としている。
SUMMARY OF THE INVENTION The present invention has been made in view of the above, and in a temperature-compensated crystal oscillator having a structure in which a substrate on which a crystal oscillator, a memory IC chip, etc. are mounted is hermetically sealed by a package, a terminal is mistakenly detected. It is an object of the present invention to provide a temperature-compensated crystal oscillator that can rewrite temperature-compensated data without causing a malfunction such as a malfunction or complicating a manufacturing process.

【0008】[0008]

【発明の概要】上記目的を達成するため本発明は、水晶
振動子とICとを内部に収納するパッケージの本体下面
中央部適所に凹所を設け、該凹所の内底部に内部メモリ
書き換え用の導通端子を固定したことを特徴とする。
SUMMARY OF THE INVENTION In order to achieve the above object, the present invention provides a recess in a central portion of a lower surface of a main body of a package for accommodating a crystal oscillator and an IC therein, and rewriting an internal memory in an inner bottom portion of the recess. The conductive terminal of is fixed.

【0009】[0009]

【発明の実施例】以下、添付図面に示した実施例により
本発明を詳細に説明する。図1(a) 及び(b) は本発明の
一実施例の温度補償型水晶発振器の縦断面図及び底面図
であり、図2は同じ水晶発振器の平面図であってキャッ
プを外した状態を示している。符号1はパッケージの本
体であり、パッケージ1は一般的にはグリーンシート状
の酸化焼成セラミックス2を多層化し、その表面及び層
間に導電パターンを配置した構成を有している。パッケ
ージ1の中央部は凹陥状になっており、該凹陥部の外周
は環状の囲繞部3となっている。環状囲繞部3の上面に
は環状のコバールに金メッキを施したプリフォーム4が
ろう付けにより固定されている。5はキャップであり、
コバールの薄板に金メッキを施したものを用い、このキ
ャップ5はパラレルシーム溶接によってプリフォーム4
上に固着される。この結果、キャップ5はパッケージ1
の環状囲繞部3に固着されてパッケージ内部を気密的に
封止することとなる。6はパッケージの凹陥部の内底面
に導電性接着剤6aを介して固定されるICチップであ
り、7はAu或はAl等から成るボンディングワイヤで
あり、凹陥部適所に設けた張出し部8上に設けたパッド
9とICチップ6のの端子とを接続する。符号10は水
晶振動子素片であり、この素片10は一般にATカット
と呼ばれる周波数−温度特性の良好な水晶振動子素片が
用いられる。この水晶振動子素片10は、導電性の接着
剤10aによってパッケージ1の凹陥部内に設けられた
水晶振動子接続用端子11に片持ち状態で電気的及び機
械的に固定される。
BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be described in detail below with reference to the embodiments shown in the accompanying drawings. 1 (a) and 1 (b) are a longitudinal sectional view and a bottom view of a temperature-compensated crystal oscillator according to an embodiment of the present invention, and FIG. 2 is a plan view of the same crystal oscillator with a cap removed. Shows. Reference numeral 1 is the body of the package, and the package 1 generally has a structure in which green sheet-shaped oxidatively fired ceramics 2 are multilayered and conductive patterns are arranged on the surface and between the layers. The central portion of the package 1 has a concave shape, and the outer circumference of the concave portion is an annular surrounding portion 3. On the upper surface of the annular surrounding portion 3, a gold-plated preform 4 of an annular kovar is fixed by brazing. 5 is a cap,
A thin Kovar plate with gold plating is used. This cap 5 is preformed by parallel seam welding.
Stuck on top. As a result, the cap 5 is the package 1
It is fixed to the annular surrounding portion 3 to hermetically seal the inside of the package. Reference numeral 6 is an IC chip fixed to the inner bottom surface of the recess of the package via a conductive adhesive 6a, and 7 is a bonding wire made of Au, Al, or the like, on an overhanging portion 8 provided at a proper position of the recess. The pad 9 provided on the terminal and the terminal of the IC chip 6 are connected. Reference numeral 10 is a crystal resonator element, and a crystal resonator element having a good frequency-temperature characteristic generally called AT cut is used as the element 10. The crystal unit 10 is cantilevered and electrically and mechanically fixed to the crystal unit connecting terminal 11 provided in the recess of the package 1 by a conductive adhesive 10a.

【0010】尚、パッケージ本体1を構成する各セラミ
ックス層2の層間に配置された導電パターンの間は、必
要に応じてビアホールによって電気的に接続される。そ
してこれら層間導電パターンは、本体1の端縁に配列し
た入出力用の導電端子16a、或はパッケージ本体1の
下面中央部に設けた凹所15の内底面に配置された内部
メモリ書き換え用の導電端子16bに、上記ビアホール
により夫々電気的に接続されている。なお、符号16c
は熱応力緩和用に設けられたダミー端子である。
The conductive patterns arranged between the ceramic layers 2 constituting the package body 1 are electrically connected by via holes, if necessary. These interlayer conductive patterns are used for input / output conductive terminals 16a arranged on the edge of the main body 1 or for rewriting the internal memory arranged on the inner bottom surface of the recess 15 provided at the center of the lower surface of the package main body 1. The via holes are electrically connected to the conductive terminals 16b, respectively. Note that reference numeral 16c
Is a dummy terminal provided for thermal stress relaxation.

【0011】上記内部メモリ書き換え用の導電端子1b
は、パッケージ本体1の底面の中央部の適所、即ち他の
端子16a,16cが設けられている本体の端縁を除い
た中央部に複数個配置された凹所15の内底面に固定さ
れており、上記図示しないビアホール、パッド9、ワイ
ヤ7等を介してICチップ6の端子等に接続されてい
る。
Conductive terminal 1b for rewriting the internal memory
Is fixed to the inner bottom surface of a plurality of recesses 15 arranged in the central portion of the bottom surface of the package body 1, that is, in the central portion excluding the end edges of the body where the other terminals 16a and 16c are provided. And is connected to the terminals and the like of the IC chip 6 through the via holes, pads 9, wires 7 and the like (not shown).

【0012】なお、上記実施例ではパッケージ側のパッ
ド(導電パターン)とICチップとの接続をボンディン
グワイヤにより実現した例を示したが、これは一例であ
り、ボンディングワイヤ以外の接続手段、例えばフリッ
プチップ、バンプ、ハンダ、導電性接着剤等を用いるこ
とも可能である。
In the above embodiment, the bonding between the pad (conductive pattern) on the package side and the IC chip is realized by a bonding wire, but this is an example, and a connecting means other than the bonding wire, for example, a flip chip is used. It is also possible to use chips, bumps, solders, conductive adhesives and the like.

【0013】上記構成を有した温度補償型水晶発振器
は、通常の表面実装型デバイスと同様にその入出力端子
16aを介して図示しない回路基板上にハンダ付け固定
される。また、組立て後の調整に於ては、治具によって
入出力端子16aに導通用のピンを接続してから、同様
のピン状の端子を調整用端子16bにも接続することに
よって電気的接続を確保した上で、ICチップ内のメモ
リに対してデータの書き換えを行う。なお、データ書き
換えに際して入出力端子1aに対するピンの接続が不要
な場合には接続する必要がないことは勿論である。
The temperature-compensated crystal oscillator having the above structure is soldered and fixed on a circuit board (not shown) through its input / output terminals 16a, as in the case of a normal surface mount device. Further, in the adjustment after the assembly, a jig is used to connect the conducting pin to the input / output terminal 16a, and then a similar pin-shaped terminal is also connected to the adjusting terminal 16b to make electrical connection. After securing the data, the data in the memory in the IC chip is rewritten. Needless to say, it is not necessary to connect the pin to the input / output terminal 1a when rewriting the data.

【0014】上記構成を有した温度補償型水晶発振器を
製造するに当たっては、従来のICパッケージと比較し
ても、格別困難な製造技術を駆使する必要はなく、製造
工程の追加、変更も必要とせず、パッケージ1を制作す
る為の金型だけを若干変更すればよいので、製造の為の
コストアップにつながる虞れが皆無である。
In manufacturing the temperature-compensated crystal oscillator having the above-mentioned structure, it is not necessary to make use of a manufacturing technique which is particularly difficult as compared with the conventional IC package, and addition or modification of the manufacturing process is required. However, since only the mold for producing the package 1 needs to be slightly changed, there is no possibility of increasing the manufacturing cost.

【0015】また、パッケージ1の下面中央部に凹所1
5を設けて、該凹所の内底面に内部メモリ書き換え用の
導電端子16bを設けたので、パッケージ本体の側部に
配置される入出力端子の位置及び個数を従来通りに維持
することができ、内部メモリ書き換え用の端子の存在に
よって制約を受けることがない。従って、内部メモリ書
き換え用端子を必要なだけ多数設けることが可能であ
り、更に凹所15が治具のピンを確実に端子16bへと
導くガイドとなるので、ピンが確実に端子16bに接続
することとなり、書き換え作業時の作業性を高めること
ができる。更に、書き換え用の導電端子16bは、パッ
ケージの端縁から離れた凹所15の内底面に位置してい
る為、ユーザが誤って導電端子16bを操作することは
あり得ない。また、ユーザが必要とする可能性のある端
子16aは、パッケージ本体端縁に露出した状態で配置
されているので、ユーザにとって不都合が発生すること
もない。
A recess 1 is formed in the center of the lower surface of the package 1.
5 and the conductive terminal 16b for rewriting the internal memory is provided on the inner bottom surface of the recess, the position and number of the input / output terminals arranged on the side of the package body can be maintained as usual. , There is no restriction due to the existence of the terminal for rewriting the internal memory. Therefore, it is possible to provide as many internal memory rewriting terminals as necessary, and since the recesses 15 serve as guides for reliably guiding the pins of the jig to the terminals 16b, the pins are surely connected to the terminals 16b. Therefore, workability at the time of rewriting can be improved. Furthermore, since the rewriting conductive terminal 16b is located on the inner bottom surface of the recess 15 away from the edge of the package, the user cannot operate the conductive terminal 16b by mistake. Further, since the terminal 16a which may be needed by the user is arranged in an exposed state on the edge of the package body, no inconvenience occurs for the user.

【0016】なお、凹所15は、ピン1本分の小径の円
形穴としてもよいし、一つの大径の凹所15の内底面に
複数の導電端子を配置してもよい。また、凹所15は円
形以外の多角形であってもよい。また、凹所15の径
は、深さ方向全長に渡って同一である必要はなく、内部
に向かうほど狭くなる(或は広くなる)テーパー状であ
ってもよい。
The recess 15 may be a circular hole having a small diameter for one pin, or a plurality of conductive terminals may be arranged on the inner bottom surface of one large diameter recess 15. Moreover, the recess 15 may be a polygon other than a circle. Further, the diameter of the recess 15 does not have to be the same over the entire length in the depth direction, and may be tapered so that it becomes narrower (or wider) toward the inside.

【0017】また、上記実施例では温度補償型の水晶発
振器について説明したが、本発明は他の水晶発振器のパ
ッケージ、或は水晶以外の圧電部品による発振器のパッ
ケージ、または圧電部品によらない発振器のパッケージ
についても適用可能である。また、一般的なICのパッ
ケージであって、組立て後にその特性を調整する必要が
あるもの一般に適用可能である。
Although the temperature-compensated crystal oscillator has been described in the above embodiments, the present invention relates to another crystal oscillator package, an oscillator package using a piezoelectric component other than crystal, or an oscillator not using a piezoelectric component. It is also applicable to packages. Further, it is applicable to general IC packages that require adjustment of their characteristics after assembly.

【0018】[0018]

【発明の効果】以上のように本発明は水晶振動子とIC
とを内部に収納するパッケージの本体下面中央部適所に
凹所を設け、該凹所の内底部に内部メモリ書き換え用の
導通端子を固定したので、工程を増加することなく従来
のLCCパッケージと同様の製造工程により製造するこ
とができ、また内部メモリ書き換え用の導通端子による
設計上の制約を発生させることがない。また、内部メモ
リ書き換え用の導通端子は従来デッドスペースとして顧
みられることがなかったパッケージ本体底面に設けた凹
所の内底面に配置されるので、必要個数の該端子を配置
することができ、また、凹所が治具のガイドとなるの
で、治具による内部メモリの書き換え作業が容易且つ正
確となる。
As described above, the present invention is a crystal unit and an IC.
Since a recess is provided at a proper place in the center of the lower surface of the main body of the package that accommodates and, and the conductive terminal for rewriting the internal memory is fixed to the inner bottom of the recess, it is the same as the conventional LCC package without increasing the number of steps. Can be manufactured by the manufacturing process described above and there is no restriction on the design due to the conductive terminal for rewriting the internal memory. Further, since the conductive terminal for rewriting the internal memory is arranged on the inner bottom surface of the recess provided on the bottom surface of the package body, which has never been considered as a dead space, it is possible to arrange a required number of the terminals. Since the recess serves as a guide for the jig, rewriting work of the internal memory by the jig becomes easy and accurate.

【図面の簡単な説明】[Brief description of drawings]

【図1】(a) 及び(b) は本発明の一実施例の温度補償型
水晶発振器の縦断面図及び底面図。
1A and 1B are a vertical cross-sectional view and a bottom view of a temperature-compensated crystal oscillator according to an embodiment of the present invention.

【図2】図1の水晶発振器の平面図であってキャップを
外した状態を示している。
FIG. 2 is a plan view of the crystal oscillator of FIG. 1, showing a state in which a cap is removed.

【符号の説明】[Explanation of symbols]

1 パッケージ本体、2 グリーンシート状の酸化焼成
セラミックス、3 環状囲繞部、4 プリフォーム、5
キャップ、6 ICチップ、7ボンディングワイヤ、
8 張出し部、9 パッド、10 水晶振動子素片、1
0a 接着剤,11 水晶振動子接続用端子,15 凹
所,16a 入出力端子、16b 導電端子,16c
ダミー端子。
1 package body, 2 green sheet-shaped oxidatively fired ceramics, 3 annular surrounding part, 4 preform, 5
Cap, 6 IC chips, 7 bonding wires,
8 overhang part, 9 pad, 10 crystal unit, 1
0a adhesive, 11 crystal resonator connecting terminal, 15 recess, 16a input / output terminal, 16b conductive terminal, 16c
Dummy terminal.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 半導体素子を内部に収納するパッケージ
に於て、該パッケージの底面の中央部適所に少なくとも
一個の凹所を設け、該凹所の内底部に導通端子を配した
ことを特徴とするパッケージの構造。
1. A package in which a semiconductor element is housed, wherein at least one recess is provided at an appropriate position in the center of the bottom surface of the package, and a conductive terminal is arranged on the inner bottom of the recess. The structure of the package to be used.
【請求項2】 前記パッケージに温度補償型圧電発振器
を収容し、外部より温度補償情報を前記導通端子を介し
て入力するように構成したことを特徴とする請求項1記
載のパッケージの構造。
2. The structure of a package according to claim 1, wherein a temperature compensation type piezoelectric oscillator is housed in the package, and temperature compensation information is inputted from the outside through the conduction terminal.
JP12730395A 1995-04-27 1995-04-27 Package structure of temperature compensated piezoelectric oscillator Expired - Lifetime JP3426053B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12730395A JP3426053B2 (en) 1995-04-27 1995-04-27 Package structure of temperature compensated piezoelectric oscillator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12730395A JP3426053B2 (en) 1995-04-27 1995-04-27 Package structure of temperature compensated piezoelectric oscillator

Publications (2)

Publication Number Publication Date
JPH08307153A true JPH08307153A (en) 1996-11-22
JP3426053B2 JP3426053B2 (en) 2003-07-14

Family

ID=14956623

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12730395A Expired - Lifetime JP3426053B2 (en) 1995-04-27 1995-04-27 Package structure of temperature compensated piezoelectric oscillator

Country Status (1)

Country Link
JP (1) JP3426053B2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005260600A (en) * 2004-03-11 2005-09-22 Nippon Dempa Kogyo Co Ltd Crystal oscillator for surface mounting
JP2009055545A (en) * 2007-08-29 2009-03-12 Citizen Finetech Miyota Co Ltd Piezoelectric device and manufacturing method thereof
JP2009517897A (en) * 2005-11-25 2009-04-30 エプコス アクチエンゲゼルシャフト Components operated by acoustic waves
JP2010016513A (en) * 2008-07-02 2010-01-21 Nippon Dempa Kogyo Co Ltd Oscillator
JP2010124494A (en) * 2010-03-05 2010-06-03 Seiko Epson Corp Piezoelectric oscillator, electronic apparatus and method of manufacturing piezoelectric oscillator
JP2010154565A (en) * 2010-03-24 2010-07-08 Seiko Epson Corp Piezoelectric oscillator, electronic apparatus, and method of manufacturing zoelectric oscillator
JP2010154177A (en) * 2008-12-25 2010-07-08 Nippon Dempa Kogyo Co Ltd Surface mount crystal oscillator
US7791421B2 (en) * 2007-04-26 2010-09-07 Nihon Dempa Kogyo Co., Ltd. Surface-mounted piezoelectric oscillators
US8797760B2 (en) 2011-08-01 2014-08-05 Seiko Epson Corporation Substrate, electronic device, and electronic apparatus

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005260600A (en) * 2004-03-11 2005-09-22 Nippon Dempa Kogyo Co Ltd Crystal oscillator for surface mounting
JP2009517897A (en) * 2005-11-25 2009-04-30 エプコス アクチエンゲゼルシャフト Components operated by acoustic waves
US7791421B2 (en) * 2007-04-26 2010-09-07 Nihon Dempa Kogyo Co., Ltd. Surface-mounted piezoelectric oscillators
JP2009055545A (en) * 2007-08-29 2009-03-12 Citizen Finetech Miyota Co Ltd Piezoelectric device and manufacturing method thereof
JP2010016513A (en) * 2008-07-02 2010-01-21 Nippon Dempa Kogyo Co Ltd Oscillator
JP2010154177A (en) * 2008-12-25 2010-07-08 Nippon Dempa Kogyo Co Ltd Surface mount crystal oscillator
JP2010124494A (en) * 2010-03-05 2010-06-03 Seiko Epson Corp Piezoelectric oscillator, electronic apparatus and method of manufacturing piezoelectric oscillator
JP2010154565A (en) * 2010-03-24 2010-07-08 Seiko Epson Corp Piezoelectric oscillator, electronic apparatus, and method of manufacturing zoelectric oscillator
US8797760B2 (en) 2011-08-01 2014-08-05 Seiko Epson Corporation Substrate, electronic device, and electronic apparatus

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