KR100501193B1 - A crystal oscillator - Google Patents

Abstract

The present invention relates to a crystal oscillator, comprising a crystal oscillator having a crystal piece and an IC chip, the crystal assembly comprising a plurality of ceramic layers stacked to form an internal space in which the crystal piece is embedded; A chip assembly in which a plurality of ceramic layers are stacked to form an internal space in which the IC chip is embedded; and an input / output terminal formed in a terminal recess recessed at each side of the chip assembly and electrically connected to the IC chip. .

According to the present invention, input / output terminals used for inputting and outputting data to and from the IC chip of the chip assembly are distributed and arranged one by one on each side of the assembly, so that data input / output operations by contacting the probe and the terminal portion can be performed more smoothly, and the terminal portion It may be possible to miniaturize the product without reducing the size of the product.

Description

Crystal Oscillator {A CRYSTAL OSCILLATOR}

The present invention relates to a crystal oscillator, and more particularly, the input and output terminals used to input and output data to the IC chip of the chip assembly are distributed one by one on each side of the assembly to perform data input and output operations by contacting the probe and the terminal portion. The present invention relates to a crystal oscillator that performs more smoothly and enables product miniaturization without shrinking the terminal portion.

In general, a crystal oscillator employing crystal as a piezoelectric vibrator (piezoelectric component) changes the resistance value of the thermistor according to the temperature, so that the voltage applied to the varicap diode changes, and the capacitance of the capacitor changes due to the change of the voltage. It is a device that generates a frequency according to the change of temperature.

This crystal oscillator is small and stable frequency can be obtained against external environment change, so it is used for character composition and color composition circuit in computer, communication equipment, etc. Oscillators (TCXOs), thermostatically controlled crystal oscillators (OCXOs), etc. are often used as core components for all signals in space satellites and instruments.

Recently, the development of information communication and digital technology is used in the high frequency domain, and the demand for fast data processing speed and new materials, components, modules, and boards is increasing, especially in the case of mobile communication components, miniaturization and multiplexing. In accordance with the trend of banding and high frequency, miniaturization, high integration and high frequency of crystal oscillator are required.

The crystal oscillator has a mainstream of 0.024CC (5.0mm (L) * 3.2mm (W) * thickness1.5mm (T)), but as the miniaturization of parts is accelerated, its length, width and thickness become short and narrow. Thinner 0.008CC (3.2mm (L) * 2.5mm (W) * 1.0mm (T)) and 0.004CC (2.5mm (L) * 2.0mm (W) * 0.8mm (T)) will dominate . For this purpose, miniaturization of crystal oscillator parts, innovation of manufacturing method, and light and small size should be realized.

1 is an exploded perspective view of a typical crystal oscillator, the conventional crystal oscillator 100, as shown in Figure 1, the crystal assembly 110 and the oscillation circuit, the temperature compensation circuit, the voltage including a crystal to cause the oscillation The chip assembly 120 including the control circuit and the IC chip I in which the memory unit such as EEPROM or RAM is integrated has a dual structure in which a vertical structure is formed.

That is, the crystal piece assembly 110 has a second ceramic layer 112 stacked along an edge of the first ceramic layer 111 and the first ceramic layer 111 on which a circuit pattern (not shown) is formed. It consists of a ceramic substrate 113, a crystal piece (B) disposed therein and a cover 115 for sealing a space in which the crystal piece (B) is disposed, the surface of the crystal piece (B) Electrodes of a constant pattern are formed.

The crystal piece (B) is one end is raised horizontally by a die bonding method through a metal bump (not shown) so that power is supplied from the outside to one side of the upper surface of the first ceramic layer 111, the other end is free It is provided with a stage.

In addition, the chip assembly 120 includes a ceramic substrate including a first ceramic layer 121 having a circuit pattern (not shown) formed on an upper surface thereof, and second and third ceramic layers 122 and 123 stacked along an edge thereof. 124 and an IC chip I bonded and fixed on the first ceramic layer 121.

In addition, the left and right sides of the ceramic substrate 124 are electrically connected to the internal circuit parts of the IC chip I to be input and adjusted by inputting data into the memory, and outputting the adjusted data to the outside. A plurality of terminals 128a to 128d are formed.

The IC chip (I) in which various circuit parts and memory parts are integrated is a step which protrudes in a step shape when stacked vertically while being fixed to the upper surface of the first ceramic layer 121, which is the bottom surface of the ceramic substrate 124. Wire bonding as a wire 126 between a plurality of bonding pads 125 mounted on the protrusion 122a of the ceramic layer 122 and a plurality of pads 126a mounted on the upper surface of the IC chip I. While electrically connecting them to each other, the inner space in which the IC chip (I) is disposed is filled with molding (E).

The assembled crystal assembly 110 and the chip assembly 120 as described above are the chip assembly 120 as a lower part, and the chip assembly 110 as an upper part in another assembly line. The solder pads 127 formed on the upper surface of the ceramic substrate 124 of 120 and the pads 117 formed on the lower surface of the ceramic substrate 113 of the quartz crystal assembly 110 are interposed with each other through solder balls. By integrally bonding, the crystal oscillator 100 having a dual structure consisting of the crystal assembly 110 having the crystal piece B and the chip assembly 120 having the IC chip I was assembled.

On the other hand, the crystal oscillator 100 having such a structure is designed to be miniaturized as the miniaturization of the components to be mounted on the product and the complex modularization between the adjacent parts proceeds to reduce the volume, the ceramic constituting the chip assembly 120 The length, width, and thickness of the substrate 124 are shortened, narrowed, and thinned, and at the same time, a pair of input / output terminals 128a, 128b, and 128c are provided on the left and right outer walls of the chip assembly 120, respectively. The interval D between 128d) is also reduced according to the reduction ratio of the crystal oscillator 100.

However, in accordance with the miniaturization of the crystal oscillator 100, there is a process limitation in reducing the size of the input / output terminals 128a, 128b, 128c, and 128d in which the chip assembly 120 is formed in the via wall on the outer wall.

Then, the data input / output 200 having a pair of probes 201 and 202 is disposed on the left and right sides of the crystal oscillator 100, and the input / output terminals 128a, 128b and 128c of the chip assembly 120 are disposed. In the operation of inputting / outputting data through the 128d), the space D between the adjacent I / O terminals 128a and 128b and the other I / O terminals 128c and 128d is small, The risk of occurrence of a short accident between the probes 201 and 202 becomes very high.

In addition, the interval D1 between the probes 201 and 202 used for inputting and outputting data by contacting the tip portions with the input / output terminals 128a, 128b, 128c, and 128d is also reduced in accordance with the reduced interval between the terminals. In order to reduce the distance D1 between the probes 201 and 202 in accordance with the miniaturization design of the crystal oscillator 100 which is miniaturized due to the rapid trend, the structure of the data input / output 200 is changed or remanufactured. It is difficult to do so, and excessive cost is required when restructuring and remanufacturing.

Accordingly, the present invention has been proposed to solve the conventional problems as described above, and an object thereof is to overcome the limitations of the compact design without the need to reduce the size of the input / output terminals or to restructure or restructure the probe of the data input / output device. To provide a crystal oscillator that can be.

As a technical configuration for achieving the above object, the present invention,

In a crystal oscillator having a crystal piece and an IC chip,

A crystal piece assembly in which a plurality of ceramic layers are laminated to form an internal space in which the crystal piece is embedded;

A chip assembly in which a plurality of ceramic layers are stacked to form an internal space in which the IC chip is embedded;

By providing a crystal oscillator characterized in that it comprises an input and output terminal formed in the terminal recess recessed in each side of the chip assembly and electrically connected to the IC chip.

Preferably, the input and output terminals are formed on each outer wall crossing at right angles with the X and Y axes extending from the center of the chip assembly.

More preferably, the input / output terminals have one-to-one correspondence with a plurality of pads formed on the upper surface of the IC chip.

Hereinafter, the present invention will be described in more detail.

2 is a perspective view of a crystal oscillator according to the present invention, Figure 3 (a) (b) (c) (d) is a plan view, front view, side view and rear view of the crystal oscillator according to the present invention.

As shown in Figs. 2 and 3, the crystal oscillator 1 of the present invention inputs data into a storage unit of the IC chip I assembled with the crystal piece and adjusts data from the storage unit of the IC chip I. By distributing the input and output terminals used to output the external to each outer wall of the chip assembly 20 can be designed to be compact without reducing the size of the terminal portion, the crystal oscillator (1) is a crystal assembly (10), The chip assembly 20, the input and output terminals 30a ~ 30d.

In addition, it is to be understood that the structure of the crystal oscillator 1 constituted by the present invention is selectively applicable to a voltage controlled crystal oscillator (VCXO), a temperature compensated crystal oscillator (TCXO), a constant temperature controlled crystal oscillator (OCXO), and the like.

That is, the crystal piece assembly 10 is composed of a ceramic substrate 13 having a concave internal space of a predetermined size and a cover 14 covering the upper portion thereof so that the rectangular crystal piece B is mounted in the internal space.

The ceramic substrate 13 is composed of a first ceramic layer 11 having a circuit pattern printed on the upper surface thereof, and a second ceramic layer 12 having a rectangular frame shape which is stacked up and down along its outer edge to form a concave inner space. The cover 14 is bonded to the upper surface of the ceramic substrate 13 by soldering so as to completely block the internal space in which the crystal piece B is accommodated.

In addition, the chip assembly 20 is composed of a ceramic substrate 24 having a concave inner space of a predetermined size so that the IC chip I in which various circuit parts and memory parts are integrated is mounted, and the ceramic substrate 24 has an upper portion. A first ceramic layer 21 printed with a circuit pattern on its surface and at least one second ceramic layer 22, 23 having a rectangular frame shape which is stacked up and down along its outer edge to form a concave inner space.

The second ceramic layer 22 is formed with a protrusion 22a extending into an inner space, and the protrusion 22a has a plurality of bonding pads 25 formed thereon, and a corresponding upper surface of the IC chip I. As the plurality of terminal pads 26a are formed therein, the bonding pads 25 and the terminal pads 26 are wire-bonded as wires 27 so as to be electrically connected to each other.

Here, a plurality of external terminals 29a and 29b used as voltage control terminals, ground terminals, output terminals, and power terminals on the bottom edge of the chip assembly 20 mounted on the upper surface of the main board (not shown). 29c and 29d are formed, and they are electrically connected to each terminal pad 26a so as to supply power to the IC chip I side and output a compensated frequency.

In addition, the input / output terminals 30a, 30b, 30c, and 30d have a conductive thickness for each terminal groove on the arc-shaped cross section recessed in the outer wall surface of the ceramic substrate 24 constituting the chip assembly 20. It is a terminal part apply | coated as a member.

Each of the input / output terminals 30a, 30b, 30c, and 30d is a ceramic substrate that intersects at right angles to the X-axis X and the Y-axis Y extending from the center O of the crystal oscillator 1 ( 24 is formed on the outer wall surface. Accordingly, the input and output terminals 30a, 30b, 30c and 30d are independently provided for each side of the rectangular ceramic substrate 23 having the long side and the short side.

In addition, the input / output terminals 30a, 30b, 30c, and 30d formed at the center of the length of each outer wall of the chip assembly 20 are preferably provided with the same width.

Here, the input and output terminals 30a, 30b, 30c and 30d are not electrically connected to the external terminals 29a, 29b, 29c and 29d formed on the lower surface of the chip assembly 20. Data input / output terminals (DIO), chip select terminals (CS), utility terminals (UTIL), and clock signals (SCLK) are electrically connected one-to-one with pads.

The crystal oscillator 1 having the above-described configuration has the IC chip I mounted on the ceramic substrate 24 of the chip assembly 20 exposed to the upper side of the crystal oscillator 1. The upper and lower parts of the ceramic substrate 13 are stacked on top of each other, and the stacked crystal piece assembly 10 and the chip assembly 20 are solder pads and chips formed on the first ceramic layer 11 of the crystal piece assembly 10. It is integrally bonded by solder balls arranged between the solder pads 27 formed on the uppermost second ceramic layer 23 of the assembly 20.

In this case, the input / output terminals 30a, 30b, 30c and 30d provided on the outer wall of each side of the chip assembly 20 are electrically connected to the external terminals 29a, 29b, 29c and 29d. On the other hand, it has a circuit configuration that is connected to the terminal pads 26a provided on the upper surface of the IC chip I so as to be electrically connected to the memory of the IC chip I.

Therefore, the operation of inputting and adjusting data in the storage unit of the IC chip I, and outputting the adjusted data externally include disposing the data input / output 40 at each side of the chip assembly 20, The probe 41 of the data input / output 40 is one-to-one corresponded to the input / output terminals 30a, 30b, 30c, 30d formed on each outer wall of the chip assembly 20.

Subsequently, the data input / output 40 is moved forward toward the chip assembly 20 so that the tip portion of the probe 41 and the corresponding input / output terminals 30a, 30b, 30c, and 30d are brought into contact with each other. In the state, pre-adjusted data is input into the IC chip I through the input / output terminals 30a, 30b, 30c and 30d, and the adjusted data is input / output terminals 30a and 30b ( It is output to the outside through 30c) (30d) can be monitored by the operator.

According to the present invention having the above-described configuration, miniaturization is achieved by inputting data suited to characteristics into a storage unit provided in the IC chip, and having one input / output terminal used for outputting data to each outer wall of the chip assembly. Since there is no need to restructure or restructure the probe of the data I / O according to the design, it is possible to design the product compactly without reducing the input / output terminals, and to perform the data input / output operation safely and smoothly without fear of short accident. The effect to be obtained is obtained.

While the invention has been shown and described with respect to specific embodiments thereof, it will be apparent to those skilled in the art that various changes and modifications can be made without departing from the spirit or scope of the invention as set forth in the claims below. I would like to clarify that knowledge is easy to know.

1 is a perspective view of a general crystal oscillator.

2 is a perspective view of a crystal oscillator according to the present invention.

3 (a) (b) (c) (d) are a plan view, a front view, a side view and a back view of a crystal oscillator according to the present invention.

      Explanation of symbols on main parts of drawing

10 ... crystal assembly 11,12 ... 1st and 2nd ceramic layer

13,24 ...... Ceramic substrate 14 ...... Cover

20 ...... Chip assembly 21,22,23 ... 1st, 2nd ceramic layer

30a, 30b, 30c, 30d ... I / O terminal 40 ...... Data I / O

B ....... Edition I ....... IC Chip

Claims (3)

In a crystal oscillator having a crystal piece and an IC chip, A crystal piece assembly in which a plurality of ceramic layers are laminated to form an internal space in which the crystal piece is embedded; A chip assembly in which a plurality of ceramic layers are stacked to form an internal space in which the IC chip is embedded; And an input / output terminal formed in the terminal recess recessed at each side of the chip assembly and electrically connected to the IC chip. And the input / output terminals are formed one for each outer wall crossing at right angles to the X and Y axes extending from the center of the chip assembly. delete The method of claim 1, And the I / O terminal is connected one-to-one with a plurality of pads formed on the upper surface of the IC chip.