JPH077163A - Diode - Google Patents
DiodeInfo
- Publication number
- JPH077163A JPH077163A JP5172662A JP17266293A JPH077163A JP H077163 A JPH077163 A JP H077163A JP 5172662 A JP5172662 A JP 5172662A JP 17266293 A JP17266293 A JP 17266293A JP H077163 A JPH077163 A JP H077163A
- Authority
- JP
- Japan
- Prior art keywords
- diode element
- lead terminal
- surface side
- diode
- brazing material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、ダイオード素子を左右
一対のリード端子で狭持してなるダイオードに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a diode in which a diode element is sandwiched between a pair of left and right lead terminals.
【０００２】[0002]
【従来の技術】従来より、この種のダイオードは、例え
ば図２に示すように、ダイオード素子１１の両極と、該
両極と導通する長さの異なる左右一対のリード端子１
２，１３とが、該リード端子１２，１３でダイオード素
子を上下方向に狭持するように接ロウ材１４，１５によ
り接続され、これをモールド樹脂１６で封止するという
構成をしている。2. Description of the Related Art Conventionally, as shown in FIG. 2, for example, a diode of this kind has a diode element 11 and a pair of left and right lead terminals 1 having different conducting lengths.
The lead terminals 12 and 13 are connected to each other by brazing filler metals 14 and 15 so as to sandwich the diode element in the vertical direction, and the lead terminals 12 and 13 are sealed with a mold resin 16.
【０００３】上記ダイオード素子１１の両極とリード端
子１２，１３との接続は、先ず溶融状態の半田等のロウ
材１４を下側のリード端子１３の内方部１３ａに付着さ
せ、このロウ材１４上にダイオード素子１１を載置して
ロウ材１４を固化して接続し、次に上記ロウ材１４と同
一のロウ材１５を上側となるリード端子１２の内方部１
２ａに付着させ、これを上記のようにして下側のリード
端子１３に接続したダイオード素子１１の上面側に重ね
合わせて接続することにより行われる。To connect the both terminals of the diode element 11 to the lead terminals 12 and 13, first, a brazing material 14 such as a molten solder is attached to the inner portion 13a of the lower lead terminal 13, and the brazing material 14 is attached. The diode element 11 is placed on the upper part of the brazing material 14, and the brazing material 14 is solidified and connected. Then, the same brazing material 15 as the brazing material 14 is placed on the inner side portion 1 of the lead terminal 12 on the upper side.
It is performed by adhering it to 2a and superposing it on the upper surface side of the diode element 11 connected to the lower lead terminal 13 as described above.
【０００４】一般に、上記ダイオードに用いられるダイ
オード素子１１は、メサ型及びプレーナ型にタイプ別さ
れる。上記メサ型タイプは、例えば図３に示すように、
一方導電型（ｎ型）の半導体基板２１の表面側にこれと
逆の導電型（ｐ型）の領域２２が形成され、上記表面側
の肩部には傾斜面が形成され、該傾斜面にガラス等の絶
縁膜２３が形成されｐｎ接合面が保護され、上記半導体
基板２１の表面と裏面には電極膜２４ａ，２４ｂが形成
さるという構造を有する。また、プレーナ型タイプは、
例えば図４に示すように、一方導電型（ｎ型）の半導体
基板２５の表面側にこれと逆の導電型（ｐ型）の領域２
６が形成され、上記半導体基板２５の表面にはｐｎ接合
面の絶縁を保護する酸化シリコン等の絶縁膜２７とｐ型
領域２６と導通する電極膜２８ａが形成され、半導体基
板の裏面には電極膜２８ｂが形成されるという構造を有
する。Generally, the diode element 11 used in the above-mentioned diode is classified into a mesa type and a planar type. The mesa type is, for example, as shown in FIG.
On the other hand, a conductive type (n-type) semiconductor substrate 21 is provided with an opposite conductive type (p-type) region 22 on the front surface side, and an inclined surface is formed on the front surface side shoulder portion. An insulating film 23 such as glass is formed to protect the pn junction surface, and electrode films 24a and 24b are formed on the front and back surfaces of the semiconductor substrate 21, respectively. In addition, the planar type is
For example, as shown in FIG. 4, a region 2 of the opposite conductivity type (p type) is formed on the surface side of the semiconductor substrate 25 of one conductivity type (n type).
6 is formed, an insulating film 27 made of silicon oxide or the like for protecting the insulation of the pn junction surface and an electrode film 28a electrically connected to the p-type region 26 are formed on the front surface of the semiconductor substrate 25, and an electrode is formed on the back surface of the semiconductor substrate. It has a structure in which the film 28b is formed.
【０００５】尚、本明細書において、上記半導体基板２
１，２５における逆の導電型の領域２２，２６の形成さ
れた面をダイオード素子の表面側という。In the present specification, the semiconductor substrate 2 is used.
The surface on which the regions 22 and 26 of opposite conductivity type in 1 and 25 are formed is called the front surface side of the diode element.
【０００６】[0006]
【発明が解決しようとする課題】上記のようなダイオー
ド素子において、その表面側、即ち上記半導体基板の表
面側は、裏面側に比して不純物の拡散、絶縁膜の形成等
の熱処理工程等が多くなされ、しかも複雑な構造を有す
るために、裏面側より熱的強度及び機械的強度が低いも
のであり、素子破壊又は素子不良が生じるとすれば主に
表面側の問題であった。In the diode element as described above, the front surface side thereof, that is, the front surface side of the semiconductor substrate is subjected to heat treatment steps such as diffusion of impurities and formation of an insulating film as compared with the back surface side. Since it has been made many and has a complicated structure, it has lower thermal strength and mechanical strength than the back surface side, and if element destruction or element failure occurs, it is mainly a problem on the front surface side.
【０００７】このようなことがあって、従来より、ダイ
オード素子とリード端子の接続工程、該接続工程以後の
搬送工程等の製造時にリード端子によりダイオード素子
に及ぼされる機械的応力を緩和しようと、リード端子の
適宜箇所に屈曲部を設けるなどして対処されていた。In view of the above, conventionally, in order to reduce the mechanical stress exerted on the diode element by the lead terminal during the manufacturing process such as the step of connecting the diode element and the lead terminal and the carrying step after the step of connecting, This has been dealt with by providing a bent portion at an appropriate position of the lead terminal.
【０００８】しかしながら、従来は、上記のように機械
的応力に対してのみ対処されるだけで、熱的応力、即ち
熱によりダイオード素子が伸縮したときに該ダイオード
素子に加わるストレスについては全く対処乃至考慮され
ていなかった。However, conventionally, only the mechanical stress is dealt with as described above, and the thermal stress, that is, the stress applied to the diode element when the diode element expands and contracts due to heat is completely dealt with. Was not considered.
【０００９】即ち、ダイオードを半田等によりプリント
基板等に実装する際に溶融半田からリード端子を伝わっ
てダイオード素子に及ぼされる熱、ダイオード素子をリ
ード端子に接続する際に溶融状態のロウ材がダイオード
素子に及ぼす熱等の熱的応力によっても素子破壊又は素
子不良が当然生じるのである。That is, when a diode is mounted on a printed circuit board or the like with solder or the like, the heat transmitted from the molten solder to the diode element through the lead terminal, and the brazing material in the molten state when the diode element is connected to the lead terminal is the diode. Element breakdown or element failure naturally occurs due to thermal stress such as heat exerted on the element.
【００１０】本発明は、上記課題を解消し、熱的応力に
よる素子破壊又は素子不良の生じないダイオードを提供
することを目的とする。SUMMARY OF THE INVENTION It is an object of the present invention to solve the above problems and to provide a diode in which element destruction or element failure due to thermal stress does not occur.
【００１１】[0011]
【課題を解決するための手段】本発明者は、ダイオード
素子をリード端子で挟み込んだ構造のダイオードにおい
て、上記のような熱的応力による素子破壊又は素子不良
の問題に鑑み鋭意研究を重ねた結果、上記タイプのダイ
オードは該ダイオードの底面からダイオード素子までの
リード端子の長さが左右リード端子で異なることに着目
し、長い方のリード端子をダイオード素子の表面側に接
続し、短い方のリード端子をダイオード素子の裏面側に
接続したときは、ダイオード素子表面側の方が裏面側に
比して実装時に溶融半田からリード端子を通って伝わる
熱量が小さく、熱量が小さい分ダイオード素子表面側の
リード端子接続に用いるロウ材を低融点なものとし得、
ダイオード素子に与える熱的応力を低減できることを見
出した。DISCLOSURE OF THE INVENTION As a result of intensive studies, the present inventor has conducted extensive studies in view of the problem of element destruction or element failure due to thermal stress as described above in a diode having a structure in which a diode element is sandwiched by lead terminals. In the above type of diode, paying attention to the fact that the length of the lead terminal from the bottom surface of the diode to the diode element is different between the left and right lead terminals, connect the longer lead terminal to the surface side of the diode element, and connect the shorter lead terminal. When the terminals are connected to the back side of the diode element, the amount of heat transferred from the molten solder through the lead terminals during mounting is smaller on the front side of the diode element than on the back side. The brazing material used for connecting the lead terminals may have a low melting point,
It has been found that the thermal stress applied to the diode element can be reduced.
【００１２】即ち、本発明は、一方導電型の基板の表面
に他方導電型領域を形成してなるダイオード素子の表面
側と裏面側の各々を、左右一対のリード端子で上記ダイ
オード素子を狭持するようにロウ材により各リード端子
に接続し、モールド樹脂で封止してなるダイオードにお
いて、上記ダイオード素子の表面側に接続されるリード
端子が裏面側に接続されるリード端子よりも長く、且つ
ダイオード素子の表面側と該表面側に接続されるリード
端子との接続に用いられる上記ロウ材が、裏面側と該裏
面側に接続されるリード端子との接続に用いられる上記
ロウ材よりも低い融点を有するものであることを特徴と
するダイオードに係るものである。That is, according to the present invention, a pair of left and right lead terminals sandwich the diode element on each of the front surface side and the back surface side of a diode element in which the other conductivity type region is formed on the surface of one conductivity type substrate. In a diode which is connected to each lead terminal by a brazing material and is sealed with a mold resin as described above, the lead terminal connected to the front surface side of the diode element is longer than the lead terminal connected to the back surface side, and The brazing material used for connecting the front surface side of the diode element and the lead terminal connected to the front surface side is lower than the brazing material used for connecting the back surface side and the lead terminal connected to the back surface side. The present invention relates to a diode having a melting point.
【００１３】[0013]
【作用】ダイオードにおける一対のリード端子を、実装
時の実装用半田の付着面からダイオード素子の接続面ま
でのリード端子の距離が、ダイオード素子の裏面側に接
続されるものに比してダイオード素子の表面側に接続さ
れるものの方が長くなるように接続しているので、実装
時に実装用の溶融半田からリード端子を媒体としてダイ
オード素子に伝わる熱量は、ダイオード素子の表面側と
裏面側とでは表面側の方が当然のことながら小さくな
る。この伝わる熱量が小さくなる分、ダイオード素子の
表面側におけるリード端子接続に用いるロウ材の融点を
裏面側に用いるものに比して、実装時の上記溶融半田か
らダイオード素子の表面側に伝わる熱量で溶融しない程
度までの範囲で低いものとし得るのである。The distance between the lead terminals of the pair of lead terminals in the diode from the surface where the mounting solder is attached to the connecting surface of the diode element is larger than that when the lead terminals are connected to the back surface side of the diode element. Since the one connected to the front side of the is longer, the amount of heat transferred from the molten solder for mounting to the diode element through the lead terminal as a medium during mounting is different between the front side and the back side of the diode element. The surface side is naturally smaller. As the amount of heat transferred is smaller, the amount of heat transferred from the molten solder to the front side of the diode element during mounting is higher than that of the brazing material used for connecting the lead terminals on the front side of the diode element to the back side. It can be as low as possible within the range where it does not melt.
【００１４】従って、ダイオード素子の表面側とリード
端子との接続時に該表面側にかかる熱量は可能な範囲で
低減されることになり、ダイオード素子の裏面側よりも
強度的に弱い表面側に及ぼされる熱的応力を最小限にま
で緩和できるのである。Therefore, the amount of heat applied to the front surface side of the diode element and the lead terminal at the time of connection is reduced as much as possible, and reaches the front surface side which is weaker in strength than the back surface side of the diode element. The thermal stress generated can be relaxed to the minimum.
【００１５】[0015]
【実施例】以下、実施例を示し、本発明の特徴とすると
ころをより詳細に説明する。EXAMPLES Examples will be shown below to describe the features of the present invention in more detail.
【００１６】図１に示すように、本実施例において、ダ
イオードは、メサ型又はプレーナ型のダイオード素子１
を第１のリード端子２及び第２のリード端子３で挟み込
むように、ダイオード素子１の表面側１ａと裏面側１ｂ
とにそれぞれ第１のリード端子２と第２のリード端子３
とを半田等の第１及び第２のロウ材４，５により接続
し、この状態でモールド樹脂６でパッケージした形態に
なっている。As shown in FIG. 1, in this embodiment, the diode is a mesa-type or planar-type diode element 1.
So as to be sandwiched between the first lead terminal 2 and the second lead terminal 3, the front surface side 1a and the back surface side 1b of the diode element 1.
And a first lead terminal 2 and a second lead terminal 3, respectively.
Are connected by first and second brazing materials 4 and 5 such as solder, and in this state, they are packaged with the mold resin 6.
【００１７】上記ダイオードにおいて、ダイオード素子
１の表面側１ａに接続される第１のリード端子２は、裏
面側１ｂに接続される第２のリード端子３よりも、実装
用半田７によりプリント基板８等に実装されたときに上
記実装用半田７の境界部からダイオード素子１の接続部
までの距離が長さｘ分長くなっている。このリード端子
長さの長い分、ダイオード素子１の表面側１ａに伝わる
熱量は、裏面側１ｂに伝わる熱量よりも少なくなること
となる。In the above diode, the first lead terminal 2 connected to the front surface side 1a of the diode element 1 is mounted on the printed circuit board 8 by the mounting solder 7 more than the second lead terminal 3 connected to the back surface side 1b. The distance from the boundary portion of the mounting solder 7 to the connection portion of the diode element 1 is increased by the length x when mounted on the same. The amount of heat transferred to the front surface side 1a of the diode element 1 is smaller than the amount of heat transferred to the back surface side 1b by the length of the lead terminal.
【００１８】よって、上記伝わる熱量が少ない分、ダイ
オード素子１の表面側１ａと第１のリード端子２とを接
続するのに用いられる上記第１のロウ材４は、裏面側１
ｂと第２のリード端子３との接続に用いられる第２のロ
ウ材５よりも低い融点のものとし得るのである。例えば
第２のロウ材５の融点を２９５℃とするのであれば第１
のロウ材４の融点は２８５℃とされる。ただし、当然の
ことながら上記第１及び第２のロウ材４，５の融点は、
実装時に溶融しない程度以上のものとされる。Therefore, the first brazing material 4 used for connecting the front surface side 1a of the diode element 1 and the first lead terminal 2 is the back surface side 1 because the amount of heat transferred is small.
The melting point may be lower than that of the second brazing material 5 used for connecting the b and the second lead terminal 3. For example, if the melting point of the second brazing material 5 is 295 ° C., the first
The melting point of the brazing material 4 is 285 ° C. However, as a matter of course, the melting points of the first and second brazing materials 4 and 5 are
It is more than a level that does not melt during mounting.
【００１９】[0019]
【発明の効果】本発明によれば、ダイオード素子の表面
側に及ぼす熱的応力を裏面側よりも低減できるので、熱
による素子破壊又は素子不良を最小限に低減できるので
ある。According to the present invention, since the thermal stress exerted on the front surface side of the diode element can be reduced more than that on the rear surface side, element destruction or element failure due to heat can be minimized.
【図１】ダイオードを実装基板に実装した状態を示す断
面図である。FIG. 1 is a cross-sectional view showing a state where a diode is mounted on a mounting board.
【図２】ダイオードの構造を示す断面図である。FIG. 2 is a sectional view showing a structure of a diode.
【図３】メサ型ダイオード素子を示す断面図である。FIG. 3 is a cross-sectional view showing a mesa type diode element.
【図４】プレーナ型ダイオード素子を示す断面図であ
る。FIG. 4 is a cross-sectional view showing a planar diode element.
１ ダイオード素子 ２ 第１のリード端子 ３ 第２のリード端子 ４ 第１のロウ材 ５ 第２のロウ材 1 Diode Element 2 1st Lead Terminal 3 2nd Lead Terminal 4 1st Brazing Material 5 2nd Brazing Material
Claims (1)
域を形成してなるダイオード素子の表面側と裏面側の各
々を、左右一対のリード端子で上記ダイオード素子を狭
持するようにロウ材により各リード端子に接続し、モー
ルド樹脂で封止してなるダイオードにおいて、上記ダイ
オード素子の表面側に接続されるリード端子が裏面側に
接続されるリード端子よりも長く、且つダイオード素子
の表面側と該表面側に接続されるリード端子との接続に
用いられる上記ロウ材が、裏面側と該裏面側に接続され
るリード端子との接続に用いられる上記ロウ材よりも低
い融点を有するものであることを特徴とするダイオー
ド。1. A diode element formed by forming a region of the other conductivity type on the surface of a substrate of one conductivity type, and soldering the diode element with a pair of left and right lead terminals so as to sandwich the diode element. In a diode which is connected to each lead terminal by a material and sealed with a mold resin, the lead terminal connected to the front surface side of the diode element is longer than the lead terminal connected to the back surface side, and the surface of the diode element is The brazing material used for connecting the lead side connected to the front side and the front side has a lower melting point than the brazing material used for connecting the back side and the lead terminal connected to the back side. A diode characterized in that
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17266293A JP3539990B2 (en) | 1993-06-18 | 1993-06-18 | diode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17266293A JP3539990B2 (en) | 1993-06-18 | 1993-06-18 | diode |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH077163A true JPH077163A (en) | 1995-01-10 |
| JP3539990B2 JP3539990B2 (en) | 2004-07-07 |
Family
ID=15946053
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17266293A Expired - Fee Related JP3539990B2 (en) | 1993-06-18 | 1993-06-18 | diode |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3539990B2 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006173437A (en) * | 2004-12-17 | 2006-06-29 | Toshiba Corp | Semiconductor device |
| CN100373566C (en) * | 2006-03-22 | 2008-03-05 | 常州久和电子有限公司 | Method for processing patch diode |
| CN105702591A (en) * | 2016-02-23 | 2016-06-22 | 王亚萍 | Side connection diode |
| JPWO2014050422A1 (en) * | 2012-09-27 | 2016-08-22 | ローム株式会社 | Chip diode and manufacturing method thereof |
-
1993
- 1993-06-18 JP JP17266293A patent/JP3539990B2/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006173437A (en) * | 2004-12-17 | 2006-06-29 | Toshiba Corp | Semiconductor device |
| CN100373566C (en) * | 2006-03-22 | 2008-03-05 | 常州久和电子有限公司 | Method for processing patch diode |
| JPWO2014050422A1 (en) * | 2012-09-27 | 2016-08-22 | ローム株式会社 | Chip diode and manufacturing method thereof |
| JP2018082182A (en) * | 2012-09-27 | 2018-05-24 | ローム株式会社 | Chip diode and manufacturing method therefor |
| US10903373B2 (en) | 2012-09-27 | 2021-01-26 | Rohm Co., Ltd. | Chip diode and method for manufacturing same |
| CN105702591A (en) * | 2016-02-23 | 2016-06-22 | 王亚萍 | Side connection diode |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3539990B2 (en) | 2004-07-07 |
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