JPH0770807B2 - Exposure method for printed wiring boards - Google Patents

Exposure method for printed wiring boards

Info

Publication number
JPH0770807B2
JPH0770807B2 JP1246988A JP24698889A JPH0770807B2 JP H0770807 B2 JPH0770807 B2 JP H0770807B2 JP 1246988 A JP1246988 A JP 1246988A JP 24698889 A JP24698889 A JP 24698889A JP H0770807 B2 JPH0770807 B2 JP H0770807B2
Authority
JP
Japan
Prior art keywords
exposure
printed wiring
resist
film
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1246988A
Other languages
Japanese (ja)
Other versions
JPH03108790A (en
Inventor
良範 浦口
昭治 栗栖
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP1246988A priority Critical patent/JPH0770807B2/en
Publication of JPH03108790A publication Critical patent/JPH03108790A/en
Publication of JPH0770807B2 publication Critical patent/JPH0770807B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Description

【発明の詳細な説明】 (産業上の利用分野) この発明は、プリント配線板の露光方法に関するもので
ある。さらに詳しくは、この発明は、露光後の現像処理
を安定化し、高精度な回路パターン形成と生産性の向上
が可能な改善されたプリント配線板の露光方法に関する
ものである。
The present invention relates to a method for exposing a printed wiring board. More specifically, the present invention relates to an improved method for exposing a printed wiring board, which can stabilize a development process after exposure, form a highly accurate circuit pattern, and improve productivity.

(従来の技術) 多層板成形に供する内層コア材、両面板、多層板等のプ
リント配線板用の積層板については、銅箔等の最外層金
属箔の表面にフォトレジストを配設し、これを露光およ
び現像し、エッチングによって回路パターン形成するこ
とが行われてきている。
(Prior Art) For laminated boards for printed wiring boards such as inner layer core materials, double-sided boards, and multilayer boards used for multilayer board molding, a photoresist is provided on the surface of the outermost metal foil such as copper foil. Is exposed and developed, and a circuit pattern is formed by etching.

このようなプリント配線板の製造工程のうちの露光作業
については、従来、たとえば第3図に示したような露光
用積層板(ア)の表面金属箔をドライフィルム等のフォ
トレジスト(イ)によってラミネートしたものを、第4
図に示したように上下2枚のフィルムを貼り合せ部
(ウ)において貼り合せた露光パターンフィルム(エ)
の間に挿入し、光を照射して露光することが一般的に行
われてきている。この時、露光パターンフィルム(エ)
によって、露光用積層板(ア)の回路パターン部(A)
には回路形成のための露光が行われる。また、この時、
その周囲4辺部(B)には、露光部が硬化する仕様のネ
ガフィルムの場合、光があたってレジストが硬化し、こ
の硬化部の存在によりエッチング後に金属箔が残るよう
に、フィルム白の機能を持たせている。
Regarding the exposure operation in the manufacturing process of such a printed wiring board, conventionally, for example, the surface metal foil of the exposure laminate (a) as shown in FIG. 3 is formed by a photoresist (a) such as a dry film. The laminated one is the fourth
As shown in the figure, an exposure pattern film (d) in which two upper and lower films are bonded at the bonding part (c)
It is generally practiced to insert it between the two and irradiate it with light to expose it. At this time, the exposure pattern film (d)
By the circuit pattern part (A) of the exposure laminated plate (a)
Is exposed to form a circuit. Also at this time,
In the case of a negative film having a specification that the exposed part is hardened on the four sides (B) around it, the resist is hardened by light, and the presence of the hardened part leaves the metal foil after etching so that the film white. It has a function.

(発明が解決しようとする課題) しかしながら、このような従来の露光方法においては、
たとえば第5図に示したように露光用積層板(ア)より
フォトレジスト(イ)膜、あるいはフィルムがはみ出し
た状態(イ′)等の場合には、後工程の現像、エッチン
グ処理時に硬化したレジストが欠落するという問題があ
り、高精度に回路パターンを形成することが困難になる
という欠点があった。硬化したレジストの欠落は、現
像、エッチング時のレジストパターンのズレ、その付着
等によってエッチング回路の残銅やショート等の不具
合、トラブルを発生させていた。
(Problems to be Solved by the Invention) However, in such a conventional exposure method,
For example, as shown in FIG. 5, in the case where the photoresist (a) film or the film is protruding (a ') from the exposure laminated plate (a), it is cured during the development and etching treatments in the subsequent process. There is a problem that the resist is missing, which makes it difficult to form a circuit pattern with high accuracy. The lack of the hardened resist causes defects and troubles such as residual copper and short circuit in the etching circuit due to deviation of the resist pattern during development and etching, and adhesion thereof.

この発明は、以上の通りの事情に鑑みてなされたもので
あり、従来の露光方法の欠点を解消し、硬化ドライフィ
ルム等のレジスト硬化部の欠落を防止し、後工程の現像
処理を安定化させ、高精度な回路パターン形成を可能と
する。プリント配線板の改良された露光方法を提供する
ことを目的としている。
The present invention has been made in view of the circumstances as described above, eliminates the drawbacks of the conventional exposure method, prevents the resist cured portion of the cured dry film or the like from missing, and stabilizes the development process in the post process. Therefore, it is possible to form a highly accurate circuit pattern. An object is to provide an improved method of exposing a printed wiring board.

(課題を解決するための手段) この発明は、上記の課題を解決するものとして、表面レ
ジスト処理したプリント配線板用積層板の露光に際し、
このレジスト処理積層板の周囲の4辺縁部をパターンフ
ィルムの非露光領域によって3〜5mm内側にかかるよう
に覆うことを特徴とするプリント配線板の露光方法を提
供する。
(Means for Solving the Problems) As a solution to the above problems, the present invention provides a method for exposing a laminate for a printed wiring board, the surface of which is treated with resist,
There is provided a method for exposing a printed wiring board, characterized in that four peripheral edges of the resist-treated laminated board are covered with non-exposed areas of the pattern film so as to cover the inside by 3 to 5 mm.

(作 用) この発明においては、レジスト処理積層板の周囲4辺縁
部を露光ターンフィルムの非露光領域によって覆うた
め、露光用積層板端縁のドライフィルム等のレジストは
硬化することなく、後工程の現像処理において全て溶解
除去することができる。
(Operation) In the present invention, since the four peripheral edges of the resist-treated laminated plate are covered with the non-exposed regions of the exposure turn film, the resist such as the dry film at the edge of the exposed laminated plate is not cured and All can be dissolved and removed in the development processing of the process.

このため、従来方法のような硬化レジストの欠落にとも
なう支障は解消される。
Therefore, the problems associated with the lack of the hardened resist as in the conventional method are eliminated.

以下、実施例を示し、この発明の露光方法についてさら
に詳しく説明する。
Hereinafter, the exposure method of the present invention will be described in more detail with reference to examples.

(実施例) 添付した図面の第1図はこの発明の一実施例を示した平
面図および部分拡大断面図である。
(Embodiment) FIG. 1 of the accompanying drawings is a plan view and a partially enlarged sectional view showing an embodiment of the present invention.

この第1図に示したように、フォトレジスト処理した露
光用積層板(1)は、上下の露光用パターンフィルム
(2)の間に挿入して露光する。この時の露光用積層板
(1)は、多層板成形に供する内層コア材、両面板、多
層板等の最外層に銅箔等の回路形成用の金属箔を配設し
たプリント配線板用積層板からなり、最外層の銅箔等の
表面にはドライフィルムラミネート等によってフォトレ
ジスト(3)を配設してもいる。
As shown in FIG. 1, the exposure laminated plate (1) subjected to the photoresist treatment is inserted between the upper and lower exposure pattern films (2) and exposed. The laminate for exposure (1) at this time is a laminate for a printed wiring board in which a metal foil for forming a circuit such as a copper foil is provided on the outermost layer of an inner core material used for forming a multilayer board, a double-sided board, a multilayer board, etc. A photoresist (3) is provided on the surface of the outermost copper foil or the like by a dry film laminate or the like.

また露光用ターンフィルム(2)は、従来と同様にその
貼り合せ部において貼り合わされてもいる。またさら
に、この発明の露光方法においては、第1図に示したよ
うに、露光用積層板(1)の周囲の4辺縁部(4)を露
光用パターンフィルム(2)の非露光領域(a1)(a2)(a3)
(a4)によって覆ってもいる。つまり、露光部が硬化する
仕様のネガフィルムの場合には、この非露光領域(a1)(a
2)(a3)(a4)は、硬化することのないように遮光するフィ
ルム黒の領域となる。
Further, the exposure turn film (2) may be attached at its attaching portion as in the conventional case. Further, in the exposure method of the present invention, as shown in FIG. 1, the four edge portions (4) around the exposure laminated plate (1) are formed in the non-exposed area (4) of the exposure pattern film (2). a 1 ) (a 2 ) (a 3 )
Also covered by (a 4 ). That is, in the case of a negative film with a specification that the exposed area is cured, this non-exposed area (a 1 ) (a
2 ) (a 3 ) and (a 4 ) are black areas of the film which are shielded from light so as not to cure.

この関係をさらに説明したものが第2図である。FIG. 2 further illustrates this relationship.

露光用積層板(1)の周囲の4辺縁部(4)は露光用パ
ターンフィルム(2)の非露光領域(a1)(a2)(a3)(a4)に
よって覆うが、この時の4辺縁部(4)の覆い()の
大きさは回路パターンやレジスト特性を考慮して3〜5m
m内側にかかるようにする。
The four edge portions (4) around the exposure laminated plate (1) are covered with the non-exposed areas (a 1 ) (a 2 ) (a 3 ) (a 4 ) of the exposure pattern film (2). The size of the cover () of the four side edges (4) at that time is 3 to 5 m in consideration of the circuit pattern and resist characteristics.
m Try to get inside.

露光用パターンフィルム(2)のこの非露光領域(a1)(a
2)(a3)(a4)は、上記したネガフィルムタイプの場合に
は、光を遮断する領域として適宜に形成することができ
る。
This non-exposed area (a 1 ) (a of the pattern film for exposure (2)
2) (a 3) (a 4) , when the negative film type described above can be appropriately formed as a region for blocking light.

たとえば以上の通りの方法によって、非露光領域(a1)(a
2)(a3)(a4)によって覆われた露光用積層板(1)の周囲
の4辺縁部(4)では、大きさ()、すなわち3〜5m
mだけ内側までのレジストは硬化することがない。この
ため、後工程の現像処理においてレジストを全て溶解除
去することができる。このため、従来方法のような硬化
レジストの欠点等による後工程の不具合、トラブルもな
い。
For example, using the above method, the unexposed area (a 1 ) (a
2 ) (a 3 ) (a 4 ) is covered with the exposure laminated plate (1) at the four edges (4) around the size (), that is, 3 to 5 m.
The resist up to the inside by m is not cured. Therefore, the resist can be completely dissolved and removed in the development process in the subsequent step. Therefore, there are no problems and troubles in the post-process due to the defects of the cured resist as in the conventional method.

(発明の効果) この発明により、以上詳しく説明した通り、従来法のよ
うな硬化レジストの欠落等の欠点がなく、後工程の現像
処理が安定し、高精度な回路ターンの形成が可能とな
る。
(Effects of the Invention) According to the present invention, as described in detail above, there is no defect such as lack of a cured resist as in the conventional method, the development process in the subsequent step is stable, and it is possible to form a highly accurate circuit turn. .

工程トラブルの削減により生産性向上が図られ、不良率
も低減する。
By reducing process troubles, productivity is improved and the defect rate is also reduced.

【図面の簡単な説明】[Brief description of drawings]

第1図は、この発明の露光方法の一実施例を部分拡大断
面とともに示した平面図である。第2図は、その要部平
面図である。 第3図、第4図および第5図は、従来法を示した要部平
面図である。 1……露光用積層板 2……露光用パターンフィルム 3……フォトレジスト 4……周囲4辺縁部 a1,a2.a3,a4……非露光領域
FIG. 1 is a plan view showing an embodiment of the exposure method of the present invention together with a partially enlarged cross section. FIG. 2 is a plan view of the main part. FIG. 3, FIG. 4 and FIG. 5 are plan views of the essential parts showing the conventional method. 1 ... exposure laminated plate 2 ... exposure pattern film 3 ... photoresist 4 ... periphery 4 side edges a 1 , a 2 .a 3 ,, a 4 ... non-exposed area

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】表面レジスト処理したプリント配線板用積
層板の露光に際し、このレジスト処理積層板の周囲の4
辺縁部をパターンフィルムの非露光領域によって3〜5m
m内側にかかるように覆うことを特徴とするプリント配
線板の露光方法。
1. When exposing a laminate for a printed wiring board having a surface resist treatment, four layers around the resist treated laminate are exposed.
3-5m depending on the unexposed area of the pattern film
m A method for exposing a printed wiring board, which is characterized by covering the inside of the printed wiring board.
JP1246988A 1989-09-22 1989-09-22 Exposure method for printed wiring boards Expired - Lifetime JPH0770807B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1246988A JPH0770807B2 (en) 1989-09-22 1989-09-22 Exposure method for printed wiring boards

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1246988A JPH0770807B2 (en) 1989-09-22 1989-09-22 Exposure method for printed wiring boards

Publications (2)

Publication Number Publication Date
JPH03108790A JPH03108790A (en) 1991-05-08
JPH0770807B2 true JPH0770807B2 (en) 1995-07-31

Family

ID=17156702

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1246988A Expired - Lifetime JPH0770807B2 (en) 1989-09-22 1989-09-22 Exposure method for printed wiring boards

Country Status (1)

Country Link
JP (1) JPH0770807B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2863646B1 (en) * 2003-12-11 2006-02-24 Nergeco Sa IMPROVED CURTAIN DOOR BY ROLLER WITH IMPROVED SIDE SEAL
CN114867220A (en) * 2022-05-27 2022-08-05 广州美维电子有限公司 Pattern design method for reducing fine circuit board dry film breakage

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5730874U (en) * 1980-07-24 1982-02-18

Also Published As

Publication number Publication date
JPH03108790A (en) 1991-05-08

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