JPH0770682B2 - Hybrid integrated circuit device - Google Patents

Hybrid integrated circuit device

Info

Publication number
JPH0770682B2
JPH0770682B2 JP4358703A JP35870392A JPH0770682B2 JP H0770682 B2 JPH0770682 B2 JP H0770682B2 JP 4358703 A JP4358703 A JP 4358703A JP 35870392 A JP35870392 A JP 35870392A JP H0770682 B2 JPH0770682 B2 JP H0770682B2
Authority
JP
Japan
Prior art keywords
case
heat sink
control element
integrated circuit
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP4358703A
Other languages
Japanese (ja)
Other versions
JPH06204398A (en
Inventor
昭夫 小柳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP4358703A priority Critical patent/JPH0770682B2/en
Publication of JPH06204398A publication Critical patent/JPH06204398A/en
Publication of JPH0770682B2 publication Critical patent/JPH0770682B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires

Landscapes

  • Casings For Electric Apparatus (AREA)
  • Cooling Or The Like Of Electrical Apparatus (AREA)

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は混成集積回路装置に関
し、特に温度特性を向上するとともに設計の自由度を改
善した混成集積回路装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid integrated circuit device, and more particularly to a hybrid integrated circuit device having improved temperature characteristics and improved design flexibility.

【0002】[0002]

【従来の技術】従来の混成集積回路装置として、図5に
示すように、ヒートシンク21上に複数枚の基板22,
23を実装し、各基板22,23にパワー素子(高電力
素子)24や制御素子25を搭載している。これらパワ
ー素子24と制御素子25とは、各基板22,23間に
接続された金属細線26により相互に接続する。また、
各基板22,23はヒートシンク21上に一体的に形成
されたケース27及びカバー28により封止され、ケー
ス28に設けたリード29には金属細線30により電気
接続を行っている。このような混成集積回路装置では、
特にパワー素子24から発生された熱をヒートシンク2
1を介して放熱させることができる。しかしながら、こ
の構成ではパワー素子24と制御素子25とを同一平面
に配設しているため、集積回路装置全体の平面面積が大
きくなる。また、パワー素子24で発生した熱がケース
内において輻射等により制御素子25に伝えられ、熱に
敏感な制御素子の温度特性を劣化させるおそれがある。
2. Description of the Related Art As a conventional hybrid integrated circuit device, as shown in FIG.
23 is mounted, and a power element (high power element) 24 and a control element 25 are mounted on each of the substrates 22 and 23. The power element 24 and the control element 25 are connected to each other by a thin metal wire 26 connected between the substrates 22 and 23. Also,
Each of the substrates 22 and 23 is sealed by a case 27 and a cover 28 which are integrally formed on the heat sink 21, and the leads 29 provided on the case 28 are electrically connected to each other by a thin metal wire 30. In such a hybrid integrated circuit device,
In particular, heat generated by the power element 24 is applied to the heat sink 2
It is possible to radiate heat via 1. However, in this configuration, since the power element 24 and the control element 25 are arranged on the same plane, the plane area of the entire integrated circuit device becomes large. Further, the heat generated in the power element 24 may be transferred to the control element 25 by radiation or the like in the case, and the temperature characteristics of the heat-sensitive control element may be deteriorated.

【0003】そこで、従来では平面面積を低減させる改
善策として、特開昭61−75558号公報のものが提
案されている。図6はその構成を示しており、パワー素
子33と制御素子34とをそれぞれ同一寸法の別の基板
31,32に搭載し、各基板31,32に設けた外部端
子35,36に各素子を電気接続する。そして、この外
部端子35,36の一部を曲げ加工してU字部35a,
36aを形成したものである。この構成によれば、パワ
ー素子33を搭載した基板31と、制御素子34を搭載
した基板32とを上下方向に重ね、上側の基板31の外
部端子35の先端を下側の基板32の外部端子36のU
字部36aに嵌合させることで、両者を電気接続するこ
とができる。したがって、この混成集積回路装置では、
各素子を上下方向に重ねることになるため、装置全体と
しての平面面積を低減することができる。
Therefore, in the past, as an improvement measure for reducing the plane area, the one disclosed in Japanese Patent Laid-Open No. 61-75558 has been proposed. FIG. 6 shows the configuration, in which the power element 33 and the control element 34 are mounted on different substrates 31 and 32 having the same size, and the respective elements are mounted on the external terminals 35 and 36 provided on the respective substrates 31 and 32. Make an electrical connection. Then, a part of the external terminals 35, 36 is bent to form a U-shaped portion 35a,
36a is formed. According to this configuration, the board 31 on which the power element 33 is mounted and the board 32 on which the control element 34 is mounted are vertically stacked, and the tip of the external terminal 35 of the upper board 31 is connected to the external terminal of the lower board 32. 36 U
Both can be electrically connected by fitting in the character portion 36a. Therefore, in this hybrid integrated circuit device,
Since the respective elements are vertically stacked, the plane area of the entire device can be reduced.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、図6に
示したものは、基板31,32を上下に配置するため
に、ヒートシンクを実装するスペースを確保することが
難しく、放熱効果が低下され易い。また、上下の基板3
1,32の間隔を小さくするとパワー素子33と制御素
子34の上下間隔が接近し、パワー素子33で発生した
熱が制御素子34に影響し、温度特性が劣化され易くな
る。逆に、この熱の影響を緩和させるために上下の基板
の間隔を大きくすると、装置の高さ寸法が大きくなると
いう問題がある。また、この構成では、外部端子35,
36を介してのみパワー素子33と制御素子34とが電
気接続されるため、例えば相互間でのみ接続が必要とさ
れる信号線等を接続する場合にも、本来は不要な外部端
子をそのために設ける必要があり、外部端子数が増大す
るとともに、各素子を搭載する基板の設計、特に配線パ
ターン設計に制限を受け、設計の自由度が抑えられると
いう問題がある。本発明の目的は、平面面積を低減する
一方で温度特性を向上した混成集積回路装置を提供する
ことにある。また、本発明の他の目的は、設計の自由度
を改善した混成集積回路を提供することにある。
However, in the structure shown in FIG. 6, since the substrates 31 and 32 are arranged vertically, it is difficult to secure a space for mounting a heat sink, and the heat dissipation effect is easily deteriorated. Also, the upper and lower substrates 3
When the distance between the power elements 1 and 32 is reduced, the vertical distance between the power element 33 and the control element 34 becomes closer, and the heat generated in the power element 33 affects the control element 34, and the temperature characteristics are easily deteriorated. On the contrary, if the distance between the upper and lower substrates is increased in order to reduce the influence of this heat, there is a problem that the height dimension of the device becomes large. Further, in this configuration, the external terminals 35,
Since the power element 33 and the control element 34 are electrically connected only via 36, for example, even when connecting a signal line or the like that needs to be connected only to each other, an external terminal that is originally unnecessary is provided for that purpose. There is a problem in that the number of external terminals must be increased, the number of external terminals is increased, and the design of the board on which each element is mounted is restricted, especially the wiring pattern design, and the degree of freedom in design is suppressed. It is an object of the present invention to provide a hybrid integrated circuit device having a reduced planar area and improved temperature characteristics. Another object of the present invention is to provide a hybrid integrated circuit with improved design flexibility.

【0005】[0005]

【課題を解決するための手段】本発明は、板状のヒート
シンクと、その周囲の少なくとも一部に配置した端子と
を装置のケースに一体成形して設け、かつヒートシンク
の一方の面に実装した基板にパワー素子を搭載し、ヒー
トシンクの他方の面に実装した基板に制御素子を搭載
し、各素子を前記端子にそれぞれ電気接続した構成とす
る。この場合、一端部がケース外部に引出される外部端
子と、ケース内部に両端部が露呈される接続端子とをケ
ースに一体成形し、パワー素子と制御素子をそれぞれ外
部端子に接続する一方、両素子間の電気接続を接続素子
を介して接続する。また、必要に応じて外部端子のケー
ス内側の端部をヒートシンクの両面に露呈させ、パワー
素子と制御素子をそれぞれ同一の外部端子の内側の端部
に接続する。
According to the present invention, a plate-shaped heat sink and terminals arranged in at least a part of its periphery are integrally formed in a case of an apparatus and mounted on one surface of the heat sink. The power element is mounted on the board, the control element is mounted on the board mounted on the other surface of the heat sink, and each element is electrically connected to the terminal. In this case, an external terminal whose one end is pulled out to the outside of the case and a connection terminal whose both ends are exposed inside the case are integrally molded in the case to connect the power element and the control element to the external terminal, respectively. Electrical connections between the elements are connected via connecting elements. If necessary, the ends of the external terminals inside the case are exposed on both sides of the heat sink, and the power element and the control element are connected to the inside ends of the same external terminal.

【0006】[0006]

【実施例】次に、本発明について図面を参照して説明す
る。図1は本発明の第1実施例の概略構成を示す斜視図
である。また、図2及び図3は図1のA−A線、B−B
線拡大断面図である。これらの図において、ケース1は
長方形をした枠壁状に形成され、その上側開口及び下側
開口に板状のケースカバー2,3を取着して内部を密封
するように構成される。このケース1の内部の上下略中
央部にはヒートシンク4が配設され、このヒートシンク
4の周辺部を前記ケース1の内面において抱持してい
る。一方、ケース1の一辺の外面には端子部5が設けら
れる。この端子部5は、ケース1の外面に角筒部1aを
一体に形成するとともに、ケース1を内外に貫通する外
部端子6が設けられ、この外部端子6の外側端は前記角
筒1a内に配置される。なお、この外部端子6の内側端
は前記ヒートシンク4の上下両側に位置される。更に、
前記ケース1の内面に沿う周囲一部には、ケース内面部
を上下に貫通する接続端子7が設けられ、この接続端子
7の上下の各端部は前記ヒートシンク4の上下両側に位
置される。前記ケース1は樹脂で形成され、前記ヒート
シンク4、外部端子6、接続端子7は金属で形成される
が、これらは樹脂成形により一体に形成されている。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1 is a perspective view showing a schematic configuration of a first embodiment of the present invention. 2 and 3 are the lines AA and BB of FIG.
It is a line expansion sectional view. In these figures, the case 1 is formed in the shape of a rectangular frame wall, and plate-shaped case covers 2 and 3 are attached to the upper and lower openings of the case 1 to seal the inside. A heat sink 4 is disposed in the upper and lower substantially central portions inside the case 1, and the peripheral portion of the heat sink 4 is held by the inner surface of the case 1. On the other hand, the terminal portion 5 is provided on the outer surface of one side of the case 1. The terminal portion 5 is formed integrally with a square tube portion 1a on the outer surface of the case 1, and is provided with an external terminal 6 penetrating the case 1 inward and outward, and the outer end of the external terminal 6 is located inside the square tube 1a. Will be placed. The inner ends of the external terminals 6 are located on the upper and lower sides of the heat sink 4. Furthermore,
On a part of the periphery along the inner surface of the case 1, there are provided connection terminals 7 penetrating vertically through the inner surface of the case, and upper and lower ends of the connection terminal 7 are located on both upper and lower sides of the heat sink 4. The case 1 is made of resin, and the heat sink 4, the external terminal 6, and the connection terminal 7 are made of metal, which are integrally formed by resin molding.

【0007】一方、前記ヒートシンク4の上面には第1
の基板8が実装され、下面に第2の基板9が実装され
る。この場合、例えば各基板8,9の裏面に設けた図外
のメタライズ層や金属メッキ層をロウ材等によりヒート
シンク4に直接接続する構成が取られる。前記第1の基
板8には高電力トランジスタ等のパワー素子10が搭載
され、第1の基板8に設けた導電回路パターン11に金
属細線12により電気接続される。同様に第2の基板9
にはマイクロコンピュータチップやメモリ等の制御素子
13が搭載され、導電回路パターン14に金属細線15
により電気接続される。そして、第1の基板8及び第2
の基板9の各導電回路パターン11,14と外部端子6
とをそれぞれ金属細線16で接続する。また、パワー素
子10と制御素子13とを相互に接続する場合に、各導
電回路パターン11,14と接続端子7とを金属細線1
7により接続する。例えば、電源線、接地線、各種入出
力線は外部端子6に接続し、パワー素子10と制御素子
13間の連絡線を接続端子7に接続する。
On the other hand, on the upper surface of the heat sink 4, the first
Board 8 is mounted, and the second board 9 is mounted on the lower surface. In this case, for example, a metallization layer or a metal plating layer (not shown) provided on the back surface of each substrate 8, 9 is directly connected to the heat sink 4 by a brazing material or the like. A power element 10 such as a high power transistor is mounted on the first substrate 8 and is electrically connected to a conductive circuit pattern 11 provided on the first substrate 8 by a thin metal wire 12. Similarly, the second substrate 9
A control element 13 such as a microcomputer chip or a memory is mounted on the semiconductor device, and the metal thin wire 15 is formed on the conductive circuit pattern 14.
It is electrically connected by. Then, the first substrate 8 and the second
Of the conductive circuit patterns 11 and 14 on the substrate 9 and the external terminals 6
And are connected by a thin metal wire 16. When the power element 10 and the control element 13 are connected to each other, the conductive circuit patterns 11 and 14 and the connection terminal 7 are connected to the metal thin wire 1.
Connect by 7. For example, the power supply line, the ground line, and various input / output lines are connected to the external terminal 6, and the connecting line between the power element 10 and the control element 13 is connected to the connection terminal 7.

【0008】したがって、この構成によれば、1つのヒ
ートシンク4の上面と下面にそれぞれ実装した基板8,
9にパワー素子10と制御素子13を搭載しているた
め、素子を上下に重ねた分、集積回路装置の平面面積を
低減することが可能となる。また、パワー素子10と制
御素子13とをヒートシンク4を挟んだ両側に分けて搭
載しているため、パワー素子10で発生した熱はヒート
シンク4により吸熱されかつ放熱されるので、制御素子
13に影響することは殆どなく、制御素子13の温度特
性を向上することが可能となる。一方、パワー素子10
と制御素子13はそれぞれ外部端子6に必要な電気接続
が行われるとともに、パワー素子10と制御素子13と
の間を相互接続するだけの配線の場合には、ケース1に
設けた接続端子7を介して両者を接続することができ、
この接続を行うために外部端子を設ける必要がない。し
たがって、外部端子6の数がいたずらに増加することを
防止でき、かつ外部端子6を介して両素子10,13の
接続を行う必要がないため、回路設計の自由度を改善す
ることができる。
Therefore, according to this structure, the substrates 8 mounted on the upper surface and the lower surface of one heat sink 4,
Since the power device 10 and the control device 13 are mounted on the device 9, the plane area of the integrated circuit device can be reduced by the amount of the devices stacked vertically. Further, since the power element 10 and the control element 13 are separately mounted on both sides of the heat sink 4, the heat generated by the power element 10 is absorbed and radiated by the heat sink 4, so that the control element 13 is affected. In most cases, the temperature characteristic of the control element 13 can be improved. On the other hand, the power element 10
The control terminal 13 and the control element 13 are respectively electrically connected to the external terminal 6, and when the power element 10 and the control element 13 are simply interconnected, the connection terminal 7 provided in the case 1 is used. You can connect both via
It is not necessary to provide an external terminal to make this connection. Therefore, it is possible to prevent the number of external terminals 6 from unnecessarily increasing, and since it is not necessary to connect both elements 10 and 13 via the external terminals 6, it is possible to improve the degree of freedom in circuit design.

【0009】図4は本発明の第2実施例の断面図であ
る。この実施例においては、ヒートシンク4、外部端子
6Aをケース1に一体に支持させ、このヒートシンク4
の両側にそれぞれ基板8,9を実装し、かつ各基板にパ
ワー素子10と制御素子13を分けて搭載している点は
前記第1実施例と同じであり、第1実施例と等価な部分
には同一符号を付してある。この第2実施例において
は、ケース1の両側に端子部5を設け、この端子部5に
支持させた外部端子6Aの全部或いは1部を、図示のよ
うにその内側端部6aにおいて曲げ形成し、この内側端
部6aをヒートシンク4の上下の各基板8,9に対して
それぞれ露呈されるように構成している。したがって、
パワー素子10と制御素子13とを相互に電気接続した
上でこの接続部を外部に引き出したい場合には、この外
部端子6Aの構造を採用し、内側端部6a対して各基板
8,9を金属細線18により電気接続すればよい。これ
により、第1実施例における接続端子7を外部端子6A
で兼用し、回路設計の自由度を更に改善するとともに、
接続端子の数を低減させ、構造の簡略化を図ることが可
能となる。
FIG. 4 is a sectional view of the second embodiment of the present invention. In this embodiment, the heat sink 4 and the external terminal 6A are integrally supported by the case 1, and the heat sink 4
Same as the first embodiment in that the substrates 8 and 9 are mounted on both sides of the substrate, and the power element 10 and the control element 13 are separately mounted on each substrate, which is equivalent to the first embodiment. Are given the same reference numerals. In this second embodiment, terminal portions 5 are provided on both sides of the case 1, and all or a part of the external terminals 6A supported by the terminal portions 5 are bent and formed at their inner end portions 6a as shown in the drawing. The inner end portion 6a is configured to be exposed to the upper and lower substrates 8 and 9 of the heat sink 4, respectively. Therefore,
When it is desired to electrically connect the power element 10 and the control element 13 to each other and to draw out the connection portion to the outside, the structure of the external terminal 6A is adopted, and the substrates 8 and 9 are connected to the inner end portion 6a. Electrical connection may be made by the thin metal wires 18. As a result, the connection terminal 7 in the first embodiment is replaced with the external terminal 6A.
Is also used to further improve the degree of freedom in circuit design,
It is possible to reduce the number of connection terminals and simplify the structure.

【0010】また、この実施例では、パワー素子10側
のケースカバー2に放熱フィン2aを設けており、パワ
ー素子10からケースカバー2に輻射される熱を放熱フ
ィン2aにより効果的に放熱させ、ヒートシンク4によ
る熱吸収及び放熱効果とあいまってパワー素子側のケー
ス内部の温度の上昇を防止することもできる。この実施
例においても、第1実施例と同様な効果を得ることがで
きるとともに、これに加えて放熱フィンによる放熱効果
を進めることで温度特性を更に向上でき、かつ外部端子
を接続端子と兼用することでその有効利用を図り、回路
の設計自由度を更に高めることが可能となる。なお、ケ
ースとヒートシンクの一体形成に伴う係合構造や、外部
端子や接続端子の形状等は混成集積回路装置の仕様に応
じて適宜変更できることは言うまでもない。
Further, in this embodiment, the case cover 2 on the side of the power element 10 is provided with the radiation fins 2a, and the heat radiated from the power element 10 to the case cover 2 is effectively radiated by the radiation fins 2a. Together with the heat absorption and heat dissipation effects of the heat sink 4, it is possible to prevent the temperature inside the case on the power element side from rising. Also in this embodiment, the same effect as that of the first embodiment can be obtained, and in addition to this, the temperature characteristics can be further improved by promoting the heat radiation effect by the radiation fins, and the external terminal also serves as the connection terminal. This makes it possible to make effective use of the circuit and further increase the degree of freedom in circuit design. It is needless to say that the engagement structure accompanying the integral formation of the case and the heat sink, the shape of the external terminals and the connection terminals, and the like can be appropriately changed according to the specifications of the hybrid integrated circuit device.

【0011】[0011]

【発明の効果】以上説明したように本発明は、ケースに
ヒートシンクと端子とを一体成形し、ヒートシンクの一
方の面にパワー素子を搭載し、ヒートシンクの他方の面
に制御素子を搭載し、各素子を端子にそれぞれ電気接続
したことにより、パワー素子と制御素子とが重ねられた
状態で実装されることになり、集積回路装置の平面面積
を低減することができる。また、ヒートシンクを隔てて
パワー素子と制御素子が実装されることになるため、パ
ワー素子の熱が制御素子に影響することが抑制でき、集
積回路装置の温度特性を向上する。また、外部端子と接
続端子とをケースに一体成形し、パワー素子と制御素子
をそれぞれ外部端子に接続する一方、両素子間の電気接
続を接続素子を介して接続することにより、パワー素子
と制御素子とを外部端子を介することなく相互接続で
き、各素子の回路設計の自由度を向上するとともに、外
部端子数を低減し、かつ構造が簡略化できる。更に、外
部端子のケース内側の端部をヒートシンクの両面に露呈
させ、パワー素子と制御素子をそれぞれ同一の外部端子
の内側の端部に接続することで、外部端子で接続端子を
兼用し、構造を更に簡略化することが可能となる。
As described above, according to the present invention, the heat sink and the terminal are integrally molded in the case, the power element is mounted on one surface of the heat sink, and the control element is mounted on the other surface of the heat sink. By electrically connecting the elements to the terminals, respectively, the power element and the control element are mounted in a stacked state, and the planar area of the integrated circuit device can be reduced. Further, since the power element and the control element are mounted with the heat sink separated, it is possible to suppress the heat of the power element from affecting the control element, and improve the temperature characteristics of the integrated circuit device. Further, the external terminal and the connection terminal are integrally molded in the case, and the power element and the control element are connected to the external terminal, respectively, while the electrical connection between both elements is connected through the connection element, thereby controlling the power element and the control element. The elements can be interconnected without using external terminals, the degree of freedom in circuit design of each element can be improved, the number of external terminals can be reduced, and the structure can be simplified. Further, by exposing the inside end of the external terminal to both sides of the heat sink and connecting the power element and the control element to the inside end of the same external terminal, respectively, the external terminal also serves as a connection terminal. Can be further simplified.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1実施例の一部を破断した斜視図で
ある。
FIG. 1 is a partially cutaway perspective view of a first embodiment of the present invention.

【図2】図1のA−A線拡大断面図である。FIG. 2 is an enlarged cross-sectional view taken along the line AA of FIG.

【図3】図1のB−B線拡大断面図である。FIG. 3 is an enlarged sectional view taken along line BB of FIG.

【図4】本発明の第2実施例の断面図である。FIG. 4 is a sectional view of a second embodiment of the present invention.

【図5】従来の平面構成の混成集積回路装置の断面図で
ある。
FIG. 5 is a cross-sectional view of a conventional hybrid integrated circuit device having a planar configuration.

【図6】従来の立体構成の混成集積回路装置の断面図で
ある。
FIG. 6 is a cross-sectional view of a conventional hybrid integrated circuit device having a three-dimensional structure.

【符号の説明】[Explanation of symbols]

1 ケース 2,3 ケースカバー 4 ヒートシンク 6,6A 外部端子 7 接続端子 8 第1の基板 9 第2の基板 10 パワー素子 13 制御素子 1 Case 2, 3 Case Cover 4 Heat Sink 6, 6A External Terminal 7 Connection Terminal 8 First Substrate 9 Second Substrate 10 Power Element 13 Control Element

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 板状のヒートシンクと、その周囲の少な
くとも一部に配置した端子とをケースに一体成形して設
け、前記ヒートシンクの一方の面に実装した基板にパワ
ー素子を搭載し、ヒートシンクの他方の面に実装した基
板に制御素子を搭載し、各素子を前記端子にそれぞれ電
気接続したことを特徴とする混成集積回路装置。
1. A plate-shaped heat sink and a terminal arranged on at least a part of its periphery are integrally formed and provided in a case, and a power element is mounted on a substrate mounted on one surface of the heat sink, A hybrid integrated circuit device characterized in that a control element is mounted on a substrate mounted on the other surface, and each element is electrically connected to the terminal.
【請求項2】一端部がケース外部に引出される外部端子
と、ケース内部に両端部が露呈される接続端子とをケー
スに一体成形し、パワー素子と制御素子をそれぞれ前記
外部端子に接続する一方、両素子間の電気接続を前記接
続素子を介して接続してなる請求項1の混成集積回路装
置。
2. An external terminal, one end of which is drawn out of the case, and a connection terminal, both ends of which are exposed inside the case, are integrally molded in the case, and a power element and a control element are connected to the external terminal, respectively. On the other hand, the hybrid integrated circuit device according to claim 1, wherein electrical connection between both elements is connected through the connection element.
【請求項3】外部端子のケース内側の端部をヒートシン
クの両面に露呈させ、パワー素子と制御素子をそれぞれ
同一の外部端子の内側の端部に接続してなる請求項1又
は2の混成集積回路装置。
3. The hybrid integrated circuit according to claim 1, wherein the ends of the external terminals inside the case are exposed on both surfaces of the heat sink, and the power element and the control element are connected to the inside ends of the same external terminal. Circuit device.
JP4358703A 1992-12-28 1992-12-28 Hybrid integrated circuit device Expired - Fee Related JPH0770682B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4358703A JPH0770682B2 (en) 1992-12-28 1992-12-28 Hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4358703A JPH0770682B2 (en) 1992-12-28 1992-12-28 Hybrid integrated circuit device

Publications (2)

Publication Number Publication Date
JPH06204398A JPH06204398A (en) 1994-07-22
JPH0770682B2 true JPH0770682B2 (en) 1995-07-31

Family

ID=18460682

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4358703A Expired - Fee Related JPH0770682B2 (en) 1992-12-28 1992-12-28 Hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JPH0770682B2 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2765067B1 (en) * 1997-06-19 1999-07-16 Alsthom Cge Alcatel POWER ELECTRONICS MODULE AND POWER ELECTRONICS DEVICE PROVIDED WITH SUCH MODULES
KR100393099B1 (en) * 2000-12-26 2003-07-31 앰코 테크놀로지 코리아 주식회사 Semiconductor package
JP4150508B2 (en) * 2001-04-03 2008-09-17 三菱電機株式会社 Power semiconductor device
KR100429885B1 (en) * 2002-05-09 2004-05-03 삼성전자주식회사 Multi-chip package improving heat spread characteristics and manufacturing method the same
JP2008027935A (en) * 2006-07-18 2008-02-07 Hitachi Ltd Power semiconductor device
JP4844647B2 (en) * 2009-03-31 2011-12-28 Tdk株式会社 Electrical device and switching power supply device
CN111284331B (en) * 2018-12-07 2023-06-27 瑷司柏电子股份有限公司 Motor control device with built-in shunt resistor and power transistor

Also Published As

Publication number Publication date
JPH06204398A (en) 1994-07-22

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