JPH07249719A - Electronic apparatus - Google Patents

Electronic apparatus

Info

Publication number
JPH07249719A
JPH07249719A JP4239794A JP4239794A JPH07249719A JP H07249719 A JPH07249719 A JP H07249719A JP 4239794 A JP4239794 A JP 4239794A JP 4239794 A JP4239794 A JP 4239794A JP H07249719 A JPH07249719 A JP H07249719A
Authority
JP
Japan
Prior art keywords
insulator
heat
plate
terminal
rising wall
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4239794A
Other languages
Japanese (ja)
Inventor
Shiyouichi Konagata
正一 小永田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Omron Corp
Original Assignee
Omron Corp
Omron Tateisi Electronics Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Omron Corp, Omron Tateisi Electronics Co filed Critical Omron Corp
Priority to JP4239794A priority Critical patent/JPH07249719A/en
Publication of JPH07249719A publication Critical patent/JPH07249719A/en
Pending legal-status Critical Current

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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PURPOSE:To obtain an insulating structure exhibiting high insulation without sacrifice of compactness when an insulator is interposed between a terminal plate for mounting a heating electronic component and a heat plate while exhibiting sufficient heat dissipation effect and allowing assemblage with high productivity. CONSTITUTION:The electronic apparatus comprises a terminal plate 6b for mounting a heating electronic element 4, and an insulator 8 sandwiched by the terminal plate 6b and a heat plate 9 wherein a rising wall 8a is formed integrally with the insulator 8 on the periphery.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、ソリッドステートリレ
ーなどの電子機器の絶縁構造に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an insulating structure for electronic devices such as solid state relays.

【0002】[0002]

【従来の技術】ソリッドステートリレーにおいては、発
熱電子素子であるトライアックやサイリスタ等の電気回
路部と放熱プレートとの間にセラミック(アルミナ等)
からなる絶縁体を介在させた絶縁構造が採用されてい
る。
2. Description of the Related Art In a solid-state relay, ceramics (alumina, etc.) are placed between a heat dissipation plate and an electric circuit section such as a triac or thyristor which is a heat-generating electronic element.
An insulating structure with an insulator made of is interposed.

【0003】[0003]

【発明が解決しようとする課題】上記絶縁構造において
は、使用電源の電圧が高くなると絶縁距離も長くする必
要があり、例えば、 (a)絶縁体の厚さを大きくする。
In the above insulating structure, it is necessary to increase the insulation distance as the voltage of the power supply used increases. For example, (a) the thickness of the insulator is increased.

【0004】(b)絶縁体の外形を大きくし、その中心
付近に回路部を集中する。
(B) The outer shape of the insulator is enlarged, and the circuit portion is concentrated near the center thereof.

【0005】(c)絶縁体に同一材料または別材料から
なる絶縁体を貼り合わせて絶縁バリアを形成する。
(C) An insulator made of the same material or a different material is attached to the insulator to form an insulation barrier.

【0006】等の手段が適宜選択あるいは組み合わされ
て利用されている。
Means such as the above are appropriately selected or combined and used.

【0007】しかし、従来の上記各種手段には次のよう
な不具合点があった。すなわち、絶縁体の厚さを大きく
する上記手段(a)によると、絶縁体の熱抵抗が増加し
て十分な放熱効果が得られない。
However, the above-mentioned various conventional means have the following drawbacks. That is, according to the above means (a) for increasing the thickness of the insulator, the thermal resistance of the insulator increases and a sufficient heat dissipation effect cannot be obtained.

【0008】絶縁体の外形を大きくする上記手段(b)
によると、コンパクト化が阻害されて市場ニーズへの対
応が困難になる。
The above means (b) for enlarging the outer shape of the insulator
According to this, downsizing is hindered and it becomes difficult to meet market needs.

【0009】貼り合わせにより絶縁バリアを形成する上
記手段(c)によると、組立てコストが高くつくととも
に、貼合わせ境界絶縁の信頼性が問われる。
According to the above-mentioned means (c) for forming an insulating barrier by bonding, the assembling cost is high and the reliability of bonded boundary insulation is required.

【0010】本発明は、このような点に着目してなされ
たのであって、発熱電子素子を装着する端子と放熱プレ
ートとの間に絶縁体を介在するに際し、高い絶縁性を発
揮するものでありながら、コンパクト化を損なうことな
く、十分な放熱効果を得ることができ、しかも、生産性
の高い組立てを行うことができる絶縁構造を得ることを
主たる目的とし、また、絶縁材を利用して回路部分の耐
久性を高めることをも可能にすることを他の目的として
いる。
The present invention has been made paying attention to such a point, and exhibits a high insulating property when an insulator is interposed between a terminal for mounting a heat-generating electronic element and a heat radiating plate. However, the main purpose is to obtain an insulating structure that can achieve a sufficient heat dissipation effect without compromising the compactness, and that can be assembled with high productivity. Another purpose is to make it possible to increase the durability of the circuit portion.

【0011】[0011]

【課題を解決するための手段】上記目的を達成するため
に、本発明は次のような構成を採る。つまり、本第1発
明は、端子プレート上に発熱電子素子が装着されるとと
もに、その端子プレートと放熱プレートとの間に絶縁体
が介在されて構成される電子機器において、前記絶縁体
の周部に立上がり壁が一体形成されてなることを特徴と
する。
In order to achieve the above object, the present invention has the following constitution. That is, the first aspect of the present invention is an electronic device configured such that a heat-generating electronic element is mounted on a terminal plate and an insulator is interposed between the terminal plate and the heat dissipation plate. It is characterized in that the rising wall is integrally formed with the.

【0012】また、本第2発明は、第1の発明におい
て、さらに、前記立上がり壁で囲まれた空間に樹脂材が
充填されてなることを特徴とする。
Further, the second invention is characterized in that, in the first invention, the space surrounded by the rising wall is filled with a resin material.

【0013】また、本第3発明は、上記第1発明または
第2発明における電子機器を、さらに、ソリッドステー
トリレーとしたことに特徴を有する。
The third invention is characterized in that the electronic device according to the first invention or the second invention is a solid state relay.

【0014】[0014]

【作用】上記第1発明の構成によると、絶縁体の周部に
一体形成した立上がり壁の高さおよび壁厚さを適宜設定
することで、絶縁体の外形の大きさをあまり変えること
なく必要な絶縁距離を確保することができる。また、こ
の際、立上がり壁の形成は絶縁体から放熱プレートへの
熱抵抗を増大することはない。
According to the structure of the first aspect of the invention, the height and wall thickness of the rising wall integrally formed on the peripheral portion of the insulator are appropriately set, so that the size of the outer shape of the insulator is not required to be changed so much. Insulation distance can be secured. Further, at this time, the formation of the rising wall does not increase the thermal resistance from the insulator to the heat dissipation plate.

【0015】また、上記第2発明の構成によると、立上
がり壁で囲まれた凹入空間がポッティング樹脂の充填空
間とすることができ、この凹入空間に少量の樹脂を充填
することで素子および回路部分の保護を図ることができ
る。
Further, according to the structure of the second aspect of the invention, the recessed space surrounded by the rising wall can be a filling space for the potting resin, and by filling this recessed space with a small amount of resin, the element and The circuit part can be protected.

【0016】また、上記第3発明の構成によると、上記
第1発明または第2発明の作用を発揮するソリッドステ
ートリレーが得られる。
Further, according to the structure of the third invention, there can be obtained a solid state relay which exhibits the operation of the first invention or the second invention.

【0017】[0017]

【実施例】図1ないし図6を参照して本発明のソリッド
ステートリレーを説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS A solid state relay of the present invention will be described with reference to FIGS.

【0018】ソリッドステートリレーは、回路基板1、
出力端子P1 ,P2 を構成する一対の出力用端子部材
2,3、発熱電子素子4(トライアックTHY)、発熱
電子素子4に接続される一対の端子5、6とゲート端子
7、セラミックからなる絶縁体8、金属板からなる放熱
プレート9、これら部品を装着する樹脂製のケース本体
10、および、このケース本体10の上部に係止爪10
a,10bを介して連結される図示しないカバーケー
ス、等から構成される。
The solid state relay includes a circuit board 1,
From the pair of output terminal members 2 and 3 forming the output terminals P 1 and P 2 , the heat-generating electronic element 4 (triac THY), the pair of terminals 5 and 6 connected to the heat-generating electronic element 4, the gate terminal 7, and the ceramic. Insulating body 8, heat dissipation plate 9 made of a metal plate, a case body 10 made of resin for mounting these parts, and a locking claw 10 on the top of the case body 10.
It is composed of a cover case (not shown) and the like connected via a and 10b.

【0019】前記発熱電子素子4は端子6に一体の端子
プレート6bに搭載接続され、その素子上面には他方の
端子5が接続されるとともにゲート端子7が立設され、
また、端子プレート6b自体は絶縁体8を介して放熱プ
レート9上に固定装備され、図6に示す素子部ユニット
が予め組立てられた後、ケース本体10に下方から組付
けられる。
The heating electronic element 4 is mounted and connected to a terminal plate 6b which is integral with the terminal 6, and the other terminal 5 is connected to the upper surface of the element and a gate terminal 7 is provided upright.
The terminal plate 6b itself is fixedly mounted on the heat dissipation plate 9 via the insulator 8, and the element unit unit shown in FIG. 6 is preassembled and then assembled to the case body 10 from below.

【0020】放熱プレート9はケース本体10の下部開
口に嵌め込み装着され、ケース本体10の下面に突設し
た一対のカシメピン11を放熱プレート9の透孔12に
挿通して熱カシメすることで、上記素子部ユニットがケ
ース本体10に組付け固定される。なお、放熱プレート
9には、ケース本体10から突出した一対の取付け脚部
10cの取付け孔13に重複する取付け孔14を備えて
おり、発熱電子素子4の発生熱が端子プレート6b、絶
縁体8、および、放熱プレート9を介して、このソリッ
ドステートリレーを装着した電気装置に伝達放出される
ようになっている。
The heat radiating plate 9 is fitted and mounted in the lower opening of the case body 10, and a pair of caulking pins 11 projecting from the lower surface of the case body 10 are inserted into the through holes 12 of the heat radiating plate 9 for thermal caulking. The element unit is assembled and fixed to the case body 10. The heat dissipation plate 9 is provided with a mounting hole 14 that overlaps with the mounting holes 13 of the pair of mounting legs 10c protruding from the case body 10. The heat generated by the heat-generating electronic element 4 is generated by the terminal plate 6b and the insulator 8. , And via the heat dissipation plate 9 to the electric device equipped with this solid state relay.

【0021】ケース本体10の周壁に形成された一対の
凹部15に出力用端子部材2,3が上方より位置決め嵌
着され、一方の出力用端子部材2が端子プレート6bか
ら突設した端子ピン6aに接続されるとともに、各出力
用端子部材2,3に形成されたスリット16,17に、
各端子5,6から立設した端子ピン5a,6aがそれぞ
れ挿通されて導通接続される。
The output terminal members 2 and 3 are positioned and fitted from above in a pair of recesses 15 formed in the peripheral wall of the case body 10, and one output terminal member 2 is provided with a terminal pin 6a protruding from the terminal plate 6b. To the slits 16 and 17 formed in the output terminal members 2 and 3,
Terminal pins 5a and 6a provided upright from the terminals 5 and 6 are respectively inserted and electrically connected.

【0022】前記回路基板1はケース本体10の上部開
口に嵌め込み装着され、この回路基板1に形成した3個
の透孔18,19,20に端子5の他方の端子ピン5
b,前記端子6の端子ピン6a、および、前記ゲート端
子7をそれぞれ挿通してハンダ付けして、各端子5,
6,7が基板上の回路の所定部位に導通接続される。
The circuit board 1 is fitted and mounted in the upper opening of the case body 10, and the three terminal holes 5 of the terminal 5 are inserted into the three through holes 18, 19, 20 formed in the circuit board 1.
b, the terminal pin 6a of the terminal 6 and the gate terminal 7 are respectively inserted and soldered to each terminal 5,
6, 7 are conductively connected to predetermined portions of the circuit on the substrate.

【0023】以下、本発明の特徴構成を説明する。The characteristic features of the present invention will be described below.

【0024】前記絶縁体8はセラミック材で浅い矩形箱
状に一体成形されたものでり、その四辺全周に一体立設
した一連の立上がり壁8aによって、発熱電子素子4よ
りなる回路部分と放熱プレート9との間の絶縁距離が増
大されている。そして、この立上がり壁8aで囲まれた
凹入空間内に、シリコン等の絶縁性の樹脂材21が充填
(ポッティング)されて、発熱電子素子4およびその回
路部分の保護が図られている。
The insulator 8 is integrally formed of a ceramic material in a shallow rectangular box shape, and a series of rising walls 8a integrally provided on all four sides of the insulator 8 dissipate heat from the circuit portion including the heat-generating electronic element 4 and heat radiation. The insulation distance to the plate 9 is increased. An insulating resin material 21 such as silicon is filled (potted) in the recessed space surrounded by the rising wall 8a to protect the heat-generating electronic element 4 and its circuit portion.

【0025】なお、前記立上がり壁8aの高さおよび厚
さを使用電源の電圧に応じて設定することで、絶縁体8
の外形を大きくすることなく所望の絶縁距離のバリアを
形成することができる。また、立上がり壁8aで囲まれ
た凹入空間内への樹脂充填は任意である。樹脂材21を
充填しない場合、立上がり壁8aは必ずしも全周に形成
する必要はなく、大きい絶縁距離を要する方向の周部に
のみ立上がり壁8aを形成するだけで実施することも可
能である。
By setting the height and thickness of the rising wall 8a according to the voltage of the power source used, the insulator 8
It is possible to form a barrier with a desired insulation distance without increasing the outer shape of the barrier. Further, resin filling into the recessed space surrounded by the rising wall 8a is optional. When the resin material 21 is not filled, the rising wall 8a does not necessarily have to be formed on the entire circumference, and it is possible to form the rising wall 8a only on the peripheral portion in the direction requiring a large insulation distance.

【0026】[0026]

【発明の効果】本第1発明によれば、次のような効果を
期待できる。
According to the first invention, the following effects can be expected.

【0027】(1)絶縁体の周部に適当な寸法に立上が
り壁を形成するだけであるので、絶縁体の外形を特に大
きくすることなく、対象とする発熱電子素子および使用
条件に容易に対応でき、機器にコンパクト化および実装
自由度の増大に有効である。
(1) Since the rising wall is simply formed to have a proper size in the peripheral portion of the insulator, it is possible to easily cope with the target heat-generating electronic element and usage conditions without increasing the outer shape of the insulator. This is effective for making the device compact and increasing the mounting flexibility.

【0028】(2)立上がり壁の形成によって放熱プレ
ートに対する伝熱の熱抵抗が増大することはないので、
絶縁体を厚くして絶縁距離を得る手段に見られるように
放熱効果が低下することはなく、所望の放熱効果も維持
できる。
(2) Since the formation of the rising wall does not increase the heat resistance of heat transfer to the heat dissipation plate,
The heat dissipation effect does not deteriorate as seen in the means for increasing the insulation distance by increasing the thickness of the insulator, and the desired heat dissipation effect can be maintained.

【0029】(3)絶縁バリア形成用の立上がり壁は絶
縁体に一体形成されるので、絶縁体を貼り合わせて絶縁
バリアを形成する手段に比較して、組立て作業性に優
れ、生産コスト低減に効果がある。また、本第2発明に
よれば、本第1発明において、さらに、立上がり壁で囲
まれた凹入空間内への樹脂材を充填することで、素子の
保護ができて耐久性および信頼性の向上に有効であると
ともに、ケース内全体に樹脂材を充填するのに比較して
樹脂材を節約でき、補材コストの節減にも効果がある。
(3) Since the rising wall for forming the insulation barrier is formed integrally with the insulator, it is superior in assembling workability and can reduce the production cost as compared with the means for forming the insulation barrier by bonding the insulators. effective. Further, according to the second aspect of the present invention, by further filling the resin material into the recessed space surrounded by the rising wall in the first aspect of the present invention, the element can be protected and durability and reliability can be improved. In addition to being effective for improvement, it is possible to save the resin material as compared with the case where the entire case is filled with the resin material, and it is also effective in reducing the auxiliary material cost.

【0030】本第3発明によれば、第1発明と第2発明
の効果が発揮される、簡単な構成において絶縁性に優れ
るソリッドステートリレーが得られる。
According to the third aspect of the present invention, it is possible to obtain the solid-state relay excellent in insulating property with a simple structure, in which the effects of the first and second aspects are exhibited.

【図面の簡単な説明】[Brief description of drawings]

【図1】要部の分解斜視図FIG. 1 is an exploded perspective view of a main part

【図2】組立て状態の平面図FIG. 2 is a plan view of the assembled state.

【図3】回路基板を取り外した状態の平面図FIG. 3 is a plan view with a circuit board removed.

【図4】図1におけるa−a線断面図FIG. 4 is a sectional view taken along line aa in FIG.

【図5】図1におけるb−b線断面図5 is a sectional view taken along line bb in FIG.

【図6】素子ユニットの斜視図FIG. 6 is a perspective view of an element unit.

【符号の説明】[Explanation of symbols]

4 発熱電子素子 6b 端子プレート 8 絶縁体 8a 立ち上がり壁 9 放熱プレート 21 樹脂材 4 Heat generating electronic element 6b Terminal plate 8 Insulator 8a Standing wall 9 Heat dissipation plate 21 Resin material

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 端子プレート上に発熱電子素子が装着さ
れるとともに、その端子プレートと放熱プレートとの間
に絶縁体が介在されて構成される電子機器において、 前記絶縁体の周部に立上がり壁が一体形成されてなるこ
とを特徴とする電子機器。
1. An electronic device configured such that a heat-generating electronic element is mounted on a terminal plate and an insulator is interposed between the terminal plate and the heat radiating plate, and a rising wall is provided around a periphery of the insulator. An electronic device characterized by being integrally formed.
【請求項2】 前記立上がり壁で囲まれた空間に樹脂材
が充填されてなることを特徴とする請求項1に記載の電
子機器。
2. The electronic device according to claim 1, wherein a space surrounded by the rising wall is filled with a resin material.
【請求項3】 ソリッドステートリレーである請求項1
または請求項2のいづれかに記載の電子機器。
3. A solid state relay as claimed in claim 1.
Alternatively, the electronic device according to claim 2.
JP4239794A 1994-03-14 1994-03-14 Electronic apparatus Pending JPH07249719A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4239794A JPH07249719A (en) 1994-03-14 1994-03-14 Electronic apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4239794A JPH07249719A (en) 1994-03-14 1994-03-14 Electronic apparatus

Publications (1)

Publication Number Publication Date
JPH07249719A true JPH07249719A (en) 1995-09-26

Family

ID=12634940

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4239794A Pending JPH07249719A (en) 1994-03-14 1994-03-14 Electronic apparatus

Country Status (1)

Country Link
JP (1) JPH07249719A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1174454A (en) * 1997-06-23 1999-03-16 Asea Brown Boveri Ag Power semiconductor module containing encapsulated submodules
JP2009033171A (en) * 2007-07-26 2009-02-12 Semikron Elektronik Gmbh & Co Kg Power semiconductor module having connection mechanism
JP2009033169A (en) * 2007-07-26 2009-02-12 Semikron Elektronik Gmbh & Co Kg Power semiconductor module having connected substrate carrier and manufacturing method thereof
JP2010103343A (en) * 2008-10-24 2010-05-06 Fuji Electric Systems Co Ltd Semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1174454A (en) * 1997-06-23 1999-03-16 Asea Brown Boveri Ag Power semiconductor module containing encapsulated submodules
JP2009033171A (en) * 2007-07-26 2009-02-12 Semikron Elektronik Gmbh & Co Kg Power semiconductor module having connection mechanism
JP2009033169A (en) * 2007-07-26 2009-02-12 Semikron Elektronik Gmbh & Co Kg Power semiconductor module having connected substrate carrier and manufacturing method thereof
JP2010103343A (en) * 2008-10-24 2010-05-06 Fuji Electric Systems Co Ltd Semiconductor device

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