JPH0766422A - Array substrate for liquid crystal display device - Google Patents

Abstract

PURPOSE:To prevent the nibbling of a gate electrode and a wiring pattern edge part, by forming a second layer of molybdenum so as to cover a first layer which is etched and formed by using aluminum or aluminum alloy, and forming a third layer composed of high melting point metal. CONSTITUTION:An aluminum film is deposited on a glass substrate 1. The gate electrode and the wiring 2 of a first layer are formed by photolithography and etching after deposition. A molybdenum film is deposited so as to cover the gate electrode and the wiring 2 of the first layer. A molybdenum tantalum alloy film wherein resistance to chemicals is large and melting point is high is laminated on the molybdenum film, and the gate electrode and the wiring 3 of a second layer and the gate electrode and the wiring 16 of a third layer are formed at the same time. Thereby the blister of aluminum or aluminum alloy of the first layer which is to be caused by the heat at the time of forming a gate insulating film can be prevented, on account of stress relieving action of the second layer molybdenum.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an array substrate for a liquid crystal display device having a thin film transistor.

[0002]

2. Description of the Related Art Recently, amorphous amorphous silicon (a
-Si) thin film transistor (Thin F
There is a liquid crystal display device provided with an ilm Transistor (TFT). This liquid crystal display device is attracting attention because it can realize a large-area, high-definition, high-quality and low-cost flat panel display by forming a thin film transistor array using an amorphous silicon film that can be formed at low temperature. .

First, a conventional inverted stagger type thin film transistor of an array substrate for a liquid crystal display device will be described with reference to FIGS.

As shown in FIG. 2, a glass substrate 1 is used as an insulating substrate, and a gate electrode and wiring 2 of a first layer of aluminum (Al) are formed on the glass substrate 1,
Molybdenum (M) is formed on the gate electrode and the wiring 2 of the first layer so as to cover the gate electrode and the wiring 2 of the first layer.
o) The gate electrode and the wiring 3 of the second layer of the tantalum (Ta) alloy film are formed. The gate electrode and wiring 2 of the first layer and the gate electrode and wiring 3 of the second layer constitute a gate electrode and wiring 4.

A gate insulating film 7 made of a composite film of a silicon oxide film (SiOx) 5 and a silicon nitride film (SiNx) 6 is deposited on the gate electrode and the wiring 4, and then the gate insulating film 7 is deposited. A semiconductor film 8 made of an amorphous silicon film is stacked on the semiconductor film 7.

Further, an etching stopper layer 9 made of a silicon nitride film is formed on the semiconductor film 8, and an ohmic contact layer 10 of an n ⁺ amorphous silicon film is deposited on the etching stopper layer 9. Then, the ohmic contact layer 10 and the gate insulating film 7 are patterned.

In addition, ITO (Indium Tin Oxide) is formed on the silicon oxide film 5 on which the silicon nitride film 6 is not formed.
xide) film pixel electrode 11 is formed.

Then, one ohmic contact layer 10
A source electrode 12 of a two-layer film of a molybdenum film and an aluminum film, one end of which is connected to the pixel electrode 11, is formed, and a drain electrode 13 of a two-layer film of the molybdenum film and the aluminum film is formed on the other ohmic contact layer 10. Form. When forming the source electrode 12 and the drain electrode 13, a two-layer film of a molybdenum film and an aluminum film is deposited on the ohmic contact layer 10, and the two-layer film of the molybdenum film and the aluminum film and ohmic contact are formed with the same resist pattern. The layer 10 is etched, and the ohmic contact layer 10 on one side and the ohmic contact layer 10 on the other side are electrically separated to form a source region and a drain region, which are used as a source electrode 12 and a drain electrode 13, respectively. .

Further, a protective film 14 of a silicon nitride film is deposited to form a thin film transistor 15 to form a thin film transistor array.

[0010]

When aluminum is used for the gate electrode and the wiring 2 of the first layer, and a refractory metal is laminated on the gate electrode and the wiring 2 of the first layer, the gate electrode of the first layer is formed. Since aluminum of the wiring 2 is swollen, molybdenum is used for the gate electrode of the second layer and the wiring 3 as described above. However, a mixed acid-based etching solution containing at least nitric acid and phosphoric acid is used to form the first layer. When the gate electrode / wiring 2 and the gate electrode / wiring 3 of the second layer are simultaneously etched, a diffusion action occurs between the metal of the gate electrode / wiring 2 of the first layer and the metal of the second gate electrode / wiring 3.

For this reason, there is a difference in etching rate between a portion where alloying has progressed during etching and a portion where alloying has not progressed, and the pattern edge portion of the gate electrode and the wiring 4 is partially etched in a bug-eat state, and It has a problem of causing defects such as short circuits.

An object of the present invention is to provide an array substrate for a liquid crystal display device in which the gate electrode and the wiring do not have a worm-like shape.

[0013]

According to the present invention, a gate electrode and a wiring formed on an insulating substrate, a semiconductor film formed on the gate electrode via a gate insulating film, and contacting the semiconductor film are provided. In an array substrate for a liquid crystal display device including a thin film transistor having a source electrode and a drain electrode formed as described above, at least a part of the gate electrode and the wiring is formed by etching using aluminum or an aluminum alloy. A layer, a second layer of molybdenum formed on the first layer separately from the first layer so as to cover the first layer, and a second layer formed on the second layer and having excellent chemical resistance. And a third layer formed of a high melting point metal film.

[0014]

According to the present invention, the stress relaxation effect of the molybdenum of the second layer can prevent the swelling of the aluminum or aluminum alloy of the first layer due to the heat when forming the gate insulating film, and the first layer of aluminum or aluminum alloy can be prevented. And the second layer of molybdenum are separately etched, so that the pattern edge portions of the gate electrode and the wiring can be prevented from being eaten by insects, and the aluminum of the first layer has a high melting point excellent in the chemical resistance of the third layer. Since it is covered with the metal film, a gate electrode and wiring having low resistance and excellent chemical resistance can be obtained.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of an array substrate for a liquid crystal display device according to the present invention will be described below with reference to the drawings in accordance with manufacturing steps. The parts corresponding to the conventional technique shown in FIG.

As shown in FIG. 1, a glass substrate 1 is used as an insulating substrate, an aluminum (Al) film is deposited on the glass substrate 1 by a sputtering method to a thickness of 1000 Å, and photolithography and etching are performed after the deposition. Thus, the first-layer gate electrode and the wiring 2 are formed. The first-layer gate electrode and wiring 2
Is a mixed acid type etching solution containing at least nitric acid and phosphoric acid (nitric acid: acetic acid: phosphoric acid: water = 5: 20: 6).
0:15).

Next, a molybdenum (Mo) film having a thickness of 500 angstroms is deposited on the first-layer gate electrode and wiring 2 so as to cover the first-layer gate electrode and wiring 2, and further, On this molybdenum film, a molybdenum (Mo) / tantalum (Ta) alloy film having a high chemical resistance and a high melting point is laminated to a thickness of 500 angstroms, and the gate electrode of the second layer and the wiring 3 and the third layer are formed. The gate electrode and the wiring 16 are simultaneously formed. Then, the gate electrode and wiring 2 of the first layer, the gate electrode and wiring 3 of the second layer, and the gate electrode and wiring 16 of the third layer form a gate electrode and wiring 4. In addition,
Etching of the gate electrode and wiring 3 of the second layer and the gate electrode and wiring 16 of the third layer is carried out by carbon tetrachloride (C
Simultaneously by the plasma etching method using F ₄ ) gas.

Further, the glass substrate 1 is set to 430 ° C., and thermal CVD (Chemical Vapor) is applied on the gate electrode and the wiring 4.
Deposition) method for silicon oxide film (SiOx) 5
Is deposited to a thickness of 3500 angstroms. After this, a silicon nitride film (SiN
x) 6 is sequentially deposited to a thickness of 500 Å, the semiconductor film 8 made of an amorphous silicon film is deposited to a thickness of 500 Å, and the etching stopper layer 9 made of a silicon nitride film is deposited to a thickness of 2000 Å. Then, after etching the etching stopper layer 9, plasma CV
The ohmic contact layer 10 is deposited to a thickness of 500 angstroms by the D method, and the three layers of the silicon nitride film 6, the semiconductor film 8 and the ohmic contact layer 10 are patterned into an island shape. The gate insulating film 7 is composed of a composite film of the silicon oxide film 5 and the silicon nitride film 6.

Further, ITO (Indium Tin) is formed on the silicon oxide film 5 on which the silicon nitride film 6 is not formed.
Oxide) pixel electrode 11 is formed.

Then, one ohmic contact layer 10
A two-layer film of a molybdenum film and an aluminum film is deposited thereon by a sputtering method to a thickness of 4500 Å,
A source electrode 12 whose one end is connected to the pixel electrode 11 is patterned, and a drain electrode 13 is formed on the other. Further, by using the same resist pattern as that used for the source electrode 12 and the drain electrode 13, the ohmic contact layer 10 is etched and separated, and the ohmic contact layer 10 on one side and the ohmic contact layer 10 on the other side are separated. Are electrically separated from each other to form a source region and a drain region, which are used as a source electrode 12 and a drain electrode 13, respectively.

Further, a protective film 14 of a silicon nitride film is deposited to form a thin film transistor 15 to form a thin film transistor array.

According to the above embodiment, the first aluminum
By forming the gate electrode and the wiring 2 of the layer and the gate electrode and the wiring 3 of the second layer of molybdenum separately by etching, formation of the insect bite-like pattern is prevented.

When the silicon oxide film 5 is formed,
Even if the temperature of the glass substrate 1 is raised to 430 ° C., the swelling of the gate electrode of the first layer of aluminum and the wiring 2 can be prevented by the stress relaxation action of the gate electrode of the second layer of molybdenum and the wiring 3.

Further, since the gate electrode and the wiring 2 of the first layer of aluminum are covered with the gate electrode and the wiring 16 of the third layer having high chemical resistance, the gate electrode and the wiring 4 are formed.
With low resistance, chemical resistance can be strengthened.

In the above embodiment, aluminum is used for the gate electrode of the first layer and the wiring 2, but Al-
Si (1 wt.%)-Cu (5 wt.%) Or Al-T
The same effect can be obtained by using an aluminum alloy of a (12 wt.%).

Further, the gate electrode of the first layer of aluminum and the wiring 2 are not limited to wet etching using an etching solution, but may be performed by dry etching.

[0027]

According to the array substrate for a liquid crystal display device of the present invention, the swelling of the aluminum or aluminum alloy of the first layer due to the heat when forming the gate insulating film is caused by the stress relaxation action of the molybdenum of the second layer. Prevents the first layer of aluminum or aluminum alloy and the second layer of molybdenum
Since the layer and the layer are etched separately, it is possible to prevent the pattern electrode of the gate electrode and the wiring from being eaten by insects.
Since the aluminum of the first layer is covered with the high melting point metal film of the third layer having excellent chemical resistance, it is possible to obtain a gate electrode and wiring having low resistance and excellent chemical resistance.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing the structure of an embodiment of an array substrate for a liquid crystal display device of the present invention.

FIG. 2 is a cross-sectional view showing a structure of a conventional array substrate for a liquid crystal display device.

[Explanation of symbols]

 1 Glass Substrate as Insulating Substrate 2 First Layer 3 Second Layer 4 Gate Electrode and Wiring 7 Gate Insulating Film 8 Semiconductor Film 12 Source Electrode 13 Drain Electrode 15 Thin Film Transistor 16 Third Layer

Claims (1)

[Claims] 1. A gate electrode and a wiring formed on an insulating substrate, a semiconductor film formed on the gate electrode via a gate insulating film, and a source electrode and a drain formed in contact with the semiconductor film. In an array substrate for a liquid crystal display device including a thin film transistor having an electrode, at least a part of the gate electrode and the wiring is a first layer formed by etching with one of aluminum and an aluminum alloy, and on the first layer A second layer made of molybdenum and formed separately from the first layer so as to cover the first layer, and a second layer made of a refractory metal film excellent in chemical resistance formed on the second layer. An array substrate for a liquid crystal display device, comprising: three layers.