JPH0766414A - Manufacture of thin-film transistor - Google Patents

Abstract

PURPOSE:To obtain a thin-film transistor excellent in characteristics wherein a leak current is small when the transistor is turned OFF. CONSTITUTION:A first polycrystalline silicon film 2 is formed on a glass substrate 1, and a gate insulating film 3 is patterned on the film 2. A second polycrystalline silicon film 4 is formed on the first polycrystalline silicon film 2 and the gate insulating film 3. Ions are implanted in the second polycrystalline silicon film 4 with an acceleration voltage and a dosage wherein the ions do not reach the first polycrystalline silicon film 2. The second polycrystalline silicon film 4 is used as a diffusion source, and ions are diffused in the first polycrystalline silicon film 2. Thereby impurity diffusion regions 6, 7 are formed, and then the second polycrystalline silicon film 4 is worked as a gate electrode 5.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor (Thin Film) used as a control element of a liquid crystal display device, for example.
Film Transistor: hereinafter referred to as TFT).

[0002]

2. Description of the Related Art In LCDs as liquid crystal devices, the development of a simple matrix system to an active matrix system has become popular in recent years. The active matrix system includes a TFT type in which a thin film transistor is attached to each pixel and a diode type in which a non-linear diode is attached. Among them, the TFT type holds the voltage applied during the selection period until the next scanning by utilizing its switching characteristic and pixel capacitance, and it is possible to easily obtain high contrast and halftone with a large capacitance. it can.

T using polycrystalline silicon as an active layer
The structure of the FT is as shown in FIG. 3 simply. A polycrystalline silicon film is formed on a quartz glass substrate, and a gate electrode is formed on the polycrystalline silicon film via a gate oxide film. Source and drain electrodes are formed in the polycrystalline silicon on both sides. This sauce,
To form the drain electrode, Jpn.J.Phys.Vol.31 (199
2) Ion implantation technology as described in pp.206-209 Part 1, No.2A, February 1992 and Japanese Journal of Ap.
plied Physics Vol.29, No.12, December, 1990, pp.L237
As described in 0-L2372, an ion doping method has been proposed in which mass spectrometry of ions is not performed in order to cope with an increase in size of a display.

In these techniques, for example, in FIG. 3, the gate electrode 11 is used as a mask and an acceleration voltage of 100 KeV and a dose are applied in the polycrystalline silicon film 13 through the silicon oxide film 12 (which is later processed as a gate oxide film). Quantity 3 × 1
Phosphorus (P) is implanted at 0 ¹⁵ cm ^-2 , and then heat treatment is performed to activate the impurities. 14 is a quartz glass substrate.

[0005]

In the method of directly implanting ions into the active layer (polycrystalline silicon film) as in the conventional example, the implanted polycrystalline silicon is likely to become amorphous. . For example, when phosphorus is implanted, a dose amount of 6 × 10 ¹⁴ cm ⁻² is obtained, and when arsenic (As) is implanted, amorphous silicon is obtained at a dose amount of 2 × 10 ¹⁴ cm ⁻² .

This amorphous silicon is recovered in the heat treatment step after ion implantation and becomes polycrystalline silicon again. In this way, when the amorphous material is once polycrystallized,
Defects are likely to occur near the boundary between the source / drain region and the channel region. In the TFT type LCD having such a defect, there is a problem that a leakage current is generated during a so-called TFT OFF period in which the applied voltage is held.

The present invention relates to a method of manufacturing a thin film transistor, and solves such a problem.

[0008]

According to the method of manufacturing a thin film transistor of the present invention, a first polycrystalline silicon film is formed on an insulating substrate, and a gate insulating film is patterned on the first polycrystalline silicon film to form the first polycrystalline silicon film. Second on the film and the gate insulating film
A polycrystalline silicon film is formed, and ions of an accelerating voltage and a dose amount that do not reach the first polycrystalline silicon film are implanted into the second polycrystalline silicon film. The silicon film is used as a diffusion source to supply the ions to the first
Is diffused into the polycrystalline silicon film to form an impurity diffusion region, and then the second polycrystalline silicon film is processed as a gate electrode.

[0009]

In other words, the ions implanted into the second polycrystalline silicon film are gradually diffused into the first polycrystalline silicon film to form the impurity diffusion region in the first polycrystalline silicon film. However, this portion will not become amorphous. Therefore, a good impurity active region (source / drain region) can be obtained by the subsequent heat treatment step.

[0010]

EXAMPLE An example of the present invention will be described with reference to FIG.
FIG. 1 is a cross-sectional view showing a process for producing the thin film transistor of the present invention. In FIG. 1A, the temperature is set to 670 ° C. on the insulating substrate 1 such as quartz glass by the low pressure CVD method.
Then, a 600 Å first polycrystalline silicon film 2 is formed, and a 1000 Å silicon oxide film is further formed on the first polycrystalline silicon film 2 at a temperature of 880 ° C. by a low pressure CVD method. This is patterned as the gate oxide film 3 by using the lithography technique and the etching technique.

Next, referring to FIG. 1B, a temperature of 67 is applied to the entire surface of the substrate including the gate oxide film 3 by a low pressure CVD method.
The second polycrystalline silicon film 4 of 3000 Å is formed at 0 ° C. After that, phosphorus (P) ions are accelerated by an ion implantation method at an acceleration voltage of 50 KeV and a dose of 5 × 10 ¹⁵ cm.
^{At -2,} it is implanted into the second polycrystalline silicon film 4. Since the second polycrystalline silicon film 4 has a film thickness of 3000 Å, the ions do not reach the inside of the first polycrystalline silicon film 2 with the ion energy having the above value.

The relationship between the second polycrystalline silicon film 4 and the ion implantation energy may be adjusted appropriately depending on the shape and size of the device at that time. Further, in FIG. 1C, when the substrate is placed in a heat treatment apparatus in this state and heat treatment is performed at a temperature of 900 ° C. for 60 minutes in a nitrogen atmosphere, phosphorus ions in the second polycrystalline silicon film 4 are activated. At the same time, phosphorus ions gradually diffuse from the contact interface with the first polycrystalline silicon film 2 into the first polycrystalline silicon film 2 to form the impurity diffusion regions 6 and 7, which are performed simultaneously. The impurity diffusion region 6,
7 is also activated, and the source, on both sides of the gate oxide film 3,
A drain region is formed.

After that, the second polycrystalline silicon film 4 is patterned by using a lithography technique and a dry etching technique to leave the second polycrystalline silicon film 4 on the gate oxide film 3 and a gate electrode. Process as 5. FIG. 2 shows the gate voltage (Vg) -drain current (Id) characteristics of the thin film transistor of this embodiment. It can be seen that Vg is negatively biased, that is, the Id when the transistor is off, that is, the leakage current is lower than the leakage current of the thin film transistor manufactured by the conventional method.

Furthermore, since Vg is a positive bias, that is, the Id when the transistor is ON is the same as that in the conventional case, as a result, the ON / OFF ratio of the drain current is increased. Therefore, it is possible to obtain a liquid crystal display device having a high contrast and a highly reliable display element. In addition to this, in the present embodiment, the following effects can be obtained.

(1) The TFT device has a characteristic that the leakage current increases as the temperature rises. However, since the TFT of this embodiment originally has a small leakage current, the temperature rises slightly. Can withstand enough. (2) As shown in FIG. 1B, since ion implantation is performed with the second polycrystalline silicon 4 deposited on the entire surface of the substrate, charge-up due to ions can be prevented.

[0016]

According to the method of manufacturing a thin film transistor of the present invention, it is possible to provide an element having a small leakage current and a good characteristic when the transistor is off.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a manufacturing process of a thin film transistor in an example of the present invention.

FIG. 2 is a gate current-drain current characteristic diagram of a thin film transistor according to an embodiment of the present invention.

FIG. 3 is a cross-sectional view of a thin film transistor in a conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Insulating substrate 2 First polycrystalline silicon film 3 Gate insulating film 4 Second polycrystalline silicon film 5 Gate electrode 6, 7 Impurity diffusion region

Claims (1)

[Claims] 1. A first polycrystalline silicon film is formed on an insulating substrate, a gate insulating film is patterned thereon, and a second polycrystalline film is formed on the first polycrystalline silicon film and the gate insulating film. A silicon film is formed, and an ion having an acceleration voltage and a dose amount that does not reach the first polycrystalline silicon film is implanted into the second polycrystalline silicon film to form the second polycrystalline silicon film. As a diffusion source, the ions are diffused into the first polycrystalline silicon film to form an impurity diffusion region, and then the second polycrystalline silicon film is processed as a gate electrode to manufacture a transistor. .