JPH0749804Y2 - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPH0749804Y2
JPH0749804Y2 JP10618488U JP10618488U JPH0749804Y2 JP H0749804 Y2 JPH0749804 Y2 JP H0749804Y2 JP 10618488 U JP10618488 U JP 10618488U JP 10618488 U JP10618488 U JP 10618488U JP H0749804 Y2 JPH0749804 Y2 JP H0749804Y2
Authority
JP
Japan
Prior art keywords
semiconductor chip
chip
tape carrier
pad
polyimide film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP10618488U
Other languages
English (en)
Japanese (ja)
Other versions
JPH0227746U (US07847105-20101207-C00016.png
Inventor
政仁 谷口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10618488U priority Critical patent/JPH0749804Y2/ja
Publication of JPH0227746U publication Critical patent/JPH0227746U/ja
Application granted granted Critical
Publication of JPH0749804Y2 publication Critical patent/JPH0749804Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Wire Bonding (AREA)
JP10618488U 1988-08-11 1988-08-11 半導体装置 Expired - Lifetime JPH0749804Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10618488U JPH0749804Y2 (ja) 1988-08-11 1988-08-11 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10618488U JPH0749804Y2 (ja) 1988-08-11 1988-08-11 半導体装置

Publications (2)

Publication Number Publication Date
JPH0227746U JPH0227746U (US07847105-20101207-C00016.png) 1990-02-22
JPH0749804Y2 true JPH0749804Y2 (ja) 1995-11-13

Family

ID=31339468

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10618488U Expired - Lifetime JPH0749804Y2 (ja) 1988-08-11 1988-08-11 半導体装置

Country Status (1)

Country Link
JP (1) JPH0749804Y2 (US07847105-20101207-C00016.png)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5644103A (en) * 1994-11-10 1997-07-01 Vlt Corporation Packaging electrical components having a scallop formed in an edge of a circuit board
JP4961215B2 (ja) * 2007-01-09 2012-06-27 パナソニック株式会社 パワーデバイス装置
WO2014065288A1 (ja) * 2012-10-22 2014-05-01 株式会社ユーシン ドアロックアクチュエータ、部品実装構造、及び部品実装方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63131561A (ja) * 1986-11-18 1988-06-03 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン 電子パツケージ

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63131561A (ja) * 1986-11-18 1988-06-03 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン 電子パツケージ

Also Published As

Publication number Publication date
JPH0227746U (US07847105-20101207-C00016.png) 1990-02-22

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