JPH0749798Y2 - Ｍｏｓ集積回路 - Google Patents

Ｍｏｓ集積回路

Info

Publication number
JPH0749798Y2
JPH0749798Y2 JP865988U JP865988U JPH0749798Y2 JP H0749798 Y2 JPH0749798 Y2 JP H0749798Y2 JP 865988 U JP865988 U JP 865988U JP 865988 U JP865988 U JP 865988U JP H0749798 Y2 JPH0749798 Y2 JP H0749798Y2
Authority
JP
Japan
Prior art keywords
integrated circuit
diffusion layer
mos integrated
bonding pad
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP865988U
Other languages
English (en)
Japanese (ja)
Other versions
JPH01113366U (US07655688-20100202-C00109.png
Inventor
純一 大森
Original Assignee
日本電気アイシーマイコンシステム株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気アイシーマイコンシステム株式会社 filed Critical 日本電気アイシーマイコンシステム株式会社
Priority to JP865988U priority Critical patent/JPH0749798Y2/ja
Publication of JPH01113366U publication Critical patent/JPH01113366U/ja
Application granted granted Critical
Publication of JPH0749798Y2 publication Critical patent/JPH0749798Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05075—Plural internal layers
    • H01L2224/0508—Plural internal layers being stacked
    • H01L2224/05085—Plural internal layers being stacked with additional elements, e.g. vias arrays, interposed between the stacked layers
    • H01L2224/05089—Disposition of the additional element
    • H01L2224/05093—Disposition of the additional element of a plurality of vias
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05556—Shape in side view

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP865988U 1988-01-25 1988-01-25 Ｍｏｓ集積回路 Expired - Lifetime JPH0749798Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP865988U JPH0749798Y2 (ja) 1988-01-25 1988-01-25 Ｍｏｓ集積回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP865988U JPH0749798Y2 (ja) 1988-01-25 1988-01-25 Ｍｏｓ集積回路

Publications (2)

Publication Number Publication Date
JPH01113366U JPH01113366U (US07655688-20100202-C00109.png) 1989-07-31
JPH0749798Y2 true JPH0749798Y2 (ja) 1995-11-13

Family

ID=31214733

Family Applications (1)

Application Number Title Priority Date Filing Date
JP865988U Expired - Lifetime JPH0749798Y2 (ja) 1988-01-25 1988-01-25 Ｍｏｓ集積回路

Country Status (1)

Country Link
JP (1) JPH0749798Y2 (US07655688-20100202-C00109.png)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103972206A (zh) * 2013-02-06 2014-08-06 精工电子有限公司 半导体装置

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103972206A (zh) * 2013-02-06 2014-08-06 精工电子有限公司 半导体装置
JP2014154640A (ja) * 2013-02-06 2014-08-25 Seiko Instruments Inc 半導体装置
CN103972206B (zh) * 2013-02-06 2019-01-25 艾普凌科有限公司 半导体装置

Also Published As

Publication number Publication date
JPH01113366U (US07655688-20100202-C00109.png) 1989-07-31

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