JPH074915B2 - Method for manufacturing multilayer wiring board - Google Patents

Description

Detailed Description of the Invention [Industrial applications]

TECHNICAL FIELD The present invention relates to a method for manufacturing a multilayer wiring board in which circuits are provided in multiple layers.

[Prior art]

The multilayer wiring board A is produced by laminating the outer layer circuit material 4 on the inner layer circuit board 2. That is, the inner layer circuit 1 on the surface
The outer layer circuit material 4 is superposed on the inner layer circuit board 2 formed with the plurality of prepregs 3 interposed therebetween, and the outer layer circuit material 4 is laminated by heating and pressing. As the outer layer circuit material 4, an outer layer circuit board on which an outer layer circuit is formed or a metal foil such as a body foil is used. When a metal foil is used as the outer layer circuit material 4, the outer layer circuit is formed by finishing such as etching.

[Problems to be Solved by the Invention]

However, in the multilayer wiring board A thus produced, since the inner layer circuit 1 is provided so as to project from the surface of the inner layer circuit board 2, the outer layer is formed on the inner layer circuit board 2 via the adhesive layer 3. At the time of stacking the circuit material 4, it is difficult for air to escape from the side surface portion of the inner layer circuit 1, and as shown in FIG. 3, voids 10 may be generated by the trapped air. When the void 10 is generated in the multilayer wiring board A as described above, the void 10 swells at the time of soldering to cause delamination, and the plating liquid permeates when the circuit is formed on the outer layer circuit material 4, and the electrode is not used during use. Various problems occur such that corrosion occurs and the insulation performance deteriorates. Such a problem occurs particularly frequently in the continuous molding method in which the outer layer circuit material 4 cannot be laminated with a high pressure. The present invention has been made in view of the above points, and an object of the present invention is to provide a method for manufacturing a multilayer wiring board that can reduce the occurrence of voids.

[Means for Solving the Problems]

According to the method for manufacturing a multilayer wiring board according to the present invention, a plurality of prepregs 3a, 3 are provided on the inner layer circuit board 2 having the inner layer circuit 1 formed on the surface thereof.
When laminating the outer layer circuit material 4 on the inner layer circuit board 2 by stacking the outer layer circuit material 4 via the b and heat-molding the outer layer circuit material 4, the plurality of prepregs 3a and 3b are provided outside the inner layer circuit board 2. The resin used for forming the prepreg 3a has a curing speed lower than that of the resin forming the inner prepreg 3b.

[Action]

According to the present invention, as the plurality of prepregs 3a, 3b for laminating the outer layer circuit material 4 on the inner layer circuit board 2, the resin forming the outer prepreg 3a has a curing rate on the inner side with respect to the inner layer circuit board 2. The outer prepreg 3a starts to cure more slowly than the inner prepreg 3b in contact with the inner layer circuit board 2 by using a resin made of a resin that is slower than the curing speed of the resin forming the prepreg 3b. Becomes
The inner layer circuit 1 is formed by the cushioning action of the outer prepreg 3a.
It is possible to prevent the occurrence of voids in this portion by filling the resin on the side surface portion of.

【Example】

Hereinafter, the present invention will be described in detail with reference to examples. The inner layer circuit board 2 includes, for example, a plurality of prepregs prepared by impregnating a base material such as glass cloth with a thermosetting resin varnish such as an epoxy resin and drying the prepreg, and at the same time, copper is provided on one or both outer surfaces of the prepreg. By stacking metal foils such as foils, heating and pressurizing the foils to form a metal foil-clad laminate, and etching the metal foils of the laminates to form the inner layer circuit 1, It can be manufactured. Therefore, in this inner layer circuit board 2, the inner layer circuit 1 is provided so as to project to the surface of the inner layer circuit board 2. A multilayer wiring board can be manufactured by laminating the outer layer circuit material 4 on the surface of the thus formed inner layer circuit board 2 via a plurality of prepregs 3a and 3b. Here, as the outer layer circuit material 4, a metal foil such as a copper foil, or an outer layer circuit board on which an outer layer circuit is formed similarly to the inner layer circuit board 2 can be used. Also, the prepregs 3a, 3b can be made as described above, but this plurality of prepregs 3a, 3b
b is an outer prepreg 3a with respect to the inner circuit board 2
A resin formed by using a resin having a slower curing speed than the resin constituting the inner prepreg 3b is used. For example, as in the embodiment of FIG. 1, two prepregs 3a, 3b are formed on the surface of the inner layer circuit board 2.
When the outer layer circuit material 4 is layered via the prepreg and is laminated and molded, the outer prepreg 3a is adjusted so that the curing speed of the impregnated resin is slower than the curing speed of the resin impregnated in the inner prepreg 3b. To do. The difference in the curing speed is preferably set such that the gel time at 160 ° C. is longer by 30 to 120 seconds in the outer prepreg 3a than in the inner prepreg 3b. Prepreg 3 like this
To give different curing rates to a and 3b resins, make adjustments by making different compositions of resins and curing agents, or making different adjustments to the heating and drying conditions when making prepregs 3a and 3b. This can be done by any method, and the method is arbitrary. For example, when making prepregs 3a and 3b by impregnating glass cloth with epoxy resin varnish and heating and drying, when the epoxy resin varnish has a gel time of 200 seconds at 160 ° C, heat and dry at 170 ° C for 5 minutes. Then,
A prepreg 3a having a gel time of 120 seconds can be prepared, and a prepreg 3b having a gel time of 50 seconds can be prepared by heating at 170 ° C. for 5.5 minutes and drying. In this way, the outer layer circuit material 4 is superposed on the surface of the inner layer circuit board 2 via the plurality of prepregs 3a and 3b, and this is heated and
In laminating the outer layer circuit material 4 on the inner layer circuit board 2 through the prepregs 3a, 3b by pressurizing and laminating, if the curing speed of the plurality of prepregs 3a, 3b is the same, heating is performed on the outer prepreg. Outer prepreg 3a to act on 3a first
However, it is difficult to fill the side surface of the inner layer circuit 1 protruding from the surface of the inner layer circuit board 2 with the resin that melts and flows out from the inner prepreg 3b by using the outer prepreg 3a as a cushion. In the present invention, since the curing speed of the outer prepreg 3a is set to be slower than the curing speed of the inner prepreg 3b, the outer prepreg 3a starts to cure slower than the inner prepreg 3b, and thus the outer prepreg 3a. Inner prepreg by cushioning action of 3a
The resin that melts and flows out from 3b can be filled in the side surface portion of the inner layer circuit 1, and it is possible to prevent air from remaining in this portion and generating a void. In the embodiment shown in FIG. 2, long strips are used as the prepregs 3a and 3b, and long strips of metal foil are used as the outer layer circuit material 4, and the outer layer circuit material 4 is laminated by a continuous method. . That is, the prepregs 3a and 3b and the outer layer circuit material 4 are respectively fed and continuously fed.
The outer layer circuit material 4 is superposed on the surface of the inner layer circuit board 2 via 3a, 3b, and is passed through a heated forming roll 12 to be heated and pressed, whereby the prepregs 3a, 3b are applied to the inner layer circuit board 2 in a continuous flow. The outer layer circuit material 4 can be laminated via the. When the outer layer circuit material 4 is laminated by the continuous method as described above, it is difficult to expel air because it cannot pressurize with a large pressure, and a void is apt to occur, but as in the present invention, the outer prepreg 3a is used. By using a material having a curing speed slower than that of the inner prepreg 3b, it becomes possible to eliminate the occurrence of voids even in the continuous construction method. By the way, in the multilayer wiring board manufactured by the conventional method, 1 to 3 voids are generated in the area of 10 cm × 10 cm, and the solder heat resistance test (D-2 / 100, 260 ° C, 30 seconds condition) is performed. Although delamination occurred, in the multilayer wiring board manufactured by the method of the present invention, the number of voids was 0, and delamination did not occur.

【The invention's effect】

As described above, in the present invention, the outer layer circuit material is overlaid on the inner layer circuit board having the inner layer circuit formed on the surface thereof via the plurality of prepregs, and the outer layer circuit material is heat-molded to form the outer layer circuit material on the inner layer circuit board. When laminating, the one prepared by using, as the above-mentioned plurality of prepregs, one in which the curing speed of the resin forming the outer prepreg is slower than that of the resin forming the inner prepreg with respect to the inner layer circuit board. Therefore, even if heat is applied to the outer prepreg first when heat-molding, the outer prepreg will start to be slower to cure than the inner prepreg in contact with the inner layer circuit board, The cushioning action of this outer prepreg allows the side surface of the inner layer circuit to be filled with resin satisfactorily, and the occurrence of voids in this portion can be reduced. That.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view of an embodiment of the present invention, FIG. 2 is a schematic view showing the above continuous process, and FIG. 3 is a cross-sectional view of a conventional multilayer wiring board. 1 is an inner layer circuit, 2 is an inner layer circuit board, 3a and 3b are prepregs,
4 is an outer layer circuit material.

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Claims (1)

[Claims] 1. When laminating an outer layer circuit material on an inner layer circuit board by stacking an outer layer circuit material on an inner layer circuit board having an inner layer circuit formed on a surface thereof through a plurality of prepregs and heat-molding the outer layer circuit material, As a plurality of prepregs, it is preferable to use a prepreg that is made by using one in which the curing speed of the resin forming the outer prepreg is slower than that of the resin forming the inner prepreg with respect to the inner layer circuit board. And a method for manufacturing a multilayer wiring board.