JPH0448796A - Manufacture of multilayer interconnection board - Google Patents
Manufacture of multilayer interconnection boardInfo
- Publication number
- JPH0448796A JPH0448796A JP15801690A JP15801690A JPH0448796A JP H0448796 A JPH0448796 A JP H0448796A JP 15801690 A JP15801690 A JP 15801690A JP 15801690 A JP15801690 A JP 15801690A JP H0448796 A JPH0448796 A JP H0448796A
- Authority
- JP
- Japan
- Prior art keywords
- layer circuit
- circuit board
- inner layer
- board
- outer layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 6
- 239000010410 layer Substances 0.000 claims abstract description 119
- 239000000463 material Substances 0.000 claims abstract description 31
- 239000012790 adhesive layer Substances 0.000 claims abstract description 18
- 238000010438 heat treatment Methods 0.000 claims description 9
- 238000003475 lamination Methods 0.000 claims description 5
- 238000000465 moulding Methods 0.000 claims description 5
- 238000003825 pressing Methods 0.000 claims description 3
- 238000000034 method Methods 0.000 abstract description 9
- 239000011347 resin Substances 0.000 abstract description 6
- 229920005989 resin Polymers 0.000 abstract description 6
- 230000009477 glass transition Effects 0.000 abstract description 3
- 239000002184 metal Substances 0.000 description 6
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000011888 foil Substances 0.000 description 5
- 238000010030 laminating Methods 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 239000011889 copper foil Substances 0.000 description 3
- 230000032798 delamination Effects 0.000 description 3
- 238000011437 continuous method Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
Landscapes
- Laminated Bodies (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
本発明は、回路を多層に設けた多層配線板の製造方法に
関するものである。The present invention relates to a method for manufacturing a multilayer wiring board in which circuits are provided in multiple layers.
多層配線板Aは内層回路板2に外層回路材4を積層する
ことによって作成される。すなわち、表面に内層回路1
を設けて形成される内層回路板2の表面にプリプレグ等
の接着層3を介して外層回ことによって作成されるもの
である。外層回路材4としては外層回路が形成された外
層回路板あるいは銅箔などの金属管等が用いられる。The multilayer wiring board A is created by laminating an outer layer circuit material 4 on an inner layer circuit board 2. In other words, the inner layer circuit 1 is on the surface.
It is created by attaching an outer layer to the surface of an inner layer circuit board 2 with an adhesive layer 3 such as prepreg interposed therebetween. As the outer layer circuit material 4, an outer layer circuit board on which an outer layer circuit is formed, a metal tube such as a copper foil, or the like is used.
【発明が解決しようとする創1
しかしこのようにして作成される多層配線板Aにあって
、内層回路1は内層回路板2の表面から突出した状態で
設けられているために、内層回路板2に接着層3を介し
て外層回路材4を積層するに際して内層回路1の側面部
の空気が抜は難く、第4図に示すようにこの閉じ込めら
れた空気でボイド10が発生するおそれがある。
そしてこのように多層配線板Aにボイド10が発生する
と半田付は時にボイド10が膨らんでデラミネーシaン
(剥離)が発生し、また外層回路材4に回路形成する際
にメツキ液が染み込んで使用時に電食が発生し、絶縁性
能が劣化するという種々の問題が生じるものである。こ
のような問題は、高い加圧力で外層回路材4を積層する
ことがでかない連続成形工法において、特に多発するも
のであった。
本発明は上記の点に鑑みて為されたものであり、ボイド
の発生を低減することができる多層配線板の製造方法を
提供することを目的とするものである。
【課題を解決するための手段】
本発明に係る多層配線板の製造方法は、表面に内層回路
1が形成された内層回路板2を加熱・加圧することによ
って内層回路1を内層回路板2の表面部内に押し込み、
次いでこの内層回路板2の表面に接着層3を介して外層
回路材4を重ね、積層成形することを特徴とするもので
ある。Problem to be Solved by the Invention 1 However, in the multilayer wiring board A produced in this way, since the inner layer circuit 1 is provided in a state protruding from the surface of the inner layer circuit board 2, the inner layer circuit board When the outer layer circuit material 4 is laminated on the inner layer circuit 1 through the adhesive layer 3, it is difficult to remove the air from the side surface of the inner layer circuit 1, and as shown in FIG. 4, this trapped air may cause voids 10. . When voids 10 occur in the multilayer wiring board A in this way, the voids 10 sometimes bulge during soldering and delamination (peeling) occurs, and when forming circuits on the outer layer circuit material 4, the plating liquid seeps into the board and the soldering process becomes difficult. This sometimes causes various problems such as electrolytic corrosion and deterioration of insulation performance. Such problems occur particularly frequently in continuous molding methods in which the outer layer circuit material 4 cannot be laminated with high pressure. The present invention has been made in view of the above points, and an object of the present invention is to provide a method for manufacturing a multilayer wiring board that can reduce the occurrence of voids. [Means for Solving the Problems] A method for manufacturing a multilayer wiring board according to the present invention is to heat and pressurize an inner layer circuit board 2 on which an inner layer circuit 1 is formed. Push it into the surface,
Next, an outer layer circuit material 4 is stacked on the surface of this inner layer circuit board 2 via an adhesive layer 3, and lamination molding is performed.
本発明にあっては、内層回路板2を加熱・加圧すること
によって内層回路1を内層回路板2の表面部内に押し込
むようにしているなめに、内層回路1を内層回路板2と
ほぼ面一にした状態で接着層3を介して外層回路材4を
積層することができ、突出する内層回路1の側面部と接
着層3との間に空気がとじ込められた状態で外層回路材
4の積層がなされるようなことがなくなる。
K実施例】
以下本発明を実施例によって詳述する。
内層回路板2は、例えば、ガラス布等の基材にエポキシ
!M脂等の熱硬化性樹脂フェスを含浸して乾燥すること
によって調製した複数枚のプリプレグを重ねると共に、
この片側もしくは両側の外面に銅箔等の金属箔を重ね、
これを加熱加圧して積層成形することによって會属笛張
り積層板を作成し、そしてこの積層板の金属箔にエツチ
ング加工等して内層回路1を形成することによって、製
造することができる。この内層回路板2において内層回
路1は内層回路板2の表面に突出するように設けられて
いる。
次にこの内層回路板2を加熱する。加熱温度は内層回路
板2を構成する樹脂のガラス転移温度以上に設定するの
が好ましい。そしてこのように加熱しながら内層回路板
2を第1図に示すように加圧ロール11.11間に通し
て内層回路板2の表面を加圧することによって、内層回
路板2の表面部に内層回路1をめり込ませるようにして
押し込む、内層回路板2を樹脂のプラス転移温度以上に
加熱することによって、容易に内層回路1を内層回路板
2の表面部−二押し込んで、内層回路1の表面と内層回
路板2の表面とを面一に均すことができる。加熱に要す
る温度があまり高くならないように、内層回路板2を構
成する樹脂はプラス転移温度が120℃以下になるよう
に調製するのが好ましく、内層回路板2の積層成形条件
を例えば130−140℃、20−50 kg/ cs
+2.20〜40分の条件に設定することによって、ガ
ラス転移温度を120℃以下に調整することが可能であ
る。
そして、内層回路板2の加熱温度は140〜150℃の
SSに、内層回路1を押し込む際の加圧力は20〜50
kg/cm”の範囲に、加圧時開は5〜10分間のlI
!囲にそれぞれ設定するのがよい、尚、加圧は第1図に
示すような加圧a−ル11を用いる他、内層回路板2を
プレート闇にはさんで通常のプレス装置で圧縮すること
によっておこなうこともできる。
上記のようにして内層回路1を内層回路板2の表面部に
押し込んで面一にした後に、内層回路板2の表面に接着
層3を介して外層回路材4を積層することによって、多
層配線板Aを作成することができる。ここで、接着層3
としては既述したと同様なプリプレグを用いることがで
き、また外層回路材4としては銅箔等の金属箔や、内層
回路板2と同様にして外層回路を形成した外層回路板を
用いることができる。
第2図の実施例では、接着層3として長尺帯状のプリプ
レグを、外層回路材4として長尺帯状の金属箔をそれぞ
れ用い、連続工法で外層回路材4の積層をおこなうよう
にしている。すなわち、接着層3と外層回路材4をそれ
ぞれ繰り呂して連続して送りつつ接着層3を介して内層
回路板2の表面に外層回路材4を重ね、これを加熱され
た成形ロール12に通して加熱加圧することによって、
連続した流れで内層回路板2に接着層3を介して外層回
路材4を積層することができるものである。
このようにして第3図に示すような、内層回路板2に外
層回路材4を積層した多層配線板Aを得ることができ、
外層回路材4として金属箔を用いる場合にはエツチング
等の加工をして回路形成することで外層回路を形成する
ことによって、仕上げることができる。ここで、内層回
路1は押し込まれて内層回路板2の表面とほぼ面一にな
った状態で外層回路材4の積層がおこなわれるために、
内層回路板2の表面から突出する内層回路1の側面部と
接着層3との間に空気がとじ込められた状態で外層回路
材4の積層がなされるようなことがなくなるものであり
、ボイドのない多層配線板Aを製造することが可能にな
るものである。特に第2図のような連続工法で外層回路
材4を積層する場合には、大きな圧力で加圧することが
できないために空気を追い出すことが難しくボイドが発
生し易いが、内層回路1を内層回路板2の表面とばは面
一にした状態で外層回路材4の積層をおこなうことによ
って、連続工法においてもボイドの発生をなくすことが
可能になるものである。ちなみに、従来の方法で製造し
た多層配線板では、10cmX10c曽の範囲に1〜3
個のボイドが発生し、半田耐熱試験(D−2’100.
260℃、301+)条件)e オニ−t ’+とデラ
ミネーションが発生したが、本発明の方法で製造した多
層配線板では、ボイドの発生は0個であり、デラミネー
シヨンも発生しなかった。In the present invention, since the inner layer circuit 1 is pushed into the surface of the inner layer circuit board 2 by heating and pressurizing the inner layer circuit board 2, the inner layer circuit 1 is placed almost flush with the inner layer circuit board 2. In this state, the outer layer circuit material 4 can be laminated via the adhesive layer 3, and the outer layer circuit material 4 can be laminated with air trapped between the protruding side surface of the inner layer circuit 1 and the adhesive layer 3. This eliminates the need for lamination. K Example] The present invention will be described in detail below with reference to Examples. The inner layer circuit board 2 is made of, for example, epoxy on a base material such as glass cloth! Layering multiple sheets of prepreg prepared by impregnating and drying a thermosetting resin face such as M resin,
Layer metal foil such as copper foil on the outer surface of one or both sides,
It can be manufactured by laminating and molding this by heating and pressurizing it to create a laminate, and then etching the metal foil of this laminate to form the inner layer circuit 1. In this inner layer circuit board 2, the inner layer circuit 1 is provided so as to protrude from the surface of the inner layer circuit board 2. Next, this inner layer circuit board 2 is heated. The heating temperature is preferably set to a temperature higher than the glass transition temperature of the resin constituting the inner circuit board 2. Then, while heating the inner layer circuit board 2 as shown in FIG. By heating the inner layer circuit board 2 to a temperature higher than the positive transition temperature of the resin, the inner layer circuit 1 is easily pushed into the surface part of the inner layer circuit board 2, and the inner layer circuit 1 is pushed into the inner layer circuit board 2. The surface of the inner circuit board 2 can be made flush with the surface of the inner layer circuit board 2. In order to prevent the temperature required for heating from becoming too high, the resin constituting the inner layer circuit board 2 is preferably prepared so that its plus transition temperature is 120°C or lower, and the lamination molding conditions for the inner layer circuit board 2 are set to 130-140° C. ℃, 20-50 kg/cs
By setting the conditions to +2.20 to 40 minutes, it is possible to adjust the glass transition temperature to 120° C. or lower. Then, the heating temperature of the inner layer circuit board 2 is 140 to 150°C SS, and the pressing force when pushing the inner layer circuit 1 is 20 to 50°C.
kg/cm” range, the opening time is 5 to 10 minutes when pressurized.
! For pressurization, use a pressurizer 11 as shown in Fig. 1, or press the inner layer circuit board 2 between the plates and compress it with a normal press device. It can also be done by After the inner layer circuit 1 is pushed into the surface of the inner layer circuit board 2 to make it flush with the inner layer circuit 1 as described above, the outer layer circuit material 4 is laminated on the surface of the inner layer circuit board 2 with the adhesive layer 3 interposed therebetween. Plate A can be created. Here, adhesive layer 3
The same prepreg as described above can be used as the outer layer circuit material 4, and metal foil such as copper foil or an outer layer circuit board on which an outer layer circuit is formed in the same manner as the inner layer circuit board 2 can be used as the outer layer circuit material 4. can. In the embodiment shown in FIG. 2, a long strip-shaped prepreg is used as the adhesive layer 3, and a long strip-shaped metal foil is used as the outer layer circuit material 4, and the outer layer circuit material 4 is laminated by a continuous method. That is, while continuously feeding the adhesive layer 3 and the outer layer circuit material 4, the outer layer circuit material 4 is stacked on the surface of the inner layer circuit board 2 via the adhesive layer 3, and this is placed on the heated forming roll 12. By applying heat and pressure through
The outer layer circuit material 4 can be laminated onto the inner layer circuit board 2 via the adhesive layer 3 in a continuous flow. In this way, it is possible to obtain a multilayer wiring board A in which the outer layer circuit material 4 is laminated on the inner layer circuit board 2 as shown in FIG.
When a metal foil is used as the outer layer circuit material 4, finishing can be achieved by forming the outer layer circuit by processing such as etching to form the circuit. Here, since the inner layer circuit 1 is pushed in and is almost flush with the surface of the inner layer circuit board 2, the outer layer circuit material 4 is laminated.
This prevents the outer layer circuit material 4 from being laminated with air trapped between the side surface of the inner layer circuit 1 protruding from the surface of the inner layer circuit board 2 and the adhesive layer 3, and eliminates voids. This makes it possible to manufacture a multilayer wiring board A without any. In particular, when laminating the outer layer circuit material 4 using a continuous method as shown in Fig. 2, it is difficult to expel air and voids are likely to occur because large pressure cannot be applied. By laminating the outer layer circuit material 4 while keeping the surface of the board 2 flush, it is possible to eliminate voids even in a continuous construction method. By the way, in a multilayer wiring board manufactured by the conventional method, 1 to 3
The solder heat resistance test (D-2'100.
260°C, 301+) Conditions) e One-t'+ and delamination occurred, but in the multilayer wiring board manufactured by the method of the present invention, no voids were generated and no delamination occurred. .
上述のように本発明にあっては、内層回路板を加熱・加
圧することによって内層回路を内層回路板の表面部内に
押し込み、次いでこの内層回路板の表面に接着層を介し
て外層回路材を重ね、積層成形するようにしたので、内
層回路を内層回路板の表面とほぼ面一にした状態で接着
層を介して外層回路材を積層することができ、突出する
内層回路の側面部と接着層との間に空気がとじ込められ
た状態で外層回路材の積層がなされるようなことがな(
なるものであり、ボイドの発生を低減することができる
ものである。As described above, in the present invention, the inner layer circuit is pushed into the surface of the inner layer circuit board by heating and pressurizing the inner layer circuit board, and then the outer layer circuit material is applied to the surface of the inner layer circuit board via an adhesive layer. Since the inner layer circuit is overlapped and laminated, the outer layer circuit material can be laminated via the adhesive layer while the inner layer circuit is almost flush with the surface of the inner layer circuit board, and the side surface of the protruding inner layer circuit can be bonded. The outer layer circuit material should not be laminated with air trapped between the layers (
This makes it possible to reduce the occurrence of voids.
第1図は本発明の一実施例の内層回路の押し込みの工程
を示す概略図、第2図は同上の外層回路材の積層工程を
示す概略図、第3図は同上によって製造した多層配線板
の断面図、$4図は従来例の多層配線板の断面図である
。
1は内層回路、2は内層回路板、3は接着層、4は外層
回路材である。Fig. 1 is a schematic diagram showing the process of pressing the inner layer circuit according to an embodiment of the present invention, Fig. 2 is a schematic diagram showing the lamination process of the outer layer circuit material of the above, and Fig. 3 is a multilayer wiring board manufactured by the above. Figure $4 is a cross-sectional view of a conventional multilayer wiring board. 1 is an inner layer circuit, 2 is an inner layer circuit board, 3 is an adhesive layer, and 4 is an outer layer circuit material.
Claims (1)
加圧することによって内層回路を内層回路板の表面部内
に押し込み、次いでこの内層回路板の表面に接着層を介
して外層回路材を重ね、積層成形することを特徴とする
多層配線板の製造方法。(1) Heating the inner layer circuit board with the inner layer circuit formed on the surface.
A method for producing a multilayer wiring board, characterized in that the inner layer circuit is pushed into the surface of the inner layer circuit board by applying pressure, and then the outer layer circuit material is stacked on the surface of the inner layer circuit board with an adhesive layer interposed therebetween for lamination molding.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15801690A JPH0448796A (en) | 1990-06-15 | 1990-06-15 | Manufacture of multilayer interconnection board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15801690A JPH0448796A (en) | 1990-06-15 | 1990-06-15 | Manufacture of multilayer interconnection board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0448796A true JPH0448796A (en) | 1992-02-18 |
Family
ID=15662431
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15801690A Pending JPH0448796A (en) | 1990-06-15 | 1990-06-15 | Manufacture of multilayer interconnection board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0448796A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007251895A (en) * | 2006-03-20 | 2007-09-27 | Clarion Co Ltd | Acoustic device incorporated in vehicle seat |
-
1990
- 1990-06-15 JP JP15801690A patent/JPH0448796A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007251895A (en) * | 2006-03-20 | 2007-09-27 | Clarion Co Ltd | Acoustic device incorporated in vehicle seat |
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