JPH0748517B2 - Semiconductor integrated circuit device - Google Patents

Description

The present invention relates to a semiconductor integrated circuit device, and more particularly to a structure of an interlayer insulating film of a semiconductor integrated circuit device in which a plurality of polysilicon electrodes are formed on a substrate.

[Conventional technology]

In recent years, in semiconductor integrated circuit devices, a boron-phosphosilicate glass film (hereinafter referred to as a BPSG film) has been widely used as an interlayer insulating film. The main reason for this is that the BPSG film has the property of reflowing (melting) at a low temperature and can be completely planarized at a temperature of 850 ° C to 950 ° C in a steam atmosphere containing phosphorus. This is because fine processing can be facilitated and a semiconductor device with higher integration can be realized.

At this time, since the silicon gate electrode of the MOS field effect transistor is usually formed to have a film thickness of 6,000 to 8,000Å, the film thickness of the BPSG film is also set to 10,000 Å or more accordingly.

[Problems to be solved by the invention]

However, a closer examination of the structure of this interlayer insulating film reveals that there are large differences depending on the location on the substrate, that is, a thick BPSG film with a thickness of 10,000 Å is formed directly on the substrate. There is only 2,000-4,000 Å BPSG film just above the silicon gate electrode.
Moreover, when reflowing the BPSG film in a steam atmosphere,
Since a silicon dioxide film with a film thickness of about 2,000 to 3,000 liters is formed around this polysilicon electrode, a two-layered interlayer insulating film consisting of this silicon dioxide film and the BPSG film is locally formed on the silicon gate electrode. Will be formed. Therefore, the substrate contact hole on the substrate and the silicon
It is extremely difficult to simultaneously form a contact hole with an aluminum wiring on the gate electrode in a common etching process. As is well known, when the insulating film is thick as described above, it is impossible to form a contact hole having a good coverage characteristic by only one etching means. First, the opening is formed with a hydrofluoric acid-based etching solution so as to have a sufficiently gentle taper, and then the vertical portion is formed by anisotropic etching. However, as already mentioned, these two
Since there is a large structural difference in the interlayer insulating film in which the two contact holes are to be formed, a large difference occurs in the etching conditions. Therefore, if either condition is met, the other deviates from this. That is, a state in which the two are inconsistent with each other with respect to the etching conditions occurs.

3 and 4 are cross-sectional views of a substrate contact hole and a silicon gate electrode lead-out contact hole that are easily formed in a conventional semiconductor integrated circuit device, respectively. The former is for etching conditions of the substrate contact hole, and the latter is for the latter. The figures show the cases where the etching conditions for the contact hole for extracting the silicon gate electrode are matched. That is, FIG. 3 shows the thick BPSG on the field insulating film 2 of the semiconductor substrate 1.
An opening 4 having a sufficiently gentle taper angle is first formed in the film 3 with a hydrofluoric acid-based etching solution, and then a vertical portion 5 is formed by using an anisotropic dry etching method to form an aluminum wiring 6
In this case, a substrate contact hole having a good coverage property is preferentially provided, but at this time, a polysilicon electrode, that is, a silicon provided with the gate insulating film 7 is formed.
Since the BPSG film 3 on the gate electrode 8 is thin and the etching rate of the silicon dioxide film 9 with respect to the hydrofluoric acid-based etching solution is faster than that of the BPSG film 3, the shape of the silicon gate electrode extraction contact hole is the first hydrofluoric acid. Only the etching process using the system etching solution causes the coverage characteristic on the so-called reverse taper to be poor and the aluminum wiring 10 is likely to be broken. On the contrary, if the etching time with the hydrofluoric acid-based etching solution is shortened to prevent the formation of the reverse taper on the silicon gate electrode side, a sufficiently gentle taper cannot be formed in the opening 4 of the substrate contact hole. As shown, this time, on the contrary, inconvenience will occur on the substrate contact hole side.

In view of the above situation, an object of the present invention is to provide a semiconductor integrated structure having an interlayer insulating film structure capable of simultaneously forming a substrate contact hole and a silicon gate or other polysilicon electrode extraction contact hole in a common etching process with good coverage characteristics. It is to provide a circuit device.

[Means for solving problems]

A feature of the present invention is that a polysilicon electrode is formed on a semiconductor substrate, an interlayer insulating film including the polysilicon electrode, which covers the semiconductor substrate, has a first contact hole reaching an upper surface of the polysilicon electrode and a main portion of the semiconductor substrate. Second reaching the surface
In the semiconductor integrated circuit device having the contact hole formed therein, the interlayer insulating film on the upper surface of the polysilicon electrode is composed of only a silicon dioxide film, and the first contact hole having a tapered upper portion is formed therein, The interlayer insulating film on the main surface of the semiconductor substrate is configured to have a boron-containing phosphosilicate glass film (BPSG film) grown by chemical vapor deposition and a silicon dioxide film thereon, In the semiconductor integrated circuit device, the upper portion has the tapered second contact hole.

〔Example〕

 Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 is a partial sectional view of a semiconductor integrated circuit device showing an embodiment of the present invention. According to the present embodiment, the semiconductor integrated circuit device of the present invention includes a semiconductor substrate 1, a field insulating film 2 and a gate insulating film 7 formed on this substrate, and a polysilicon formed on the gate insulating film 7. Interlayer insulation consisting of a single layer of a silicon gate electrode 8 made of, a silicon dioxide film 9 for insulatingly covering the silicon gate electrode 8, and a silicon dioxide film 11 formed on the silicon dioxide film 9 by a chemical growth method. Films, a BPSG film 3 formed on the field insulating film 2, an interlayer insulating film having a two-layer structure of a silicon dioxide film 11 formed by a chemical growth method, and these two interlayer insulating films having different structures from each other. Substrate contact hole and silicon gate electrode extraction contact hole, and these 2
Semiconductor substrate 1 and silicon via one contact hole
Aluminum wiring 6 connected to the gate electrode 8 and
Including 10 and.

Such a structure can be easily manufactured by conventional manufacturing techniques. First, the polysilicon electrode 8 is formed on the semiconductor substrate 1.
To form. Then, the BPSG film 3 is grown by atmospheric pressure chemical vapor deposition and flattened in a phosphorus / steam atmosphere. At this time, the field insulating film 2 and the silicon dioxide film 9 are respectively formed. The process up to this point is exactly the same as the conventional semiconductor device manufacturing method. Next, this flattened BPSG film 3
Is etched by dry etching using a mixed gas of carbon tetrafluoride (CF ₄ ) and oxygen (O ₂ ) so as to have a selectivity with the thermal oxide film, and the thermal oxide film 9 on the polysilicon electrode 8 is exposed. After that, if the silicon dioxide film 11 is grown by chemical vapor deposition by a normal decompression method, the structure of the interlayer film as shown in FIG. 1 can be realized.

According to the semiconductor device having the structure of the present invention, both the substrate contact hole and the contact hole on the polysilicon electrode 3 are simultaneously formed on the semiconductor substrate 1 with good coverage characteristics. That is, since the substrate has a two-layer structure of the BPSG film 3 and the silicon dioxide film 11 in which the etching rate of hydrofluoric acid (HF) is faster than that of the BPSG film 3, a gentler taper than that of the single layer film of the BPSG film 3 is formed. The opening 4 can be formed with a hydrofluoric acid-based etching solution, and then the vertical portion 5 is opened by anisotropic dry etching. At this time, the interlayer film on the polysilicon electrode 8 is a silicon dioxide film having a faster etching rate for hydrofluoric acid than the BPSG film 3.
Since it consists of only 11, it does not have an inverse taper as in the past. At this time, if anisotropic dry etching is performed after opening the polysilicon electrode 8 with this hydrofluoric acid-based etching solution using a mixed gas of carbon tetrafluoride (CF ₄ ) and hydrogen (H ₂ ), The silicon electrode 8 will not be etched.

FIG. 2 is a partial sectional view of a semiconductor integrated circuit device showing another embodiment of the present invention.

In this embodiment, the silicon dioxide film of the interlayer insulating film is formed by the coating method. The silicon dioxide film 12 formed by this coating method is
Since the etching rate is higher than that of the silicon dioxide film 11 formed by the chemical vapor deposition method, a gentle taper can be formed in the opening 4.

〔The invention's effect〕

As described in detail above, according to the present invention, it is possible to form a contact hole having a smooth opening and having a good coverage at the same time on a substrate and a polysilicon electrode in a completely flattened interlayer film. Therefore, it is possible to easily provide a semiconductor device having highly reliable wiring.

[Brief description of drawings]

FIG. 1 is a partial sectional view of a semiconductor integrated circuit device showing an embodiment of the present invention, FIG. 2 is a sectional view of a semiconductor integrated circuit device showing another embodiment of the present invention, and FIGS. FIG. 7 is a cross-sectional view of a substrate contact hole and a silicon gate electrode lead-out contact hole that are easily formed in a conventional semiconductor integrated circuit device. 1 ... Semiconductor substrate, 2 ... Field insulating film, 3 ... BP
SG film, 4 ... (contact hole) opening, 5 ... (contact hole) vertical part, 6,10 ... Aluminum wiring, 7 ... Gate insulating film, 8 ... Silicon gate electrode, 9 ... … Silicon dioxide film, 11 …… Silicon dioxide film by chemical growth method, 12 ……
Silicon dioxide film by coating method.

Claims (1)

[Claims] 1. A polysilicon electrode is formed on a semiconductor substrate, and an interlayer insulating film including the polysilicon electrode and covering the semiconductor substrate reaches an upper surface of the polysilicon electrode.
In the semiconductor integrated circuit device having the contact hole and the second contact hole reaching the main surface of the semiconductor substrate, the interlayer insulating film on the upper surface of the polysilicon electrode is composed of only a silicon dioxide film, and The tapered first contact hole is formed, and the interlayer insulating film on the main surface of the semiconductor substrate is a phosphorous silicate glass film containing boron grown by chemical vapor deposition and a silicon dioxide film thereon. And a second contact hole having a tapered upper portion is formed therein.