JPH0748408B2 - Ceramic substrate for sheet electronic parts - Google Patents

Ceramic substrate for sheet electronic parts

Info

Publication number
JPH0748408B2
JPH0748408B2 JP63009802A JP980288A JPH0748408B2 JP H0748408 B2 JPH0748408 B2 JP H0748408B2 JP 63009802 A JP63009802 A JP 63009802A JP 980288 A JP980288 A JP 980288A JP H0748408 B2 JPH0748408 B2 JP H0748408B2
Authority
JP
Japan
Prior art keywords
ceramic substrate
dividing
warp
substrate
division
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP63009802A
Other languages
Japanese (ja)
Other versions
JPH01184904A (en
Inventor
則文 ▲吉▼田
和幸 間脇
秀樹 松浦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP63009802A priority Critical patent/JPH0748408B2/en
Publication of JPH01184904A publication Critical patent/JPH01184904A/en
Publication of JPH0748408B2 publication Critical patent/JPH0748408B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Parts Printed On Printed Circuit Boards (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)

Description

【発明の詳細な説明】 産業上の利用分野 本発明は電子機器に使用されるチップ部品等に用いられ
る電子部品用セラミック基板に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ceramic substrate for electronic parts used for chip parts and the like used in electronic equipment.

従来の技術 一般に、チップ抵抗器は、第5図に示すように、セラミ
ック基板11上にスクリーン印刷等により抵抗体ペースト
を塗布し焼成することにより抵抗体12を設け、そしてそ
の抵抗体12と接続されかつセラミック基板11の端面から
底面に亘って形成されるように電極13を設け、さらに抵
抗体12を保護するようにガラス膜14を設けることにより
構成されている。
2. Description of the Related Art Generally, as shown in FIG. 5, a chip resistor is provided with a resistor 12 by coating a resistor paste on a ceramic substrate 11 by screen printing or the like and firing it, and connecting it to the resistor 12. And the electrode 13 is provided so as to be formed from the end face to the bottom face of the ceramic substrate 11, and the glass film 14 is provided so as to protect the resistor 12.

従来、この種のチップ抵抗器等に用いられる電子部品用
セラミック基板は第6図〜第8図に示すような形状であ
った。第6図〜第8図はチップ部品を作るためのセラミ
ック基板の概略図を示しており、15は分割前のセラミッ
ク基板、16は縦方向の分割用溝、17は横方向の分割用溝
であり、この分割用溝16,17を有した面を表面とした場
合、横方向の基板の反りは側面から見ると、表面に対し
谷形形状であり、また縦方向の基板の反りも側面から見
ると、表面に対し谷形形状である。このような従来のセ
ラミック基板では、基板の反りが谷形形状であること
と、工程加工焼成毎に、第13図のようにセラミック基板
の谷形形状が進行することから次のような欠点があっ
た。
Conventionally, a ceramic substrate for electronic parts used in this type of chip resistor or the like has a shape as shown in FIGS. 6 to 8. 6 to 8 show a schematic view of a ceramic substrate for making a chip component, 15 is a ceramic substrate before division, 16 is a vertical dividing groove, and 17 is a horizontal dividing groove. If the surface having the dividing grooves 16 and 17 is used as the surface, the warp of the substrate in the horizontal direction is a valley shape with respect to the surface when viewed from the side, and the warp of the substrate in the vertical direction is also from the side. When viewed, it has a valley shape with respect to the surface. In such a conventional ceramic substrate, since the warp of the substrate has a valley shape and the valley shape of the ceramic substrate progresses as shown in FIG. 13 each time the process is processed and fired, the following drawbacks occur. there were.

第9図は一般的なチップ抵抗器の製造工程において、ス
クリーン印刷した時のペースト状態を示している。第13
図に示すように、第1焼成後、セラミック基板15の谷形
形状は極端に進行するため、抵抗体,ガラス部を第9図
のようにスクリーン印刷で形成した時、ペースト18の膜
厚は場所毎にバラツキを生じ、抵抗値歩留りの悪化及び
製品総厚のバラツキが生じる欠点があった。
FIG. 9 shows a paste state when screen printing is performed in a general chip resistor manufacturing process. Thirteenth
As shown in the figure, since the valley shape of the ceramic substrate 15 is extremely advanced after the first firing, when the resistor and the glass portion are formed by screen printing as shown in FIG. There is a drawback that variations occur from place to place, the yield of resistance value deteriorates, and the total thickness of products varies.

又、第10図は第3焼成後のセラミック基板を横方向の分
割用溝17に沿って分割する工程を正面から見たものであ
り、19はセラミック基板15の分割ポイント20,21は分割
用治具である。このような分割ポイント19では分割をす
るための抗折力が分割ポイント19に集中してしまい、分
割後第11図に示すような異形部分22を生じやすく、分割
寸法バラツキが大きくなり、チップ部品の実装マウント
時におけるトラブルが生じやすい欠点がある。又、分割
を行う瞬間セラミック基板15が多少たわみ、縦方向の分
割用溝16にストレスが加わるため、横方向の分割用溝17
に沿って分割されると同時に、縦方向の分割用溝16も分
割されてしまい、第12図に示すような分割不良が発生し
てしまう欠点があった。
Further, FIG. 10 is a front view of the step of dividing the ceramic substrate after the third firing along the dividing groove 17 in the lateral direction, and 19 is the dividing point 20 and 21 of the ceramic substrate 15 for dividing. It is a jig. At such division points 19, the transverse rupture force for division is concentrated on the division points 19, and after the division, a deformed portion 22 as shown in FIG. There is a drawback that troubles are likely to occur when mounting and mounting. In addition, the moment when the division is performed, the ceramic substrate 15 is slightly bent, and stress is applied to the vertical dividing groove 16, so that the horizontal dividing groove 17 is formed.
At the same time as the division along the line, the division groove 16 in the vertical direction is also divided, resulting in a defect that a division defect as shown in FIG. 12 occurs.

発明が解決しようとする課題 このような従来のセラミック基板で印刷膜厚バラツキを
減少させるためには、分割用溝の深さを浅くし、セラミ
ック基板の反りを小さくしなければならないが、分割性
に悪影響を及ぼす問題点を有しており、又逆に分割性を
良くするためには、分割用溝の深さを深くしなければな
らないが、セラミック基板の反りが大きくなり、印刷膜
厚バラツキに悪影響を及ぼす問題点を有している。
Problems to be Solved by the Invention In order to reduce the printing film thickness variation in such a conventional ceramic substrate, it is necessary to reduce the depth of the dividing groove and reduce the warpage of the ceramic substrate. However, in order to improve the dividability, it is necessary to increase the depth of the dicing groove, but the warp of the ceramic substrate becomes large, and the printed film thickness varies. Has a problem that adversely affects

本発明は上述したようなセラミック基板の印刷膜厚バラ
ツキの安定化、及び分割性の問題点を解決することを目
的とする。
It is an object of the present invention to stabilize the variation of the printed film thickness of the ceramic substrate and solve the problems of the dividability as described above.

課題を解決するための手段 以上のような問題点を解決するために本発明は、表面に
縦横に分割するための分割溝を有するとともに、この分
割溝側を上方とした山形形状の反りを設けたものであ
る。
Means for Solving the Problems In order to solve the above problems, the present invention has a dividing groove for dividing the surface vertically and horizontally, and provides a chevron-shaped warp with the dividing groove side upward. It is a thing.

作用 この構成によれば、工程加工焼成を行うことにより抵
抗,ガラスペースト印刷時、及び横方向の分割溝を分割
する工程において、基板の反りがフラットになり印刷膜
厚バラツキが減少するため、抵抗値歩留りの向上及び製
品総厚のバラツキ低減が図れ、又横方向の分割溝を分割
する工程において分割のポイントが線になり、分割をす
るための抗折力の分散が行なえ異形が生じなくなると共
に、分割時の基板のたわみもなくなり、縦方向の分割溝
に加わるストレスが小さくなり、分割不良の低減が図れ
る。
Operation According to this configuration, the resistance of the substrate is flattened and the variation of the printed film thickness is reduced in the resistance, the glass paste printing, and the step of dividing the dividing groove in the horizontal direction by performing the process processing and firing. The value yield can be improved and the variation in the total product thickness can be reduced. Also, in the process of dividing the lateral dividing groove, the dividing point becomes a line, the bending force for dividing can be dispersed, and irregularity does not occur. The bending of the substrate at the time of division is also eliminated, and the stress applied to the vertical division groove is reduced, so that division defects can be reduced.

実施例 以下、本発明について、チップ抵抗器用セラミック基板
の実施例を用いて図面を参照しながら説明する。
EXAMPLES Hereinafter, the present invention will be described with reference to the drawings using examples of ceramic substrates for chip resistors.

第1図に本発明の一実施例におけるセラミック基板を示
し、第2図に横方向から見たセラミック基板の反り形状
を示し、第3図に縦方向から見たセラミック基板の反り
形状を示している。すなわち、本発明は第2図,第3図
に示すようにセラミック基板1の表面に分割用溝2,3を
設け、そしてその表面に対しセラミック基板1の反り形
状を山形形状にしたものである。その寸法は、例えば第
2図のAは30μm、B,Cは15μmで、第3図のDは40μ
m、E,Fは20μmにした。
FIG. 1 shows a ceramic substrate according to an embodiment of the present invention, FIG. 2 shows a warped shape of the ceramic substrate seen from the lateral direction, and FIG. 3 shows a warped shape of the ceramic substrate seen from the vertical direction. There is. That is, according to the present invention, as shown in FIG. 2 and FIG. 3, dividing grooves 2 and 3 are provided on the surface of the ceramic substrate 1, and the warp shape of the ceramic substrate 1 with respect to the surface is made into a mountain shape. . The dimensions are, for example, 30 μm for A in FIG. 2, 15 μm for B and C, and 40 μ for D in FIG.
m, E and F were set to 20 μm.

尚、セラミック基板横方向の基板の反り形状は第7図に
対応し、縦方向の基板の反り形状は第8図に対応する。
The warp shape of the ceramic substrate in the horizontal direction corresponds to FIG. 7, and the warp shape of the substrate in the vertical direction corresponds to FIG.

以下、本発明のセラミック基板を利用した場合の具体的
な効果を述べる。
Hereinafter, specific effects when the ceramic substrate of the present invention is used will be described.

本発明のセラミック基板を1,000枚作成し、チップ抵抗
器製造ラインに投入し工程加工焼成毎の基板反り形状の
確認、抵抗値バラツキの確認、ガラス膜厚バラツキの確
認、分割異形発生率の確認、分割不良率の確認を行っ
た。
Create 1,000 ceramic substrates of the present invention, put into a chip resistor manufacturing line, check the substrate warp shape for each process firing, check the resistance value variation, check the glass film thickness variation, check the split variant occurrence rate, The fraction defective was confirmed.

第4図に示すように、工程加工焼成による基板反り形状
は、ほぼフラットな形状になったため、抵抗値バラツキ
は、従来σ≒4%だったものがσ≒1.5%にすることが
でき、又、ガラス膜厚バラツキも従来σ=6.8μmだっ
たものがσ=3.5μmに小さくすることが出来る。又、
分割異形発生率も、従来3.2%だったものが、1.3%と半
減以下になり、分割不良率においても0.8%だったもの
が0.3%と半減することが出来る。
As shown in FIG. 4, since the substrate warp shape due to the process working and firing became a substantially flat shape, the variation in the resistance value could be σ≈1.5% from what was conventionally σ≈4%. The variation in glass film thickness, which was conventionally σ = 6.8 μm, can be reduced to σ = 3.5 μm. or,
The ratio of occurrence of split variants was 3.2%, which was 1.3% or less, and the split defect rate was 0.8%, which could be reduced to 0.3%.

発明の効果 以上のように本発明におけるセラミック基板は、縦横の
形成された分割溝に沿って分割することにより各個片状
の電子部品を生産するシート状のセラミック基板が従来
焼成工程を経ることにより発生していたセラミック基板
の反りを、その反りとは逆方向、すなわち、分割溝側を
上方とした山形形状に反りを設けることにより低減させ
ることができるので、例えば抵抗体やガラスを印刷する
際、印刷膜厚のバラツキを低減させ電気的特性および製
品膜厚が均一な電子部品を提供することができるととも
に、所定の分割溝に沿って極めて高精度に分割できる分
割寸法が均一な電子部品を提供することが可能となる。
Effects of the Invention As described above, the ceramic substrate in the present invention is a sheet-shaped ceramic substrate that produces individual electronic components by dividing along the dividing grooves formed in the vertical and horizontal directions. The warp of the ceramic substrate that has occurred can be reduced by providing the warp in the direction opposite to the warp, that is, in the chevron shape with the dividing groove side as the upper side. In addition, it is possible to provide an electronic component with reduced variations in the printed film thickness and uniform electrical characteristics and product film thickness, and an electronic component with a uniform division size that can be divided along a predetermined dividing groove with extremely high precision. It becomes possible to provide.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の一実施例による電子部品用セラミック
基板を示す斜視図、第2図は第1図の横方向から見た説
明図、第3図は第1図の縦方向から見た説明図、第4図
は同基板の工程加工焼成に対する反りの状況を示す説明
図、第5図は一般的なチップ抵抗器を示す断面図、第6
図は従来のセラミック基板を示す斜視図、第7図は第6
図の横方向から見た断面図、第8図は第6図の縦方向か
ら見た断面図、第9図は従来のセラミック基板を使用し
た時の印刷膜厚状態を示す説明図、第10図は横方向の分
割溝を分割する工程を示す正面図、第11図,第12図は第
10図により分割した時発生する問題点を示す斜視図、第
13図は従来のセラミック基板の工程加工焼成に対する反
りの状況を示す説明図である。 1……セラミック基板、2,3……分割用溝。
1 is a perspective view showing a ceramic substrate for electronic parts according to an embodiment of the present invention, FIG. 2 is an explanatory view seen from the lateral direction of FIG. 1, and FIG. 3 is seen from the longitudinal direction of FIG. Explanatory diagram, FIG. 4 is an explanatory diagram showing the state of warpage of the same substrate due to process processing firing, FIG. 5 is a sectional view showing a general chip resistor, FIG.
FIG. 7 is a perspective view showing a conventional ceramic substrate, and FIG.
FIG. 8 is a cross-sectional view seen from the lateral direction of the figure, FIG. 8 is a cross-sectional view seen from the longitudinal direction of FIG. 6, and FIG. 9 is an explanatory view showing a printed film thickness state when a conventional ceramic substrate is used. The figure is a front view showing the process of dividing the horizontal dividing groove.
Figure 10 is a perspective view showing the problems that occur when dividing
FIG. 13 is an explanatory diagram showing the state of warpage of a conventional ceramic substrate due to process processing and firing. 1 ... Ceramic substrate, 2, 3 ... Dividing groove.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】表面に縦横に分割するための分溝割を有す
るとともに、この分割溝側を上方とした山形形状の反り
を設けたことを特徴とするシート状電子部品用セラミッ
ク基板。
1. A ceramic substrate for a sheet-shaped electronic component, characterized in that it has a split groove for vertical and horizontal division on the surface, and is provided with a chevron-shaped warp with the split groove side facing upward.
JP63009802A 1988-01-20 1988-01-20 Ceramic substrate for sheet electronic parts Expired - Fee Related JPH0748408B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63009802A JPH0748408B2 (en) 1988-01-20 1988-01-20 Ceramic substrate for sheet electronic parts

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63009802A JPH0748408B2 (en) 1988-01-20 1988-01-20 Ceramic substrate for sheet electronic parts

Publications (2)

Publication Number Publication Date
JPH01184904A JPH01184904A (en) 1989-07-24
JPH0748408B2 true JPH0748408B2 (en) 1995-05-24

Family

ID=11730320

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63009802A Expired - Fee Related JPH0748408B2 (en) 1988-01-20 1988-01-20 Ceramic substrate for sheet electronic parts

Country Status (1)

Country Link
JP (1) JPH0748408B2 (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5056566A (en) * 1973-09-21 1975-05-17
JPS52155357A (en) * 1976-06-18 1977-12-23 Matsushita Electric Ind Co Ltd Method of making electronic parts

Also Published As

Publication number Publication date
JPH01184904A (en) 1989-07-24

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