JPS63226092A - Ceramic board for electronic component - Google Patents

Ceramic board for electronic component

Info

Publication number
JPS63226092A
JPS63226092A JP5936087A JP5936087A JPS63226092A JP S63226092 A JPS63226092 A JP S63226092A JP 5936087 A JP5936087 A JP 5936087A JP 5936087 A JP5936087 A JP 5936087A JP S63226092 A JPS63226092 A JP S63226092A
Authority
JP
Japan
Prior art keywords
dividing
electrode
ceramic substrate
sectional
view
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5936087A
Other languages
Japanese (ja)
Inventor
則文 吉田
秀樹 松浦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP5936087A priority Critical patent/JPS63226092A/en
Publication of JPS63226092A publication Critical patent/JPS63226092A/en
Pending legal-status Critical Current

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  • Structure Of Printed Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、電子機器に使用されるチップ部品などの電子
部品用のセラミック基板に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a ceramic substrate for electronic components such as chip components used in electronic equipment.

従来の技術 従来、この種のセラミック基板は第6図に示すような形
状であった。第6図はチップ部品を作るためのセラミ、
ツク基板1の概略図を示しており、2は縦方向の分割溝
、3は横方向の分割溝であシ、表面の分割溝のみで形成
されていた。また分割溝形状はV溝であった。
Prior Art Conventionally, this type of ceramic substrate has had a shape as shown in FIG. Figure 6 shows ceramics used to make chip parts.
This is a schematic diagram of a substrate 1, in which 2 is a vertical dividing groove, 3 is a horizontal dividing groove, and is formed only by dividing grooves on the surface. Moreover, the shape of the dividing groove was a V-groove.

このような従来のセラミック基板では分割性の面におい
て、第7図に示すように分割した時、その分割断面が異
形断面4となりやすく分割寸法バラツキが大きくなり、
チップ部品の実装マウント時におけるトラブルが生じる
欠点があった。
In terms of divisibility, such conventional ceramic substrates tend to have irregularly shaped cross sections when divided as shown in FIG.
This method has the drawback of causing trouble when mounting chip components.

一方、このような基板を使用するテンプ抵抗器において
は一般的に第8図に示すような構造である。第8図にお
いて、5は抵抗体を保護するガラス部、6は電極部、7
は基板の分割したセラミ・ツク基板である。
On the other hand, a balance resistor using such a substrate generally has a structure as shown in FIG. In FIG. 8, 5 is a glass portion that protects the resistor, 6 is an electrode portion, and 7 is a glass portion that protects the resistor.
is a ceramic board with divided boards.

このような従来の分割基板形状では電極コーナ一部の角
度が鋭く実装半田付は後電極コーナ一部にストレスが集
中しやすく電極密着強度を低下させるという欠点があっ
た。
Such a conventional split board shape has a drawback that some electrode corners have sharp angles, and mounting soldering tends to cause stress to concentrate on some rear electrode corners, reducing the electrode adhesion strength.

発明が解決しようとする問題点 このような従来の基板で分割性を良くするためには、1
つ目として、分割溝を深くしなければならず、また深く
するとセラミック基板の反シ・うねりを生じ製品特性に
悪影響を及ぼすという問題点を有している。
Problems to be Solved by the Invention In order to improve the divisibility with such a conventional board, 1.
The second problem is that the dividing grooves must be made deep, and if they are made too deep, the ceramic substrate will warp and undulate, which will have an adverse effect on the product characteristics.

また2つ目として、第9図のように両面に分割溝を設け
れば分割性は良くなるが、電極コーナ一部ea、abへ
のストレス集中をぬぐい切れないという問題点を有して
いる。
Second, if dividing grooves are provided on both sides as shown in Fig. 9, the dividing property will be improved, but there is a problem that stress concentration on some electrode corners ea and ab cannot be eliminated. .

本発明は上述したようなセラミック基板の分割性、及び
電極コーナ一部ストレス集中の問題点を解決することを
目的とする。
It is an object of the present invention to solve the above-mentioned problems of the divisibility of a ceramic substrate and concentration of stress in a part of an electrode corner.

問題点を解決するための手段 以上のような問題点を解決するために本発明は、表裏両
面の同一線上に分割用溝を設置し、更に分割溝断面形状
を多角形としたものである。
Means for Solving the Problems In order to solve the above-mentioned problems, the present invention provides dividing grooves on the same line on both the front and back surfaces, and further makes the cross-sectional shape of the dividing grooves polygonal.

作用 この構成によれば、表面の分割溝先端から裏面分割溝先
端の方向に分割され、異形断面が生じなくなる。
Effect: According to this configuration, division occurs in the direction from the front dividing groove tip to the back dividing groove tip, and an irregular cross section is not generated.

更に、分割溝断面形状に多角性をもたせることにより電
極コーナ一部のストレスが多点へ分散され一点へのスト
レス集中が生じなくなる7、実施例 以下、本発明について、チップ抵抗器用セラミック基板
の実施例について図面を参照しながら説明する。
Furthermore, by providing polygonality to the cross-sectional shape of the dividing groove, stress at a part of the electrode corner is dispersed to multiple points, preventing stress from concentrating on one point. An example will be explained with reference to the drawings.

第1図は本発明の一実施例におけるセラミック基板であ
り、第2図は第1図の横方向からの断面拡大図で分割溝
の形状は2角を有している。第3図は第1図の縦方向か
らの断面拡大図であシ従来と同様表面のみの分割溝11
であり、形状ばV溝である。また、第4図は第1図を分
割し製品化したチップ抵抗器の電極部を示す図である。
FIG. 1 shows a ceramic substrate according to an embodiment of the present invention, and FIG. 2 is an enlarged cross-sectional view from the lateral direction of FIG. 1, and the dividing groove has a diagonal shape. FIG. 3 is an enlarged cross-sectional view from the vertical direction of FIG.
The shape is a V-groove. Moreover, FIG. 4 is a diagram showing the electrode portion of a chip resistor manufactured by dividing the structure shown in FIG. 1 into products.

本発明は、セラミック基板10に、第2図に示すように
横方向の分割溝12を表裏両面に設け、分割溝の形状を
V溝から2角をもたせた多角形分割溝にした。その角度
は、例えば、第2図のAは132°。
In the present invention, as shown in FIG. 2, the ceramic substrate 10 is provided with horizontal dividing grooves 12 on both the front and back surfaces, and the shape of the dividing grooves is changed from a V-groove to a polygonal dividing groove with two corners. For example, the angle A in Figure 2 is 132°.

Bは150.Cは79°、Dは20°の横方向の表裏の
分割溝形状にした。尚、第2図のセラミック基板横方向
の分割溝12の断面図は第4図の電極部に対応し、第2
図の傾斜13は第4図の傾斜20に、傾斜14は傾斜2
1に、傾斜16は傾斜22に、傾斜16は傾斜23に、
傾斜17は傾斜24に対応する。
B is 150. C had a dividing groove shape of 79° and D had a horizontal dividing groove shape of 20° on the front and back sides. The cross-sectional view of the dividing groove 12 in the horizontal direction of the ceramic substrate in FIG. 2 corresponds to the electrode part in FIG.
The slope 13 in the figure is the slope 20 in FIG. 4, and the slope 14 is the slope 2 in FIG.
1, the slope 16 is connected to the slope 22, the slope 16 is connected to the slope 23,
Slope 17 corresponds to slope 24.

なお、第4図において、5,6.7f″i第8図の5.
6.7と同一部分である。
In addition, in FIG. 4, 5,6.7f''i in FIG.
This is the same part as 6.7.

このように表裏両面に分割溝を設け、分割溝を2角のよ
うに多角形としたものである。
In this way, dividing grooves are provided on both the front and back surfaces, and the dividing grooves are polygonal like two corners.

以下、本発明のセラミック基板を利用した具体的実施例
を述べる。
Hereinafter, specific examples using the ceramic substrate of the present invention will be described.

本発明のセラミワク基板を200枚作成しテップ抵抗器
製造ラインに投入し、製品寸法、及びバラツキの確認、
更にチップ抵抗器完成品における電極強度を測定し従来
品との比較を行なった。
200 ceramic work boards of the present invention were made and put into the TEP resistor manufacturing line, and the product dimensions and variations were checked.
Furthermore, we measured the electrode strength of the finished chip resistor and compared it with conventional products.

その結果を表−1に示す。The results are shown in Table-1.

表−1 試験試料N=200 製品寸法は規格2.0±0.1W&に対し、本発明品は
! = 2.04鵡となり、従来品はi=2.08鵡と
なシ、本発明品は規格値中央に近づけることが出来た。
Table-1 Test sample N=200 Product dimensions are standard 2.0±0.1W&, but the product of the present invention! = 2.04 parrot, the conventional product had i = 2.08 parrot, and the product of the present invention was able to bring it close to the middle of the standard value.

また、製品寸法バラツキはδ=0.00911)となり
、従来品δ=0.016鵡より大幅に減少した。
Further, the product dimensional variation was δ = 0.00911), which was significantly reduced compared to the conventional product δ = 0.016.

更に電極強度についてはチップ抵抗器半田付は後の電極
タワミ強度を測定した結果、本発明品はMin=8mで
、従来品のsmより大幅にア、ツブした。
Furthermore, regarding the electrode strength, as a result of measuring the electrode deflection strength after soldering the chip resistor, the product of the present invention had Min=8m, which was significantly sharper than the SM of the conventional product.

尚、電極タワミ強度については第5図に示す通シ厚さ1
纂のプリント基板29の中央にチップ抵抗器3oを半田
付けし、チップ抵抗器中央部32を力点とし支点33間
距離を901EBとしプリント基板29を強制的に撓ま
せ、チップ抵抗器電極の剥れが発生した時のプリント基
板29の撓み距離34を測定するものである。
In addition, regarding the electrode deflection strength, the through thickness 1 shown in Figure 5 is used.
A chip resistor 3o is soldered to the center of the printed circuit board 29, and the center part 32 of the chip resistor is used as a point of emphasis, and the distance between the fulcrums 33 is set to 901 EB, and the printed circuit board 29 is forcibly bent to prevent the chip resistor electrode from peeling off. This is to measure the deflection distance 34 of the printed circuit board 29 when this occurs.

発明の効果 以上のように本発明におけるセラミック基板は、表裏両
面に分割溝を設けることにより表面の分割溝方向から裏
面の分割溝方向にそって分割され異形を伴わない分割形
状を保つことが出来、まだ表裏画面の分割溝の断面形状
を多角形にすることにより、そのセラミック基板を使用
したチップ抵抗器の実装半田付は後の電極コーナ一部へ
のストレスを分散させることが出来、電極強度レベルが
向上出来る。
Effects of the Invention As described above, by providing dividing grooves on both the front and back surfaces, the ceramic substrate of the present invention can be divided from the direction of the dividing grooves on the front surface to the direction of the dividing grooves on the back surface, and can maintain a divided shape without irregularities. However, by making the cross-sectional shape of the dividing grooves on the front and back screens polygonal, it is possible to disperse the stress to a part of the electrode corner after soldering the chip resistor using the ceramic substrate, and improve the electrode strength. You can improve your level.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例による電子部品用セラミック
基板の斜視図、第2図は第1図の横方向からの断面拡大
図、第3図は第1図の縦方向からの断面拡大図、第4図
は第1図を分割して製品化したチップ抵抗器の電極部を
示す斜視図、第6図は電極撓み強度試験についての概略
図、第6図a〜Cは従来のセラミック基板の斜視図及び
断面図、第7図は第6図のセラミック基板を分割した際
の断面図、第8図は一般的なチ・ツブ抵抗器の断面図、
第9図は多角をもたないセラミック基板を使用したチッ
プ抵抗器の断面図である。 10・・・・・・セラミック基板、11.12・・・・
・・分割溝。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名!I
)句 第4図 第6図
Fig. 1 is a perspective view of a ceramic substrate for electronic components according to an embodiment of the present invention, Fig. 2 is an enlarged cross-sectional view from the horizontal direction of Fig. 1, and Fig. 3 is an enlarged cross-sectional view from the vertical direction of Fig. 1. Figure 4 is a perspective view showing the electrode part of a chip resistor manufactured by dividing Figure 1, Figure 6 is a schematic diagram of the electrode bending strength test, Figures 6 a to C are conventional ceramic A perspective view and a cross-sectional view of the board, FIG. 7 is a cross-sectional view when the ceramic substrate of FIG. 6 is divided, FIG. 8 is a cross-sectional view of a general chip resistor,
FIG. 9 is a cross-sectional view of a chip resistor using a ceramic substrate without polygons. 10... Ceramic substrate, 11.12...
...Dividing groove. Name of agent: Patent attorney Toshio Nakao and 1 other person! I
) Phrases Figure 4 Figure 6

Claims (1)

【特許請求の範囲】[Claims]  多数個の小基板に分割されるべく分割溝が設けられ、
かつ分割溝の断面の形状を多角形としたことを特徴とす
る電子部品用セラミック基板。
Dividing grooves are provided to divide the substrate into a large number of small substrates,
A ceramic substrate for electronic components, characterized in that the dividing groove has a polygonal cross-sectional shape.
JP5936087A 1987-03-13 1987-03-13 Ceramic board for electronic component Pending JPS63226092A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5936087A JPS63226092A (en) 1987-03-13 1987-03-13 Ceramic board for electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5936087A JPS63226092A (en) 1987-03-13 1987-03-13 Ceramic board for electronic component

Publications (1)

Publication Number Publication Date
JPS63226092A true JPS63226092A (en) 1988-09-20

Family

ID=13111021

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5936087A Pending JPS63226092A (en) 1987-03-13 1987-03-13 Ceramic board for electronic component

Country Status (1)

Country Link
JP (1) JPS63226092A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016072393A (en) * 2014-09-29 2016-05-09 日亜化学工業株式会社 Method of manufacturing ceramics package and method of manufacturing light-emitting device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5830118A (en) * 1981-08-14 1983-02-22 ティーディーケイ株式会社 Electronic part, and method and apparatus for producing same

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5830118A (en) * 1981-08-14 1983-02-22 ティーディーケイ株式会社 Electronic part, and method and apparatus for producing same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016072393A (en) * 2014-09-29 2016-05-09 日亜化学工業株式会社 Method of manufacturing ceramics package and method of manufacturing light-emitting device

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