JPH0745755A - Resin-sealed semiconductor device and manufacture thereof - Google Patents
Resin-sealed semiconductor device and manufacture thereofInfo
- Publication number
- JPH0745755A JPH0745755A JP3339660A JP33966091A JPH0745755A JP H0745755 A JPH0745755 A JP H0745755A JP 3339660 A JP3339660 A JP 3339660A JP 33966091 A JP33966091 A JP 33966091A JP H0745755 A JPH0745755 A JP H0745755A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- lead frame
- chip
- wire
- integrated circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
- H01L2224/8592—Applying permanent coating, e.g. protective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は半導体集積回路装置（以
下ＩＣという）チップをリードフレームのアイランド部
にダイボンディングし、そのＩＣチップとリードフレー
ムのインナーリード部の間をワイヤボンディング法によ
り接続し、ＩＣチップ、ワイヤ及びインナーリード部を
樹脂封止した樹脂封止型半導体装置と、その樹脂封止方
法に関するものである。The present invention relates to a semiconductor integrated circuit device (hereinafter referred to as an IC) chip which is die-bonded to an island portion of a lead frame, and the IC chip and the inner lead portion of the lead frame are connected by a wire bonding method. The present invention relates to a resin-sealed semiconductor device in which an IC chip, a wire, and an inner lead portion are resin-sealed, and a resin-sealing method thereof.
【０００２】[0002]
【従来の技術】樹脂封止型半導体装置は、一般には図４
（Ａ）に示される構造をしている。ここで、２はリード
フレームのアイランド部、４はリードフレームのインナ
ーリード部であり、アイランド部２上にＩＣチップ６が
ダイボンディングされ、ＩＣチップ６とインナーリード
部４の間がワイヤ８で接続されている。アイランド部
２、インナーリード部４、ＩＣチップ６及びワイヤ８は
モールド樹脂１０によって樹脂封止されている。2. Description of the Related Art Generally, a resin-sealed semiconductor device is shown in FIG.
It has the structure shown in FIG. Here, 2 is an island portion of the lead frame, 4 is an inner lead portion of the lead frame, the IC chip 6 is die-bonded on the island portion 2, and the IC chip 6 and the inner lead portion 4 are connected by a wire 8. Has been done. The island portion 2, the inner lead portion 4, the IC chip 6 and the wires 8 are resin-sealed with a molding resin 10.
【０００３】図４（Ａ）の樹脂封止では信頼性上問題が
あるので、種々の改良がなされている。図４（Ｂ）では
ＩＣチップ６上に絶縁樹脂層１２がポッティング法によ
り形成され、その後モールド樹脂１０でアイランド部
２、インナーリード部４、ＩＣチップ６、ワイヤ８及び
絶縁樹脂層１２が樹脂封止されている。この構造はＩＣ
チップ６の表面のストレスを緩和するとともに、ＩＣチ
ップ６がＤＲＡＭの場合にα線によりエラーが起こるの
を防ぐα線対策の役目も果たしている。Since the resin sealing shown in FIG. 4 (A) has a problem in reliability, various improvements have been made. In FIG. 4B, the insulating resin layer 12 is formed on the IC chip 6 by the potting method, and then the mold resin 10 is used to seal the island portion 2, the inner lead portion 4, the IC chip 6, the wire 8 and the insulating resin layer 12 with resin. It has been stopped. This structure is IC
In addition to relieving the stress on the surface of the chip 6, it also serves as an α-ray countermeasure to prevent an error from occurring due to α-rays when the IC chip 6 is a DRAM.
【０００４】図４（Ｃ）では、ＩＣチップ６とインナー
リード部４を接続するワイヤ８ａとして絶縁被覆を有す
る被覆ワイヤを用いたものである。この構造は樹脂モー
ルド時のワイヤ間のショートによる不良を低減するため
のものである。図４（Ｄ）はアイランド部２の裏面（Ｉ
Ｃチップ６がダイボンディングされる側を表面とよぶ）
に絶縁樹脂１４をコーティングし、その後モールド樹脂
１０で封止している。この絶縁樹脂層１４はモールド後
の熱ストレスによるアイランド部底面の剥離を防ぎ、信
頼性を向上させるものである。In FIG. 4C, a coated wire having an insulating coating is used as the wire 8a for connecting the IC chip 6 and the inner lead portion 4. This structure is intended to reduce defects due to short-circuiting between wires during resin molding. FIG. 4D shows the back surface of the island portion 2 (I
The side where the C chip 6 is die-bonded is called the surface)
Is coated with an insulating resin 14, and then sealed with a mold resin 10. The insulating resin layer 14 prevents peeling of the bottom surface of the island portion due to thermal stress after molding, and improves reliability.
【０００５】[0005]
【発明が解決しようとする課題】図４（Ｂ）のようにＩ
Ｃチップ上面に絶縁樹脂層１２を有する樹脂封止体は、
コーティング樹脂層１２と封止樹脂１０の界面をボンデ
ィングワイヤ８が横切っているため、絶縁樹脂層１２と
封止樹脂１０の熱膨張係数の差により熱ストレスでワイ
ヤ８が切断する虞れがある。図４（Ｃ）の樹脂封止体で
は、被覆ワイヤ８ａの両端の被覆を剥がし、ＩＣチップ
６とインナーリード部４の間に接続するボンディング装
置が複雑になり、ボンディング工程の制御が複雑にな
る。図４（Ｄ）の樹脂封止体では、製造工程が複雑にな
り、かつＩＣチップ６の表面のストレス緩和やα線対策
がなされておらず、モールド時のワイヤのショートによ
る不良を防ぐことはできない。Problems to be Solved by the Invention As shown in FIG.
The resin sealing body having the insulating resin layer 12 on the upper surface of the C chip is
Since the bonding wire 8 crosses the interface between the coating resin layer 12 and the sealing resin 10, the wire 8 may be cut due to thermal stress due to the difference in thermal expansion coefficient between the insulating resin layer 12 and the sealing resin 10. In the resin sealing body of FIG. 4 (C), the coating on both ends of the coated wire 8a is peeled off, and the bonding device connected between the IC chip 6 and the inner lead portion 4 becomes complicated, and the control of the bonding process becomes complicated. . In the resin encapsulant of FIG. 4D, the manufacturing process is complicated, stress relaxation on the surface of the IC chip 6 and measures against α rays are not taken, and it is possible to prevent defects due to short-circuiting of wires during molding. Can not.
【０００６】そこで、本発明は図４（Ｂ）から（Ｄ）で
達成しようとしている目的を同時に達成することのでき
る樹脂封止型半導体装置を提供することを目的とするも
のである。本発明はまた、そのような樹脂封止型半導体
装置を製造する方法を提供することを目的とするもので
ある。Therefore, an object of the present invention is to provide a resin-encapsulated semiconductor device capable of simultaneously achieving the objects to be achieved in FIGS. 4B to 4D. Another object of the present invention is to provide a method for manufacturing such a resin-encapsulated semiconductor device.
【０００７】[0007]
【課題を解決するための手段】本発明の樹脂封止型半導
体装置では、ＩＣチップ、ボンディングワイヤ、アイラ
ンド部及びインナーリード部が絶縁被膜で被われてお
り、かつこれらの絶縁被膜で被われた部分が樹脂封止さ
れている。本発明の製造方法では、ＩＣチップをリード
フレームにワイヤボンディング法により接続した後、Ｉ
Ｃチップ、ボンディングワイヤ、アイランド部及びイン
ナーリード部を絶縁被膜で被うために、それらの部分に
スプレー法により絶縁被膜を形成し、その後絶縁被膜で
被われた部分を樹脂封止する。In the resin-sealed semiconductor device of the present invention, the IC chip, the bonding wire, the island portion and the inner lead portion are covered with the insulating coating, and these insulating coatings are also covered. The part is resin-sealed. In the manufacturing method of the present invention, after connecting the IC chip to the lead frame by the wire bonding method,
In order to cover the C chip, the bonding wire, the island portion and the inner lead portion with the insulating coating, an insulating coating is formed on these portions by a spray method, and then the portion covered with the insulating coating is resin-sealed.
【０００８】本発明の製造方法の他の方法では、水槽の
水面に薄い絶縁膜を予め形成しておき、ＩＣチップをリ
ードフレームにワイヤボンディング法により接続した後
のリードフレームをその水槽に通して絶縁膜を付着さ
せ、リードフレームに付着した不要な絶縁被膜をエッチ
ング法により除去し、その後絶縁被膜で被われた部分を
樹脂封止する。本発明の製造方法のさらに他の方法で
は、ＩＣチップをリードフレームにワイヤボンディング
法により接続した後のリードフレームを絶縁樹脂液に浸
して絶縁被膜を形成し、リードフレームに付着した不要
な絶縁被膜をエッチング法により除去し、その後絶縁被
膜で被われた部分を樹脂封止する。In another method of the manufacturing method of the present invention, a thin insulating film is formed in advance on the water surface of the water tank, and the lead frame after the IC chip is connected to the lead frame by the wire bonding method is passed through the water tank. An insulating film is attached, an unnecessary insulating film attached to the lead frame is removed by an etching method, and then a portion covered with the insulating film is resin-sealed. In still another method of the manufacturing method of the present invention, an unnecessary insulating film adhered to the lead frame is formed by immersing the lead frame after connecting the IC chip to the lead frame by the wire bonding method, to form an insulating film. Is removed by an etching method, and then the portion covered with the insulating coating is resin-sealed.
【０００９】[0009]
【実施例】図１は一実施例を表わす。図４と同等の部分
には同一の符号を用いる。リードフレームのアイランド
部２にＩＣチップ６がダイボンディングされ、ＩＣチッ
プ６とインナーリード部４の間がワイヤ８により接続さ
れている。アイランド部２、インナーリード部４、ＩＣ
チップ６及びワイヤ８の表面は絶縁被膜２０で被覆され
ている。これらの各部は絶縁被膜２０で被膜された状態
でモールド樹脂１０によってトランスファモールド法や
その他の樹脂封止法により封止されている。DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows an embodiment. The same reference numerals are used for the same parts as in FIG. The IC chip 6 is die-bonded to the island portion 2 of the lead frame, and the IC chip 6 and the inner lead portion 4 are connected by a wire 8. Island part 2, inner lead part 4, IC
The surface of the chip 6 and the wire 8 is covered with an insulating coating 20. Each of these parts is sealed by the mold resin 10 by the transfer molding method or another resin sealing method while being coated with the insulating coating 20.
【００１０】次に、一実施例の製造方法について説明す
る。図２は絶縁被膜２０をスプレー法により形成する例
を表わしたものである。アイランド部２及びインナーリ
ード部を少なくとも含むリードフレーム２２のアイラン
ド部２にＩＣチップ６をダイボンディングし、ＩＣチッ
プ６とインナーリード部の間を金ワイヤ８によりワイヤ
ボンディング法で接続した後、絶縁樹脂被膜２０を形成
しないリードフレームの領域にマスク２４を形成する。
マスク２４としては例えばマスキングテープを用いるこ
とができる。Next, a manufacturing method of one embodiment will be described. FIG. 2 shows an example in which the insulating coating 20 is formed by a spray method. The IC chip 6 is die-bonded to the island part 2 of the lead frame 22 including at least the island part 2 and the inner lead part, and the IC chip 6 and the inner lead part are connected by a gold wire 8 by a wire bonding method. A mask 24 is formed in the area of the lead frame where the coating 20 is not formed.
As the mask 24, for example, a masking tape can be used.
【００１１】その後、絶縁樹脂で被覆しようとする領域
の表面側と裏面側とから絶縁樹脂２６をスプレー法によ
り吹き付けて塗布する。絶縁樹脂が乾燥した後、マスク
２４を取り除き、トランスファーモールド法その他の樹
脂封止法により絶縁被膜で被われた領域を少なくとも含
む領域を樹脂封止する。その後、リードフレームの不要
部分を切り離し、樹脂封止された樹脂封止体から露出し
ているリードフレームを必要に応じて変形すれば樹脂封
止体が完成する。After that, the insulating resin 26 is sprayed and applied from the front surface side and the back surface side of the region to be covered with the insulating resin by a spray method. After the insulating resin has dried, the mask 24 is removed, and a region including at least a region covered with the insulating coating is resin-sealed by a transfer molding method or another resin sealing method. After that, unnecessary portions of the lead frame are cut off, and the lead frame exposed from the resin-sealed resin-sealed body is deformed as necessary, whereby the resin-sealed body is completed.
【００１２】図３は樹脂封止する前に絶縁被膜を形成す
る他の方法を示したものである。図３（Ａ）は絶縁被膜
を形成する第２の方法を示したものである。水槽３０に
純水３２を入れ、純水３２上に薄い絶縁被膜層３４を予
め形成しておく。リードフレームにＩＣチップをダイボ
ンディングし、ＩＣチップとインナーリード部の間をワ
イヤボンディング法により接続したものを、図３の純水
３２に通してリードフレーム、ＩＣチップ及びワイヤの
全表面に絶縁被膜を付着させる。その後、不要な部分に
付着した絶縁被膜をエッチングにより除去した後、トラ
ンスファーモールド法などの封止方法により樹脂封止を
行なう。FIG. 3 shows another method of forming an insulating coating before resin sealing. FIG. 3A shows a second method for forming an insulating coating. Pure water 32 is put in the water tank 30, and a thin insulating film layer 34 is previously formed on the pure water 32. An IC chip is die-bonded to the lead frame, and the connection between the IC chip and the inner lead portion is made by the wire bonding method, and the resultant is passed through pure water 32 shown in FIG. 3 to form an insulating film on all surfaces of the lead frame, the IC chip and the wire. Attach. After that, the insulating film attached to unnecessary portions is removed by etching, and then resin sealing is performed by a sealing method such as a transfer molding method.
【００１３】図３（Ｂ）は絶縁被膜を形成する第３の方
法を示したものである。容器３５に絶縁樹脂液３６を入
れておく。ＩＣチップをダイボンディングし、ワイヤボ
ンディング法によりＩＣチップとインナーリード部を接
続したリードフレームをこの絶縁樹脂液３６に浸し、リ
ードフレーム、ＩＣチップ及びワイヤの全表面に絶縁被
膜を形成する。その後、不要な部分の絶縁被膜をエッチ
ングにより除去した後、トランスファモールド法などの
封止方法により樹脂封止する。FIG. 3B shows a third method of forming an insulating coating. The insulating resin liquid 36 is placed in the container 35. The IC chip is die-bonded, and the lead frame connecting the IC chip and the inner lead portion is dipped in this insulating resin liquid 36 by the wire bonding method to form an insulating film on the entire surfaces of the lead frame, the IC chip and the wires. After that, after removing the unnecessary portion of the insulating coating by etching, resin sealing is performed by a sealing method such as a transfer molding method.
【００１４】[0014]
【発明の効果】本発明の樹脂封止型半導体装置では、Ｉ
Ｃチップ表面が絶縁被膜でコーティングされているの
で、モールド樹脂の応力をその絶縁被膜で吸収すること
ができ、信頼性が向上する。ＩＣチップ全面及びワイヤ
が絶縁被膜により被われているため、外部からの水分侵
入に対するバリヤーとなり、対湿信頼性が向上する。リ
ードフレームのアイランド部の裏面も絶縁被膜により被
われているので、吸湿後の熱ストレスに対してリードフ
レームとモールド樹脂との熱膨張係数の違いによる剥離
を抑えることができて信頼性が向上する。ボンディング
ワイヤ全体も絶縁被膜で被覆されているため、トランス
ファモールド法などによるモールド時のワイヤ流れ等に
よるワイヤのショートを防ぐことができ、工程での不良
発生を低減し、歩留まりを向上させることができる。本
発明の製造方法は何れも実現が容易な方法である。According to the resin-encapsulated semiconductor device of the present invention, I
Since the surface of the C chip is coated with the insulating coating, the stress of the mold resin can be absorbed by the insulating coating, and the reliability is improved. Since the entire surface of the IC chip and the wires are covered with the insulating coating, they serve as a barrier against invasion of moisture from the outside and the reliability against moisture is improved. Since the back surface of the island of the lead frame is also covered with the insulating film, peeling due to the difference in thermal expansion coefficient between the lead frame and the molding resin can be suppressed against heat stress after moisture absorption, and reliability is improved. . Since the entire bonding wire is also covered with an insulating film, it is possible to prevent wire short circuit due to wire flow at the time of molding by the transfer molding method, etc., and it is possible to reduce the occurrence of defects in the process and improve the yield. . Any of the manufacturing methods of the present invention is a method that can be easily realized.
【図１】一実施例を示す断面図である。FIG. 1 is a sectional view showing an embodiment.
【図２】スプレー法による絶縁被膜の形成工程を示す正
面図である。FIG. 2 is a front view showing a step of forming an insulating coating by a spray method.
【図３】絶縁被膜の形成工程の他の例を示す図であり、
（Ａ）は水面に形成した絶縁被膜層をＩＣチップなどに
付着する方法を示す概略断面図、（Ｂ）は絶縁樹脂液に
浸して被膜を形成する方法を示す概略断面図である。FIG. 3 is a diagram showing another example of a process of forming an insulating coating,
(A) is a schematic sectional view showing a method of adhering an insulating coating layer formed on a water surface to an IC chip or the like, and (B) is a schematic sectional view showing a method of immersing it in an insulating resin liquid to form a coating.
【図４】従来の樹脂封止体を示す断面図である。FIG. 4 is a cross-sectional view showing a conventional resin sealing body.
２ リードフレームのアイランド部 ４ リードフレームのインナーリード部 ６ ＩＣチップ ８ ワイヤ １０ モールド樹脂 ２０ 絶縁被膜 ２４ マスク ２６ 絶縁樹脂スプレー ３０ 水槽 ３２ 純水 ３４ 絶縁被膜層 ３６ 絶縁樹脂液 2 Island part of lead frame 4 Inner lead part of lead frame 6 IC chip 8 Wire 10 Mold resin 20 Insulating film 24 Mask 26 Insulating resin spray 30 Water tank 32 Pure water 34 Insulating film layer 36 Insulating resin liquid
Claims (4)
集積回路装置チップがダイボンディングされ、その半導
体集積回路装置チップとリードフレームのインナーリー
ド部との間がワイヤボンディング法により接続されてお
り、半導体集積回路装置チップ、ボンディングワイヤ、
アイランド部及びインナーリード部が絶縁被膜で被われ
ており、かつこれらの絶縁被膜で被われた部分が樹脂封
止されている樹脂封止型半導体装置。1. A semiconductor integrated circuit device chip is die-bonded to an island portion of a lead frame, and the semiconductor integrated circuit device chip and an inner lead portion of the lead frame are connected by a wire bonding method. Equipment chip, bonding wire,
A resin-encapsulated semiconductor device in which an island portion and an inner lead portion are covered with an insulating coating, and a portion covered with the insulating coating is resin-sealed.
集積回路装置チップをダイボンディングし、半導体集積
回路装置チップとリードフレームのインナーリード部の
間をワイヤボンディング法により接続した後、半導体集
積回路装置チップ、ボンディングワイヤ、アイランド部
及びインナーリード部にスプレー法により絶縁被膜を形
成し、その後絶縁被膜で被われた部分を樹脂封止する樹
脂封止型半導体装置の製造方法。2. A semiconductor integrated circuit device chip is die-bonded to the island portion of the lead frame, the semiconductor integrated circuit device chip and the inner lead portion of the lead frame are connected by a wire bonding method, and then the semiconductor integrated circuit device chip, A method of manufacturing a resin-encapsulated semiconductor device, wherein an insulating coating is formed on a bonding wire, an island portion, and an inner lead portion by a spray method, and then a portion covered with the insulating coating is resin-sealed.
おき、リードフレームのアイランド部に半導体集積回路
装置チップをダイボンディングし、半導体集積回路装置
チップとリードフレームのインナーリード部の間をワイ
ヤボンディング法により接続した後、そのリードフレー
ムを前記水槽に通してリードフレーム、半導体集積回路
装置チップ及びボンディングワイヤに前記絶縁膜を付着
させ、リードフレームに付着した不要な絶縁被膜をエッ
チング法により除去し、その後絶縁被膜で被われた部分
を樹脂封止する樹脂封止型半導体装置の製造方法。3. A thin insulating film is previously formed on the water surface of the water tank, and the semiconductor integrated circuit device chip is die-bonded to the island portion of the lead frame, and the semiconductor integrated circuit device chip and the inner lead portion of the lead frame are connected to each other. After connecting by the wire bonding method, the lead frame is passed through the water tank to attach the insulating film to the lead frame, the semiconductor integrated circuit device chip and the bonding wire, and the unnecessary insulating film attached to the lead frame is removed by the etching method. Then, a method of manufacturing a resin-encapsulated semiconductor device in which the portion covered with the insulating coating is then resin-encapsulated.
集積回路装置チップをダイボンディングし、半導体集積
回路装置チップとリードフレームのインナーリード部の
間をワイヤボンディング法により接続した後、そのリー
ドフレームを絶縁樹脂液に浸して絶縁被膜を形成し、リ
ードフレームに付着した不要な絶縁被膜をエッチング法
により除去し、その後絶縁被膜で被われた部分を樹脂封
止する樹脂封止型半導体装置の製造方法。4. The semiconductor integrated circuit device chip is die-bonded to the island portion of the lead frame, the semiconductor integrated circuit device chip and the inner lead portion of the lead frame are connected by a wire bonding method, and then the lead frame is insulated with an insulating resin. A method for manufacturing a resin-encapsulated semiconductor device, comprising: forming an insulating coating film by immersing in a liquid; removing an unnecessary insulating coating film attached to a lead frame by an etching method; and thereafter sealing a portion covered with the insulating coating film with a resin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3339660A JPH0745755A (en) | 1991-11-27 | 1991-11-27 | Resin-sealed semiconductor device and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3339660A JPH0745755A (en) | 1991-11-27 | 1991-11-27 | Resin-sealed semiconductor device and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0745755A true JPH0745755A (en) | 1995-02-14 |
Family
ID=18329600
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3339660A Pending JPH0745755A (en) | 1991-11-27 | 1991-11-27 | Resin-sealed semiconductor device and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0745755A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002064166A (en) * | 2000-06-06 | 2002-02-28 | Nippon Steel Corp | Semiconductor device, manufacturing method thereof, and resin sealing apparatus |
| CN108573935A (en) * | 2017-03-14 | 2018-09-25 | 纳普拉有限公司 | Semiconductor device and its manufacturing method |
-
1991
- 1991-11-27 JP JP3339660A patent/JPH0745755A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002064166A (en) * | 2000-06-06 | 2002-02-28 | Nippon Steel Corp | Semiconductor device, manufacturing method thereof, and resin sealing apparatus |
| CN108573935A (en) * | 2017-03-14 | 2018-09-25 | 纳普拉有限公司 | Semiconductor device and its manufacturing method |
| CN108573935B (en) * | 2017-03-14 | 2021-08-10 | 纳普拉有限公司 | Semiconductor device and method for manufacturing the same |
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