JPH07271705A - データプロセッサ及びこれを用いたトレース回路 - Google Patents
データプロセッサ及びこれを用いたトレース回路Info
- Publication number
- JPH07271705A JPH07271705A JP6259727A JP25972794A JPH07271705A JP H07271705 A JPH07271705 A JP H07271705A JP 6259727 A JP6259727 A JP 6259727A JP 25972794 A JP25972794 A JP 25972794A JP H07271705 A JPH07271705 A JP H07271705A
- Authority
- JP
- Japan
- Prior art keywords
- bus
- signal
- cache
- access
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Prevention of errors by analysis, debugging or testing of software
- G06F11/362—Debugging of software
- G06F11/3636—Debugging of software by tracing the execution of the program
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Debugging And Monitoring (AREA)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6259727A JPH07271705A (ja) | 1994-02-09 | 1994-09-30 | データプロセッサ及びこれを用いたトレース回路 |
| TW084100845A TW305960B (enExample) | 1994-02-09 | 1995-01-28 | |
| KR1019950002035A KR950033860A (ko) | 1994-02-09 | 1995-02-06 | 데이타 프로세서 및 이것을 사용한 트레이스회로 |
| EP95101798A EP0667576A1 (en) | 1994-02-09 | 1995-02-09 | A data processor and a trace circuit using the data processor |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6-36496 | 1994-02-09 | ||
| JP3649694 | 1994-02-09 | ||
| JP6259727A JPH07271705A (ja) | 1994-02-09 | 1994-09-30 | データプロセッサ及びこれを用いたトレース回路 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH07271705A true JPH07271705A (ja) | 1995-10-20 |
Family
ID=26375556
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6259727A Pending JPH07271705A (ja) | 1994-02-09 | 1994-09-30 | データプロセッサ及びこれを用いたトレース回路 |
Country Status (4)
| Country | Link |
|---|---|
| EP (1) | EP0667576A1 (enExample) |
| JP (1) | JPH07271705A (enExample) |
| KR (1) | KR950033860A (enExample) |
| TW (1) | TW305960B (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6453410B1 (en) | 1998-07-03 | 2002-09-17 | Nec Corporation | Computer system having a cache memory and a tracing function |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3934710B2 (ja) * | 1996-09-13 | 2007-06-20 | 株式会社ルネサステクノロジ | マイクロプロセッサ |
| GB2362730B (en) | 1999-12-23 | 2004-02-11 | St Microelectronics Sa | Computer register watch |
| GB2362729B (en) | 1999-12-23 | 2004-02-11 | St Microelectronics Sa | Memory access debug facility |
| GB2365546B (en) | 1999-12-23 | 2004-02-18 | St Microelectronics Sa | A computer system with two debug watch modes |
| GB2362968B (en) | 1999-12-23 | 2003-12-10 | St Microelectronics Sa | Computer system with debug facility |
| GB2366006B (en) | 1999-12-23 | 2004-06-30 | St Microelectronics Sa | A computer system with debug facility |
| WO2008128476A1 (en) * | 2007-04-18 | 2008-10-30 | Mediatek Inc. | Data access tracing |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0371418A3 (en) * | 1988-11-30 | 1991-09-04 | National Semiconductor Corporation | Apparatus for and method of providing the program counter of a microprocessor external to the device |
| EP0453268B1 (en) * | 1990-04-20 | 1997-10-22 | Hitachi, Ltd. | A microprocessor for inserting a bus cycle to output an internal information for an emulation |
-
1994
- 1994-09-30 JP JP6259727A patent/JPH07271705A/ja active Pending
-
1995
- 1995-01-28 TW TW084100845A patent/TW305960B/zh active
- 1995-02-06 KR KR1019950002035A patent/KR950033860A/ko not_active Withdrawn
- 1995-02-09 EP EP95101798A patent/EP0667576A1/en not_active Withdrawn
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6453410B1 (en) | 1998-07-03 | 2002-09-17 | Nec Corporation | Computer system having a cache memory and a tracing function |
Also Published As
| Publication number | Publication date |
|---|---|
| KR950033860A (ko) | 1995-12-26 |
| EP0667576A1 (en) | 1995-08-16 |
| TW305960B (enExample) | 1997-05-21 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20041019 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20041026 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20050308 |
|
| A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A711 Effective date: 20050315 |