JPH07212142A - Audio power amplifier - Google Patents

Abstract

PURPOSE:To stably obtain high output by a comparatively low power supply voltage without depending on a snubber circuit by forming a gain limiting circuit which suppresses a voltage gain fed back by a level shift loop which sets input and output voltages at the same potential. CONSTITUTION:Transistors TrQ2, Q3, Q4, and Q5 and a constant current circuit 11 form the level shift loop which sets an output terminal Vout and an input terminal Vin at the same potential. The level shift loop uses a level shift effect by a voltage between the base and emitter of each transistor, and no voltage gain is generated. First and second resistors R1, R2 form the gain limiting circuit. The circuit suppresses the feedback of the voltage gain generated by making the emitter resistance of an npn TrQ1 function as the collector load resistance of a pnp TrQ2 at an inverted Darlington circuit 3. Consequently, the high output can be stably obtained by a low power supply voltage without depending on the snubber circuit.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an audio power amplifier and a technique effective when applied to an audio power amplifier IC (semiconductor integrated circuit) which obtains a high output specification with a relatively low power supply voltage. For example, the present invention relates to a technology effectively used for a vehicle audio reproduction system, so-called car audio.

[0002]

2. Description of the Related Art In audio power amplifiers for car audio, there is a strong demand for high output specifications, but since the power source is taken from a vehicle battery (12V) with a relatively low voltage, a normal power amplifier circuit is sufficient. High output cannot be obtained.

Therefore, the present inventors have considered using an inverted Darlington circuit in the output stage of an audio power amplifier as shown in FIG. 3 in order to obtain a high output specification with a relatively low power supply voltage. did.

The circuit 1 shown in FIG. 3 has a power supply voltage (Vcc-
Output (V) from the intermediate connection point (node) of two npn-type transistors Q7 and Q1 connected in series between
out) is a push-pull type power amplifier circuit, in which the npn transistor Q7 on the push drive side (Vcc side) is connected to the emitter of the npn transistor Q6 to connect the normal Darlington circuit 2 Form. Further, the pull driving side (GND side) npn-type transistor Q1 forms an inverted Darlington circuit 3 by connecting the collector of the pnp-type transistor Q2 to its base.

Normal Darlington circuit 2 for push drive and inverted Darlington circuit 3 for pull drive
The respective inputs are subjected to DC bias by the constant current circuits I2 and I3 and the diodes D1 and D2.

At the same time, the transistors Q5, Q4,
The output terminals (V
out) and the input terminal (Vin) have the same potential, a level shift loop is formed. This level shift loop utilizes the level shift effect due to the base-emitter voltage of each transistor and does not involve voltage gain.

In the normal Darlington circuit 2, the emitter of the npn transistor Q6 is connected to the base of the npn transistor Q7, so that the input signal (Vin) is transmitted to the base of Q7 in the same phase.

On the other hand, in the inverted Darlington circuit 3, since the collector of the pnp type transistor Q2 is connected to the base of the npn type transistor Q1, the phase of the input signal (Vin) is inverted and the input signal (Vin) of the npn type transistor Q1 is inverted. Transmitted to the base. That is, the inverted Darlington circuit 3 also performs phase inversion. As a result, Q1 and Q7 are made to perform push-pull operation.

Further, in the inverted Darlington circuit 3, the base-emitter voltage of the pnp-type transistor Q1 and the base-emitter voltage of the npn-type transistor Q1 are generated in opposite potential directions, so that both base-emitter voltages are The voltages are set to cancel each other out.

In this way, the inverted Darlington circuit 3 can realize a very large current amplification by the product of the current amplification factors of the two transistors Q1 and Q2, and the two transistors Q1 and Q2 can be realized.
The base-emitter voltages of 1 and Q2 are npn type and pnp
This can be canceled by a combination of molds, and thus a large amplitude range of the output voltage Vout can be secured.

Therefore, a high output audio power amplifier can be constructed despite the low power supply voltage. Further, as shown in FIG. 3, by performing BTL driving of one load (speaker) SP with the two power amplification circuits 1 and 1, a higher output is possible.

References relating to the inverted Darlington circuit include, for example, "Transistor Technology Special No. 18, November 1, 1989", pages 12 to 29, LM38 in FIG.
3 equivalent circuit.

[0013]

However, the present inventors have clarified that the above-mentioned technique has the following problems.

That is, in the above audio power amplifier, the np of the inverted Darlington circuit 3 is
The n-type transistor Q1 has its output terminal (Vout) at GND
When pull-driving to the side, the resistance parasitic in series with the emitter of the npn-type transistor Q1 acts as the collector load resistance of the pnp-type transistor Q2, so that Q
A large voltage gain occurs from 2 to Q1. This voltage gain is fed back to the input side by the level shift loop formed by Q5, Q4, Q3 and Q2 in order to make the output voltage Vout and the input voltage Vin the same potential. When the voltage gain fed back in this level shift loop increases, oscillation tends to occur due to the phase wraparound in the high frequency region.

In other words, in the normal Darlington circuit 2, since the two transistors Q6 and Q7 each operate as an emitter follower, the voltage gain theoretically never becomes 1 or more, but in the inverted Darlington circuit 3, the voltage gain of the preceding stage is increased. In some cases, the transistor Q2 may operate as a collector-grounded amplifier circuit, so that a voltage gain is generated there to form a cause of oscillation in a high frequency region.

Therefore, conventionally, the output terminal (Vo
ut) has a high-frequency capacitor Cp and a small resistance Rp
By connecting the snubber circuit 4 consisting of, the oscillation in the high frequency region was suppressed.

However, since the snubber circuit 4 including the capacitor Cp and the resistor Rp is difficult to form into a semiconductor integrated circuit, it must be an external component, and in order to ensure that the snubber circuit 4 suppresses oscillation. Needs to increase the capacitance value of the capacitor Cp to some extent,
This may adversely affect the sound reproduction in the high range.

It is an object of the present invention to stably obtain a high output with a relatively low power supply voltage without depending on a snubber circuit which is difficult to be formed into a semiconductor integrated circuit and may adversely affect sound reproduction. To provide the technology to do.

The above and other objects and characteristics of the present invention will be apparent from the description of this specification and the accompanying drawings.

[0020]

Of the inventions disclosed in the present application, a representative one will be briefly described below.
It is as follows.

That is, in an audio power amplifier having an inverted Darlington circuit at the output stage, which is formed by connecting the collector of a pnp type transistor to the base of an npn type transistor, the input voltage and the output voltage are set to the same potential. And a gain limiting circuit that suppresses the voltage gain fed back in the level shift loop.

[0022]

According to the above-mentioned means, it is possible to surely suppress the oscillation in the high frequency region caused by the voltage gain in the inverted Darlington circuit.

This makes it possible to stably obtain a high output with a relatively low power supply voltage, without depending on a snubber circuit which is difficult to form into a semiconductor integrated circuit and may adversely affect sound reproduction. The purpose is achieved.

[0024]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will be described below with reference to the drawings.

In the figures, the same reference numerals indicate the same or corresponding parts.

FIG. 1 shows a first embodiment of an audio power amplifier to which the technique of the present invention is applied. First, 1 is a pair of loads (speakers) SP.
Is a vehicle-mounted battery that supplies a power supply voltage (Vcc-GND) of about 12V.

The power amplifier circuit 1 has a power supply voltage (Vcc-G
ND) has a push-pull type output stage composed of a normal Darlington circuit 2 and an inverted Darlington circuit 3 connected in series. In this case, normal
The Darlington circuit 2 is connected to the power source potential Vcc side to form a push drive circuit, the inverted Darlington circuit 3 is connected to the reference potential GND side to form a pull drive circuit, and an intermediate connection point (node) of both circuits 2 and 3 is formed. ), The push-pull output (Vout) is applied to one end of the load SP.

The normal Darlington circuit 2 has an npn type bipolar transistor Q on both the input side and the output side.
6, Q7. In this normal Darlington circuit 2, the collectors of Q6 and Q7 are commonly connected to the power supply potential, the emitter of Q6 is connected to the base of Q7, and the emitter of Q7 is connected to the output terminal (Vout). , Q6, Q7, a very large current amplification is realized by the product of the respective current amplification factors.

The inverted Darlington circuit 3 is formed of a pnp type bipolar transistor Q2 on the input side and an npn type bipolar transistor Q1 on the output side. This inverted Darlington circuit 3
Then, the collector of Q2 is connected to the base of Q1,
Has its emitter connected to the reference potential (GND) and its collector connected to the output terminal (Vout).

In the inverted Darlington circuit 3, a very large current amplification can be realized by the product of the current amplification factors of the two transistors Q1 and Q2, and the two transistors Q1 and Q2.
The base-emitter voltage can be canceled by a combination of the npn type and the pnp type, whereby a large amplitude range of the output voltage Vout can be secured.

Normal Darlington circuit 2 for push drive and inverted Darlington circuit 3 for pull drive
The respective inputs of are respectively biased by the constant current circuits I1 and I2 and the diodes D1 and D2.

Further, the circuit 1 shown in FIG.
Type transistors Q3, Q4, pnp type transistor Q
2, Q5, the constant current circuit I1, and the first and second resistors R1 and R2 form the following circuit.

That is, the npn-type transistor Q3 is
The emitter is connected to the emitter of the pnp type transistor Q2, and the collector is connected to the power supply potential Vcc. The next npn-type transistor Q4 has a collector connected to the base of the transistor Q3 and a power supply potential Vcc.
Is supplied with a constant current from the constant current circuit I1, and the base and collector are commonly connected. The pnp-type transistor Q5 has an emitter connected to the emitter of the transistor Q4 and a collector connected to the reference potential GND. The first resistor R1 is connected between the base of the pnp type transistor Q5 and the base of the pnp type transistor Q2, and the second resistor R2 is connected between the base of the pnp type transistor Q5 and the output terminal (Vout). .

The transistors Q2, Q3, Q4, Q5 and the constant current circuit I1 form a level shift loop so that the output terminal (Vout) and the input terminal (Vin) have the same potential. This level shift loop utilizes the level shift effect due to the base-emitter voltage of each transistor and does not involve voltage gain.

In the inverted Darlington circuit 3, the first and second resistors R1 and R2 have a voltage gain produced by the emitter resistance of the npn-type transistor Q1 acting as a collector load resistance of the pnp-type transistor Q2. A gain limiting circuit is formed to suppress feedback in the level shift loop.

Next, the operation will be described.

In FIG. 1, the output voltage Vout is level-shifted to the Vcc side by 2Vbe (Vbe = base-emitter voltage) by the transistors Q5 and Q4, and then G by 2Vbe by the transistors Q3 and Q2.
The level is shifted to the ND side and fed back to the input terminal (Vin). As a result, the voltage gain (ΔVout /
If ΔVin) is 1, the output voltage Vout and the input voltage V
in has the same potential.

Here, in the inverted Darlington circuit 3, the emitter resistance of the npn-type transistor Q1 acts as a collector load resistance of the pnp-type transistor Q2, so that a large voltage gain Gv (Gv = Δ).
Vout / ΔVin >> 1), that is, when the change amount ΔVout of the output voltage Vout with respect to the change amount ΔVin of the input voltage Vin becomes large, the difference (Δ)
Vout−ΔVin) is the first and second resistances R1,
The voltage is divided into (ΔVout−ΔVin) × (R1 / (R1 + R2)) by R2, and this is the change ΔVin ′ of the base input voltage Vin ′ of the transistor Q5.

Since ΔVout = Gv × ΔVin, the change ΔVin ′ in the base input voltage Vin ′ of the transistor Q5 is ΔVin ′ = ΔVin × (Gv−1) × (R1 / (R1
+ R2)).

From the above, the voltage gain Gv generated in the inverted Darlington circuit 3 can be suppressed by the resistors R1 and R2 before being fed back to the level shift loop of the transistors Q5, Q4, Q3 and Q2. it can.

As described above, the oscillation in the high frequency region caused by the voltage gain in the inverted Darlington circuit 3 can be suppressed.

As a result, a high output can be stably obtained with a relatively low power supply voltage without depending on a snubber circuit which is difficult to be formed into a semiconductor integrated circuit and may adversely affect sound reproduction.

FIG. 2 shows a second embodiment of the present invention. In addition to the configuration of the first embodiment shown in FIG.
A capacitor C1 is provided between the first resistor R1 and the second resistor R2.
A high frequency bypass circuit is provided.

As a result, the transistors Q5, Q4, Q
It is possible to selectively suppress the feedback gains in the level shift loops of Q3 and Q2 in the high frequency region, and more reliably prevent oscillation in the high frequency region.

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Needless to say.

For example, the high frequency bypass circuit including the capacitor C1 may be provided on the base side of the npn transistor Q3.

In the above description, the case where the invention made by the present inventor is mainly applied to the audio power amplifier which is the background field of application has been described, but the present invention is not limited to this. For example, a vibration motor. It can also be applied to the drive amplifier of.

[0048]

The effects of the typical ones of the inventions disclosed in this application will be briefly described as follows.

That is, there is an effect that a high output can be stably obtained with a relatively low power supply voltage without depending on a snubber circuit which is difficult to be formed into a semiconductor integrated circuit and may adversely affect sound reproduction. can get.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a first embodiment of an audio power amplifier to which the technique of the present invention is applied.

FIG. 2 is a circuit diagram showing a second embodiment of the present invention.

FIG. 3 is a circuit diagram showing a configuration of an audio power amplifier examined prior to the present invention.

[Explanation of symbols]

SP load (speaker) 1 power amplification circuit 2 normal Darlington circuit 3 inverted Darlington circuit 5 vehicle-mounted batteries Q1, Q3, Q4, Q6, Q7 npn type (first conductivity type) transistor Q2, Q5 pnp type (second conductivity) Type) Transistor R1, R2 Resistance C1 Capacitor Vcc Power supply potential GND Reference potential Vin Input voltage Vout Output voltage

Claims (5)

[Claims] 1. A second base is formed on the base of the first conductivity type transistor.
An audio power amplifier having an inverted Darlington circuit at the output stage formed by connecting the collectors of conductivity type transistors, and forming a level shift loop for making the input voltage and the output voltage the same potential. An audio power amplifier characterized by forming a gain limiting circuit for suppressing the voltage gain fed back by this level shift loop. 2. An npn having a collector connected to an output terminal
-Type first transistor (Q1), a drive input signal is applied to the base, and a collector is connected to the base of the first transistor, and a pnp-type second transistor (Q2) is connected to the emitter of the second transistor. And the collector is connected to the power supply potential and the npn-type third transistor (Q3), the collector is connected to the base of the third transistor, and a constant current is supplied from the power supply potential.
Further, an npn-type fourth transistor (Q4) whose base and collector are commonly connected, and a pnp-type fifth transistor (Q5) whose emitter is connected to the emitter of the fourth transistor and whose collector is connected to a reference potential, A first resistor (R1) connected between the base of the fifth transistor and the base of the second transistor; and a second resistor (R2) connecting between the base of the fifth transistor and the output terminal. The audio according to claim 1, wherein
Power Amplifier. 3. A push-pull type power amplifier circuit having a push-drive side formed by a normal Darlington circuit and a pull-drive side formed by an inverted Darlington circuit.
Or the audio power amplifier according to 2. 4. A BT with one load using two power amplifier circuits.
4. L-driving is carried out, The claim 1 to 3 characterized by the above-mentioned.
The audio power amplifier described in any of the above. 5. The audio power amplifier according to claim 1, further comprising a high-frequency bypass circuit formed by a capacitor provided between the first resistor and the second resistor.